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mm: memcontrol: use per-cpu stocks for socket memory uncharging
[linux/fpc-iii.git] / drivers / mmc / host / tmio_mmc_core.c
blob12cf8288d6635eafef4677630d669c1a60238b45
1 /*
2 * Driver for the MMC / SD / SDIO IP found in:
3 *
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
5 *
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
9 * Copyright (C) 2011 Guennadi Liakhovetski
10 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * This driver draws mainly on scattered spec sheets, Reverse engineering
18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
19 * support). (Further 4 bit support from a later datasheet).
20 *
21 * TODO:
22 * Investigate using a workqueue for PIO transfers
23 * Eliminate FIXMEs
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
27 *
28 */
29
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
34 #include <linux/io.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/card.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/slot-gpio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
51
52 #include "tmio_mmc.h"
53
54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
56 {
57 if (host->dma_ops)
58 host->dma_ops->start(host, data);
59 }
60
61 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
62 {
63 if (host->dma_ops)
64 host->dma_ops->enable(host, enable);
65 }
66
67 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
68 struct tmio_mmc_data *pdata)
69 {
70 if (host->dma_ops) {
71 host->dma_ops->request(host, pdata);
72 } else {
73 host->chan_tx = NULL;
74 host->chan_rx = NULL;
75 }
76 }
77
78 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
79 {
80 if (host->dma_ops)
81 host->dma_ops->release(host);
82 }
83
84 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
85 {
86 if (host->dma_ops)
87 host->dma_ops->abort(host);
88 }
89
90 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
91 {
92 if (host->dma_ops)
93 host->dma_ops->dataend(host);
94 }
95
96 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
97 {
98 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
99 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
100 }
101 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
102
103 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
104 {
105 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
106 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
107 }
108 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
109
110 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
111 {
112 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
113 }
114
115 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
116 {
117 host->sg_len = data->sg_len;
118 host->sg_ptr = data->sg;
119 host->sg_orig = data->sg;
120 host->sg_off = 0;
121 }
122
123 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
124 {
125 host->sg_ptr = sg_next(host->sg_ptr);
126 host->sg_off = 0;
127 return --host->sg_len;
128 }
129
130 #define CMDREQ_TIMEOUT 5000
131
132 #ifdef CONFIG_MMC_DEBUG
133
134 #define STATUS_TO_TEXT(a, status, i) \
135 do { \
136 if ((status) & TMIO_STAT_##a) { \
137 if ((i)++) \
138 printk(KERN_DEBUG " | "); \
139 printk(KERN_DEBUG #a); \
140 } \
141 } while (0)
142
143 static void pr_debug_status(u32 status)
144 {
145 int i = 0;
146
147 pr_debug("status: %08x = ", status);
148 STATUS_TO_TEXT(CARD_REMOVE, status, i);
149 STATUS_TO_TEXT(CARD_INSERT, status, i);
150 STATUS_TO_TEXT(SIGSTATE, status, i);
151 STATUS_TO_TEXT(WRPROTECT, status, i);
152 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
153 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
154 STATUS_TO_TEXT(SIGSTATE_A, status, i);
155 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
156 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
157 STATUS_TO_TEXT(ILL_FUNC, status, i);
158 STATUS_TO_TEXT(CMD_BUSY, status, i);
159 STATUS_TO_TEXT(CMDRESPEND, status, i);
160 STATUS_TO_TEXT(DATAEND, status, i);
161 STATUS_TO_TEXT(CRCFAIL, status, i);
162 STATUS_TO_TEXT(DATATIMEOUT, status, i);
163 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
164 STATUS_TO_TEXT(RXOVERFLOW, status, i);
165 STATUS_TO_TEXT(TXUNDERRUN, status, i);
166 STATUS_TO_TEXT(RXRDY, status, i);
167 STATUS_TO_TEXT(TXRQ, status, i);
168 STATUS_TO_TEXT(ILL_ACCESS, status, i);
169 printk("\n");
170 }
171
172 #else
173 #define pr_debug_status(s) do { } while (0)
174 #endif
175
176 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
177 {
178 struct tmio_mmc_host *host = mmc_priv(mmc);
179
180 if (enable && !host->sdio_irq_enabled) {
181 u16 sdio_status;
182
183 /* Keep device active while SDIO irq is enabled */
184 pm_runtime_get_sync(mmc_dev(mmc));
185
186 host->sdio_irq_enabled = true;
187 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
188
189 /* Clear obsolete interrupts before enabling */
190 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
191 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
192 sdio_status |= TMIO_SDIO_SETBITS_MASK;
193 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
194
195 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
196 } else if (!enable && host->sdio_irq_enabled) {
197 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
198 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
199
200 host->sdio_irq_enabled = false;
201 pm_runtime_mark_last_busy(mmc_dev(mmc));
202 pm_runtime_put_autosuspend(mmc_dev(mmc));
203 }
204 }
205
206 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
207 {
208 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
209 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
210
211 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
212 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
213 msleep(10);
214
215 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
216 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
217 msleep(10);
218 }
219 }
220
221 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
222 {
223 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
224 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
225 msleep(10);
226 }
227
228 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
229 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
230
231 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
232 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
233 msleep(10);
234 }
235
236 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
237 unsigned int new_clock)
238 {
239 u32 clk = 0, clock;
240
241 if (new_clock == 0) {
242 tmio_mmc_clk_stop(host);
243 return;
244 }
245
246 if (host->clk_update)
247 clock = host->clk_update(host, new_clock) / 512;
248 else
249 clock = host->mmc->f_min;
250
251 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
252 clock <<= 1;
253
254 /* 1/1 clock is option */
255 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
256 clk |= 0xff;
257
258 if (host->set_clk_div)
259 host->set_clk_div(host->pdev, (clk >> 22) & 1);
260
261 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
262 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
263 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
264 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
265 msleep(10);
266
267 tmio_mmc_clk_start(host);
268 }
269
270 static void tmio_mmc_reset(struct tmio_mmc_host *host)
271 {
272 /* FIXME - should we set stop clock reg here */
273 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
274 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
275 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
276 msleep(10);
277 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
278 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
279 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
280 msleep(10);
281
282 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
283 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
284 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
285 }
286
287 }
288
289 static void tmio_mmc_reset_work(struct work_struct *work)
290 {
291 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
292 delayed_reset_work.work);
293 struct mmc_request *mrq;
294 unsigned long flags;
295
296 spin_lock_irqsave(&host->lock, flags);
297 mrq = host->mrq;
298
299 /*
300 * is request already finished? Since we use a non-blocking
301 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
302 * us, so, have to check for IS_ERR(host->mrq)
303 */
304 if (IS_ERR_OR_NULL(mrq) ||
305 time_is_after_jiffies(host->last_req_ts +
306 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
307 spin_unlock_irqrestore(&host->lock, flags);
308 return;
309 }
310
311 dev_warn(&host->pdev->dev,
312 "timeout waiting for hardware interrupt (CMD%u)\n",
313 mrq->cmd->opcode);
314
315 if (host->data)
316 host->data->error = -ETIMEDOUT;
317 else if (host->cmd)
318 host->cmd->error = -ETIMEDOUT;
319 else
320 mrq->cmd->error = -ETIMEDOUT;
321
322 host->cmd = NULL;
323 host->data = NULL;
324 host->force_pio = false;
325
326 spin_unlock_irqrestore(&host->lock, flags);
327
328 tmio_mmc_reset(host);
329
330 /* Ready for new calls */
331 host->mrq = NULL;
332
333 tmio_mmc_abort_dma(host);
334 mmc_request_done(host->mmc, mrq);
335 }
336
337 /* These are the bitmasks the tmio chip requires to implement the MMC response
338 * types. Note that R1 and R6 are the same in this scheme. */
339 #define APP_CMD 0x0040
340 #define RESP_NONE 0x0300
341 #define RESP_R1 0x0400
342 #define RESP_R1B 0x0500
343 #define RESP_R2 0x0600
344 #define RESP_R3 0x0700
345 #define DATA_PRESENT 0x0800
346 #define TRANSFER_READ 0x1000
347 #define TRANSFER_MULTI 0x2000
348 #define SECURITY_CMD 0x4000
349 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
350
351 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
352 struct mmc_command *cmd)
353 {
354 struct mmc_data *data = host->data;
355 int c = cmd->opcode;
356 u32 irq_mask = TMIO_MASK_CMD;
357
358 switch (mmc_resp_type(cmd)) {
359 case MMC_RSP_NONE: c |= RESP_NONE; break;
360 case MMC_RSP_R1:
361 case MMC_RSP_R1_NO_CRC:
362 c |= RESP_R1; break;
363 case MMC_RSP_R1B: c |= RESP_R1B; break;
364 case MMC_RSP_R2: c |= RESP_R2; break;
365 case MMC_RSP_R3: c |= RESP_R3; break;
366 default:
367 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
368 return -EINVAL;
369 }
370
371 host->cmd = cmd;
372
373 /* FIXME - this seems to be ok commented out but the spec suggest this bit
374 * should be set when issuing app commands.
375 * if(cmd->flags & MMC_FLAG_ACMD)
376 * c |= APP_CMD;
377 */
378 if (data) {
379 c |= DATA_PRESENT;
380 if (data->blocks > 1) {
381 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
382 c |= TRANSFER_MULTI;
383
384 /*
385 * Disable auto CMD12 at IO_RW_EXTENDED and
386 * SET_BLOCK_COUNT when doing multiple block transfer
387 */
388 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
389 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
390 c |= NO_CMD12_ISSUE;
391 }
392 if (data->flags & MMC_DATA_READ)
393 c |= TRANSFER_READ;
394 }
395
396 if (!host->native_hotplug)
397 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
398 tmio_mmc_enable_mmc_irqs(host, irq_mask);
399
400 /* Fire off the command */
401 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
402 sd_ctrl_write16(host, CTL_SD_CMD, c);
403
404 return 0;
405 }
406
407 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
408 unsigned short *buf,
409 unsigned int count)
410 {
411 int is_read = host->data->flags & MMC_DATA_READ;
412 u8 *buf8;
413
414 /*
415 * Transfer the data
416 */
417 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
418 u32 data = 0;
419 u32 *buf32 = (u32 *)buf;
420
421 if (is_read)
422 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
423 count >> 2);
424 else
425 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
426 count >> 2);
427
428 /* if count was multiple of 4 */
429 if (!(count & 0x3))
430 return;
431
432 buf32 += count >> 2;
433 count %= 4;
434
435 if (is_read) {
436 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
437 memcpy(buf32, &data, count);
438 } else {
439 memcpy(&data, buf32, count);
440 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
441 }
442
443 return;
444 }
445
446 if (is_read)
447 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
448 else
449 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
450
451 /* if count was even number */
452 if (!(count & 0x1))
453 return;
454
455 /* if count was odd number */
456 buf8 = (u8 *)(buf + (count >> 1));
457
458 /*
459 * FIXME
460 *
461 * driver and this function are assuming that
462 * it is used as little endian
463 */
464 if (is_read)
465 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
466 else
467 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
468 }
469
470 /*
471 * This chip always returns (at least?) as much data as you ask for.
472 * I'm unsure what happens if you ask for less than a block. This should be
473 * looked into to ensure that a funny length read doesn't hose the controller.
474 */
475 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
476 {
477 struct mmc_data *data = host->data;
478 void *sg_virt;
479 unsigned short *buf;
480 unsigned int count;
481 unsigned long flags;
482
483 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
484 pr_err("PIO IRQ in DMA mode!\n");
485 return;
486 } else if (!data) {
487 pr_debug("Spurious PIO IRQ\n");
488 return;
489 }
490
491 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
492 buf = (unsigned short *)(sg_virt + host->sg_off);
493
494 count = host->sg_ptr->length - host->sg_off;
495 if (count > data->blksz)
496 count = data->blksz;
497
498 pr_debug("count: %08x offset: %08x flags %08x\n",
499 count, host->sg_off, data->flags);
500
501 /* Transfer the data */
502 tmio_mmc_transfer_data(host, buf, count);
503
504 host->sg_off += count;
505
506 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
507
508 if (host->sg_off == host->sg_ptr->length)
509 tmio_mmc_next_sg(host);
510 }
511
512 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
513 {
514 if (host->sg_ptr == &host->bounce_sg) {
515 unsigned long flags;
516 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
517
518 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
519 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
520 }
521 }
522
523 /* needs to be called with host->lock held */
524 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
525 {
526 struct mmc_data *data = host->data;
527 struct mmc_command *stop;
528
529 host->data = NULL;
530
531 if (!data) {
532 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
533 return;
534 }
535 stop = data->stop;
536
537 /* FIXME - return correct transfer count on errors */
538 if (!data->error)
539 data->bytes_xfered = data->blocks * data->blksz;
540 else
541 data->bytes_xfered = 0;
542
543 pr_debug("Completed data request\n");
544
545 /*
546 * FIXME: other drivers allow an optional stop command of any given type
547 * which we dont do, as the chip can auto generate them.
548 * Perhaps we can be smarter about when to use auto CMD12 and
549 * only issue the auto request when we know this is the desired
550 * stop command, allowing fallback to the stop command the
551 * upper layers expect. For now, we do what works.
552 */
553
554 if (data->flags & MMC_DATA_READ) {
555 if (host->chan_rx && !host->force_pio)
556 tmio_mmc_check_bounce_buffer(host);
557 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
558 host->mrq);
559 } else {
560 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
561 host->mrq);
562 }
563
564 if (stop && !host->mrq->sbc) {
565 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
566 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
567 stop->opcode, stop->arg);
568
569 /* fill in response from auto CMD12 */
570 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
571
572 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
573 }
574
575 schedule_work(&host->done);
576 }
577 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
578
579 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
580 {
581 struct mmc_data *data;
582
583 spin_lock(&host->lock);
584 data = host->data;
585
586 if (!data)
587 goto out;
588
589 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
590 stat & TMIO_STAT_TXUNDERRUN)
591 data->error = -EILSEQ;
592 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
593 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
594 bool done = false;
595
596 /*
597 * Has all data been written out yet? Testing on SuperH showed,
598 * that in most cases the first interrupt comes already with the
599 * BUSY status bit clear, but on some operations, like mount or
600 * in the beginning of a write / sync / umount, there is one
601 * DATAEND interrupt with the BUSY bit set, in this cases
602 * waiting for one more interrupt fixes the problem.
603 */
604 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
605 if (status & TMIO_STAT_SCLKDIVEN)
606 done = true;
607 } else {
608 if (!(status & TMIO_STAT_CMD_BUSY))
609 done = true;
610 }
611
612 if (done) {
613 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
614 tmio_mmc_dataend_dma(host);
615 }
616 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
617 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
618 tmio_mmc_dataend_dma(host);
619 } else {
620 tmio_mmc_do_data_irq(host);
621 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
622 }
623 out:
624 spin_unlock(&host->lock);
625 }
626
627 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
628 {
629 struct mmc_command *cmd = host->cmd;
630 int i, addr;
631
632 spin_lock(&host->lock);
633
634 if (!host->cmd) {
635 pr_debug("Spurious CMD irq\n");
636 goto out;
637 }
638
639 /* This controller is sicker than the PXA one. Not only do we need to
640 * drop the top 8 bits of the first response word, we also need to
641 * modify the order of the response for short response command types.
642 */
643
644 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
645 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
646
647 if (cmd->flags & MMC_RSP_136) {
648 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
649 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
650 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
651 cmd->resp[3] <<= 8;
652 } else if (cmd->flags & MMC_RSP_R3) {
653 cmd->resp[0] = cmd->resp[3];
654 }
655
656 if (stat & TMIO_STAT_CMDTIMEOUT)
657 cmd->error = -ETIMEDOUT;
658 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
659 stat & TMIO_STAT_STOPBIT_ERR ||
660 stat & TMIO_STAT_CMD_IDX_ERR)
661 cmd->error = -EILSEQ;
662
663 /* If there is data to handle we enable data IRQs here, and
664 * we will ultimatley finish the request in the data_end handler.
665 * If theres no data or we encountered an error, finish now.
666 */
667 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
668 if (host->data->flags & MMC_DATA_READ) {
669 if (host->force_pio || !host->chan_rx)
670 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
671 else
672 tasklet_schedule(&host->dma_issue);
673 } else {
674 if (host->force_pio || !host->chan_tx)
675 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
676 else
677 tasklet_schedule(&host->dma_issue);
678 }
679 } else {
680 schedule_work(&host->done);
681 }
682
683 out:
684 spin_unlock(&host->lock);
685 }
686
687 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
688 int ireg, int status)
689 {
690 struct mmc_host *mmc = host->mmc;
691
692 /* Card insert / remove attempts */
693 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
694 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
695 TMIO_STAT_CARD_REMOVE);
696 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
697 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
698 !work_pending(&mmc->detect.work))
699 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
700 return true;
701 }
702
703 return false;
704 }
705
706 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
707 int status)
708 {
709 /* Command completion */
710 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
711 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
712 TMIO_STAT_CMDTIMEOUT);
713 tmio_mmc_cmd_irq(host, status);
714 return true;
715 }
716
717 /* Data transfer */
718 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
719 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
720 tmio_mmc_pio_irq(host);
721 return true;
722 }
723
724 /* Data transfer completion */
725 if (ireg & TMIO_STAT_DATAEND) {
726 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
727 tmio_mmc_data_irq(host, status);
728 return true;
729 }
730
731 return false;
732 }
733
734 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
735 {
736 struct mmc_host *mmc = host->mmc;
737 struct tmio_mmc_data *pdata = host->pdata;
738 unsigned int ireg, status;
739 unsigned int sdio_status;
740
741 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
742 return;
743
744 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
745 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
746
747 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
748 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
749 sdio_status |= TMIO_SDIO_SETBITS_MASK;
750
751 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
752
753 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
754 mmc_signal_sdio_irq(mmc);
755 }
756
757 irqreturn_t tmio_mmc_irq(int irq, void *devid)
758 {
759 struct tmio_mmc_host *host = devid;
760 unsigned int ireg, status;
761
762 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
763 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
764
765 pr_debug_status(status);
766 pr_debug_status(ireg);
767
768 /* Clear the status except the interrupt status */
769 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
770
771 if (__tmio_mmc_card_detect_irq(host, ireg, status))
772 return IRQ_HANDLED;
773 if (__tmio_mmc_sdcard_irq(host, ireg, status))
774 return IRQ_HANDLED;
775
776 __tmio_mmc_sdio_irq(host);
777
778 return IRQ_HANDLED;
779 }
780 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
781
782 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
783 struct mmc_data *data)
784 {
785 struct tmio_mmc_data *pdata = host->pdata;
786
787 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
788 data->blksz, data->blocks);
789
790 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
791 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
792 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
793 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
794
795 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
796 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
797 mmc_hostname(host->mmc), data->blksz);
798 return -EINVAL;
799 }
800 }
801
802 tmio_mmc_init_sg(host, data);
803 host->data = data;
804
805 /* Set transfer length / blocksize */
806 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
807 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
808
809 tmio_mmc_start_dma(host, data);
810
811 return 0;
812 }
813
814 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
815 {
816 struct tmio_mmc_host *host = mmc_priv(mmc);
817
818 if (host->hw_reset)
819 host->hw_reset(host);
820 }
821
822 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
823 {
824 struct tmio_mmc_host *host = mmc_priv(mmc);
825 int i, ret = 0;
826
827 if (!host->init_tuning || !host->select_tuning)
828 /* Tuning is not supported */
829 goto out;
830
831 host->tap_num = host->init_tuning(host);
832 if (!host->tap_num)
833 /* Tuning is not supported */
834 goto out;
835
836 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
837 dev_warn_once(&host->pdev->dev,
838 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
839 goto out;
840 }
841
842 bitmap_zero(host->taps, host->tap_num * 2);
843
844 /* Issue CMD19 twice for each tap */
845 for (i = 0; i < 2 * host->tap_num; i++) {
846 if (host->prepare_tuning)
847 host->prepare_tuning(host, i % host->tap_num);
848
849 ret = mmc_send_tuning(mmc, opcode, NULL);
850 if (ret && ret != -EILSEQ)
851 goto out;
852 if (ret == 0)
853 set_bit(i, host->taps);
854
855 mdelay(1);
856 }
857
858 ret = host->select_tuning(host);
859
860 out:
861 if (ret < 0) {
862 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
863 tmio_mmc_hw_reset(mmc);
864 }
865
866 return ret;
867 }
868
869 static void tmio_process_mrq(struct tmio_mmc_host *host,
870 struct mmc_request *mrq)
871 {
872 struct mmc_command *cmd;
873 int ret;
874
875 if (mrq->sbc && host->cmd != mrq->sbc) {
876 cmd = mrq->sbc;
877 } else {
878 cmd = mrq->cmd;
879 if (mrq->data) {
880 ret = tmio_mmc_start_data(host, mrq->data);
881 if (ret)
882 goto fail;
883 }
884 }
885
886 ret = tmio_mmc_start_command(host, cmd);
887 if (ret)
888 goto fail;
889
890 schedule_delayed_work(&host->delayed_reset_work,
891 msecs_to_jiffies(CMDREQ_TIMEOUT));
892 return;
893
894 fail:
895 host->force_pio = false;
896 host->mrq = NULL;
897 mrq->cmd->error = ret;
898 mmc_request_done(host->mmc, mrq);
899 }
900
901 /* Process requests from the MMC layer */
902 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
903 {
904 struct tmio_mmc_host *host = mmc_priv(mmc);
905 unsigned long flags;
906
907 spin_lock_irqsave(&host->lock, flags);
908
909 if (host->mrq) {
910 pr_debug("request not null\n");
911 if (IS_ERR(host->mrq)) {
912 spin_unlock_irqrestore(&host->lock, flags);
913 mrq->cmd->error = -EAGAIN;
914 mmc_request_done(mmc, mrq);
915 return;
916 }
917 }
918
919 host->last_req_ts = jiffies;
920 wmb();
921 host->mrq = mrq;
922
923 spin_unlock_irqrestore(&host->lock, flags);
924
925 tmio_process_mrq(host, mrq);
926 }
927
928 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
929 {
930 struct mmc_request *mrq;
931 unsigned long flags;
932
933 spin_lock_irqsave(&host->lock, flags);
934
935 mrq = host->mrq;
936 if (IS_ERR_OR_NULL(mrq)) {
937 spin_unlock_irqrestore(&host->lock, flags);
938 return;
939 }
940
941 /* If not SET_BLOCK_COUNT, clear old data */
942 if (host->cmd != mrq->sbc) {
943 host->cmd = NULL;
944 host->data = NULL;
945 host->force_pio = false;
946 host->mrq = NULL;
947 }
948
949 cancel_delayed_work(&host->delayed_reset_work);
950
951 spin_unlock_irqrestore(&host->lock, flags);
952
953 if (mrq->cmd->error || (mrq->data && mrq->data->error))
954 tmio_mmc_abort_dma(host);
955
956 if (host->check_scc_error)
957 host->check_scc_error(host);
958
959 /* If SET_BLOCK_COUNT, continue with main command */
960 if (host->mrq) {
961 tmio_process_mrq(host, mrq);
962 return;
963 }
964
965 mmc_request_done(host->mmc, mrq);
966 }
967
968 static void tmio_mmc_done_work(struct work_struct *work)
969 {
970 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
971 done);
972 tmio_mmc_finish_request(host);
973 }
974
975 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
976 {
977 if (!host->clk_enable)
978 return -ENOTSUPP;
979
980 return host->clk_enable(host);
981 }
982
983 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
984 {
985 if (host->clk_disable)
986 host->clk_disable(host);
987 }
988
989 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
990 {
991 struct mmc_host *mmc = host->mmc;
992 int ret = 0;
993
994 /* .set_ios() is returning void, so, no chance to report an error */
995
996 if (host->set_pwr)
997 host->set_pwr(host->pdev, 1);
998
999 if (!IS_ERR(mmc->supply.vmmc)) {
1000 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
1001 /*
1002 * Attention: empiric value. With a b43 WiFi SDIO card this
1003 * delay proved necessary for reliable card-insertion probing.
1004 * 100us were not enough. Is this the same 140us delay, as in
1005 * tmio_mmc_set_ios()?
1006 */
1007 udelay(200);
1008 }
1009 /*
1010 * It seems, VccQ should be switched on after Vcc, this is also what the
1011 * omap_hsmmc.c driver does.
1012 */
1013 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
1014 ret = regulator_enable(mmc->supply.vqmmc);
1015 udelay(200);
1016 }
1017
1018 if (ret < 0)
1019 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
1020 ret);
1021 }
1022
1023 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
1024 {
1025 struct mmc_host *mmc = host->mmc;
1026
1027 if (!IS_ERR(mmc->supply.vqmmc))
1028 regulator_disable(mmc->supply.vqmmc);
1029
1030 if (!IS_ERR(mmc->supply.vmmc))
1031 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
1032
1033 if (host->set_pwr)
1034 host->set_pwr(host->pdev, 0);
1035 }
1036
1037 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
1038 unsigned char bus_width)
1039 {
1040 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
1041 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
1042
1043 /* reg now applies to MMC_BUS_WIDTH_4 */
1044 if (bus_width == MMC_BUS_WIDTH_1)
1045 reg |= CARD_OPT_WIDTH;
1046 else if (bus_width == MMC_BUS_WIDTH_8)
1047 reg |= CARD_OPT_WIDTH8;
1048
1049 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
1050 }
1051
1052 /* Set MMC clock / power.
1053 * Note: This controller uses a simple divider scheme therefore it cannot
1054 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
1055 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
1056 * slowest setting.
1057 */
1058 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1059 {
1060 struct tmio_mmc_host *host = mmc_priv(mmc);
1061 struct device *dev = &host->pdev->dev;
1062 unsigned long flags;
1063
1064 mutex_lock(&host->ios_lock);
1065
1066 spin_lock_irqsave(&host->lock, flags);
1067 if (host->mrq) {
1068 if (IS_ERR(host->mrq)) {
1069 dev_dbg(dev,
1070 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1071 current->comm, task_pid_nr(current),
1072 ios->clock, ios->power_mode);
1073 host->mrq = ERR_PTR(-EINTR);
1074 } else {
1075 dev_dbg(dev,
1076 "%s.%d: CMD%u active since %lu, now %lu!\n",
1077 current->comm, task_pid_nr(current),
1078 host->mrq->cmd->opcode, host->last_req_ts,
1079 jiffies);
1080 }
1081 spin_unlock_irqrestore(&host->lock, flags);
1082
1083 mutex_unlock(&host->ios_lock);
1084 return;
1085 }
1086
1087 host->mrq = ERR_PTR(-EBUSY);
1088
1089 spin_unlock_irqrestore(&host->lock, flags);
1090
1091 switch (ios->power_mode) {
1092 case MMC_POWER_OFF:
1093 tmio_mmc_power_off(host);
1094 tmio_mmc_clk_stop(host);
1095 break;
1096 case MMC_POWER_UP:
1097 tmio_mmc_power_on(host, ios->vdd);
1098 tmio_mmc_set_clock(host, ios->clock);
1099 tmio_mmc_set_bus_width(host, ios->bus_width);
1100 break;
1101 case MMC_POWER_ON:
1102 tmio_mmc_set_clock(host, ios->clock);
1103 tmio_mmc_set_bus_width(host, ios->bus_width);
1104 break;
1105 }
1106
1107 /* Let things settle. delay taken from winCE driver */
1108 udelay(140);
1109 if (PTR_ERR(host->mrq) == -EINTR)
1110 dev_dbg(&host->pdev->dev,
1111 "%s.%d: IOS interrupted: clk %u, mode %u",
1112 current->comm, task_pid_nr(current),
1113 ios->clock, ios->power_mode);
1114 host->mrq = NULL;
1115
1116 host->clk_cache = ios->clock;
1117
1118 mutex_unlock(&host->ios_lock);
1119 }
1120
1121 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1122 {
1123 struct tmio_mmc_host *host = mmc_priv(mmc);
1124 struct tmio_mmc_data *pdata = host->pdata;
1125 int ret = mmc_gpio_get_ro(mmc);
1126
1127 if (ret >= 0)
1128 return ret;
1129
1130 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1131 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1132
1133 return ret;
1134 }
1135
1136 static int tmio_multi_io_quirk(struct mmc_card *card,
1137 unsigned int direction, int blk_size)
1138 {
1139 struct tmio_mmc_host *host = mmc_priv(card->host);
1140
1141 if (host->multi_io_quirk)
1142 return host->multi_io_quirk(card, direction, blk_size);
1143
1144 return blk_size;
1145 }
1146
1147 static struct mmc_host_ops tmio_mmc_ops = {
1148 .request = tmio_mmc_request,
1149 .set_ios = tmio_mmc_set_ios,
1150 .get_ro = tmio_mmc_get_ro,
1151 .get_cd = mmc_gpio_get_cd,
1152 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1153 .multi_io_quirk = tmio_multi_io_quirk,
1154 .hw_reset = tmio_mmc_hw_reset,
1155 .execute_tuning = tmio_mmc_execute_tuning,
1156 };
1157
1158 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1159 {
1160 struct tmio_mmc_data *pdata = host->pdata;
1161 struct mmc_host *mmc = host->mmc;
1162
1163 mmc_regulator_get_supply(mmc);
1164
1165 /* use ocr_mask if no regulator */
1166 if (!mmc->ocr_avail)
1167 mmc->ocr_avail = pdata->ocr_mask;
1168
1169 /*
1170 * try again.
1171 * There is possibility that regulator has not been probed
1172 */
1173 if (!mmc->ocr_avail)
1174 return -EPROBE_DEFER;
1175
1176 return 0;
1177 }
1178
1179 static void tmio_mmc_of_parse(struct platform_device *pdev,
1180 struct tmio_mmc_data *pdata)
1181 {
1182 const struct device_node *np = pdev->dev.of_node;
1183
1184 if (!np)
1185 return;
1186
1187 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1188 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1189 }
1190
1191 struct tmio_mmc_host*
1192 tmio_mmc_host_alloc(struct platform_device *pdev)
1193 {
1194 struct tmio_mmc_host *host;
1195 struct mmc_host *mmc;
1196
1197 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1198 if (!mmc)
1199 return NULL;
1200
1201 host = mmc_priv(mmc);
1202 host->mmc = mmc;
1203 host->pdev = pdev;
1204
1205 return host;
1206 }
1207 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1208
1209 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1210 {
1211 mmc_free_host(host->mmc);
1212 }
1213 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1214
1215 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1216 struct tmio_mmc_data *pdata,
1217 const struct tmio_mmc_dma_ops *dma_ops)
1218 {
1219 struct platform_device *pdev = _host->pdev;
1220 struct mmc_host *mmc = _host->mmc;
1221 struct resource *res_ctl;
1222 int ret;
1223 u32 irq_mask = TMIO_MASK_CMD;
1224
1225 tmio_mmc_of_parse(pdev, pdata);
1226
1227 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1228 _host->write16_hook = NULL;
1229
1230 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1231 if (!res_ctl)
1232 return -EINVAL;
1233
1234 ret = mmc_of_parse(mmc);
1235 if (ret < 0)
1236 return ret;
1237
1238 _host->pdata = pdata;
1239 platform_set_drvdata(pdev, mmc);
1240
1241 _host->set_pwr = pdata->set_pwr;
1242 _host->set_clk_div = pdata->set_clk_div;
1243
1244 ret = tmio_mmc_init_ocr(_host);
1245 if (ret < 0)
1246 return ret;
1247
1248 _host->ctl = devm_ioremap(&pdev->dev,
1249 res_ctl->start, resource_size(res_ctl));
1250 if (!_host->ctl)
1251 return -ENOMEM;
1252
1253 tmio_mmc_ops.card_busy = _host->card_busy;
1254 tmio_mmc_ops.start_signal_voltage_switch =
1255 _host->start_signal_voltage_switch;
1256 mmc->ops = &tmio_mmc_ops;
1257
1258 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1259 mmc->caps2 |= pdata->capabilities2;
1260 mmc->max_segs = pdata->max_segs ? : 32;
1261 mmc->max_blk_size = 512;
1262 mmc->max_blk_count = pdata->max_blk_count ? :
1263 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1264 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1265 mmc->max_seg_size = mmc->max_req_size;
1266
1267 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1268 mmc->caps & MMC_CAP_NEEDS_POLL ||
1269 !mmc_card_is_removable(mmc));
1270
1271 /*
1272 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1273 * hotplug gets disabled. It seems RuntimePM related yet we need further
1274 * research. Since we are planning a PM overhaul anyway, let's enforce
1275 * for now the device being active by enabling native hotplug always.
1276 */
1277 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1278 _host->native_hotplug = true;
1279
1280 if (tmio_mmc_clk_enable(_host) < 0) {
1281 mmc->f_max = pdata->hclk;
1282 mmc->f_min = mmc->f_max / 512;
1283 }
1284
1285 /*
1286 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1287 * looping forever...
1288 */
1289 if (mmc->f_min == 0)
1290 return -EINVAL;
1291
1292 /*
1293 * While using internal tmio hardware logic for card detection, we need
1294 * to ensure it stays powered for it to work.
1295 */
1296 if (_host->native_hotplug)
1297 pm_runtime_get_noresume(&pdev->dev);
1298
1299 _host->sdio_irq_enabled = false;
1300 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1301 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1302
1303 tmio_mmc_clk_stop(_host);
1304 tmio_mmc_reset(_host);
1305
1306 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1307 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1308
1309 /* Unmask the IRQs we want to know about */
1310 if (!_host->chan_rx)
1311 irq_mask |= TMIO_MASK_READOP;
1312 if (!_host->chan_tx)
1313 irq_mask |= TMIO_MASK_WRITEOP;
1314 if (!_host->native_hotplug)
1315 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1316
1317 _host->sdcard_irq_mask &= ~irq_mask;
1318
1319 spin_lock_init(&_host->lock);
1320 mutex_init(&_host->ios_lock);
1321
1322 /* Init delayed work for request timeouts */
1323 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1324 INIT_WORK(&_host->done, tmio_mmc_done_work);
1325
1326 /* See if we also get DMA */
1327 _host->dma_ops = dma_ops;
1328 tmio_mmc_request_dma(_host, pdata);
1329
1330 pm_runtime_set_active(&pdev->dev);
1331 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1332 pm_runtime_use_autosuspend(&pdev->dev);
1333 pm_runtime_enable(&pdev->dev);
1334
1335 ret = mmc_add_host(mmc);
1336 if (ret < 0) {
1337 tmio_mmc_host_remove(_host);
1338 return ret;
1339 }
1340
1341 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1342
1343 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1344 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1345 if (ret < 0) {
1346 tmio_mmc_host_remove(_host);
1347 return ret;
1348 }
1349 mmc_gpiod_request_cd_irq(mmc);
1350 }
1351
1352 return 0;
1353 }
1354 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1355
1356 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1357 {
1358 struct platform_device *pdev = host->pdev;
1359 struct mmc_host *mmc = host->mmc;
1360
1361 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1362 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1363
1364 if (!host->native_hotplug)
1365 pm_runtime_get_sync(&pdev->dev);
1366
1367 dev_pm_qos_hide_latency_limit(&pdev->dev);
1368
1369 mmc_remove_host(mmc);
1370 cancel_work_sync(&host->done);
1371 cancel_delayed_work_sync(&host->delayed_reset_work);
1372 tmio_mmc_release_dma(host);
1373
1374 pm_runtime_put_sync(&pdev->dev);
1375 pm_runtime_disable(&pdev->dev);
1376
1377 tmio_mmc_clk_disable(host);
1378 }
1379 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1380
1381 #ifdef CONFIG_PM
1382 int tmio_mmc_host_runtime_suspend(struct device *dev)
1383 {
1384 struct mmc_host *mmc = dev_get_drvdata(dev);
1385 struct tmio_mmc_host *host = mmc_priv(mmc);
1386
1387 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1388
1389 if (host->clk_cache)
1390 tmio_mmc_clk_stop(host);
1391
1392 tmio_mmc_clk_disable(host);
1393
1394 return 0;
1395 }
1396 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1397
1398 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1399 {
1400 return host->tap_num && mmc_can_retune(host->mmc);
1401 }
1402
1403 int tmio_mmc_host_runtime_resume(struct device *dev)
1404 {
1405 struct mmc_host *mmc = dev_get_drvdata(dev);
1406 struct tmio_mmc_host *host = mmc_priv(mmc);
1407
1408 tmio_mmc_reset(host);
1409 tmio_mmc_clk_enable(host);
1410
1411 if (host->clk_cache)
1412 tmio_mmc_set_clock(host, host->clk_cache);
1413
1414 tmio_mmc_enable_dma(host, true);
1415
1416 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1417 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1418
1419 return 0;
1420 }
1421 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1422 #endif
1423
1424 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support