drivers/pinctrl/sh-pfc/pinctrl.c

   1 /*
   2  * SuperH Pin Function Controller pinmux support.
   3  *
   4  * Copyright (C) 2012  Paul Mundt
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #define DRV_NAME "sh-pfc"
  12
  13 #include <linux/device.h>
  14 #include <linux/err.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/of.h>
  18 #include <linux/pinctrl/consumer.h>
  19 #include <linux/pinctrl/machine.h>
  20 #include <linux/pinctrl/pinconf.h>
  21 #include <linux/pinctrl/pinconf-generic.h>
  22 #include <linux/pinctrl/pinctrl.h>
  23 #include <linux/pinctrl/pinmux.h>
  24 #include <linux/slab.h>
  25 #include <linux/spinlock.h>
  26
  27 #include "core.h"
  28 #include "../core.h"
  29 #include "../pinconf.h"
  30
  31 struct sh_pfc_pin_config {
  32         u32 type;
  33 };
  34
  35 struct sh_pfc_pinctrl {
  36         struct pinctrl_dev *pctl;
  37         struct pinctrl_desc pctl_desc;
  38
  39         struct sh_pfc *pfc;
  40
  41         struct pinctrl_pin_desc *pins;
  42         struct sh_pfc_pin_config *configs;
  43
  44         const char *func_prop_name;
  45         const char *groups_prop_name;
  46         const char *pins_prop_name;
  47 };
  48
  49 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
  50 {
  51         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  52
  53         return pmx->pfc->info->nr_groups;
  54 }
  55
  56 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
  57                                          unsigned selector)
  58 {
  59         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  60
  61         return pmx->pfc->info->groups[selector].name;
  62 }
  63
  64 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
  65                                  const unsigned **pins, unsigned *num_pins)
  66 {
  67         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  68
  69         *pins = pmx->pfc->info->groups[selector].pins;
  70         *num_pins = pmx->pfc->info->groups[selector].nr_pins;
  71
  72         return 0;
  73 }
  74
  75 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  76                                 unsigned offset)
  77 {
  78         seq_printf(s, "%s", DRV_NAME);
  79 }
  80
  81 #ifdef CONFIG_OF
  82 static int sh_pfc_map_add_config(struct pinctrl_map *map,
  83                                  const char *group_or_pin,
  84                                  enum pinctrl_map_type type,
  85                                  unsigned long *configs,
  86                                  unsigned int num_configs)
  87 {
  88         unsigned long *cfgs;
  89
  90         cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
  91                        GFP_KERNEL);
  92         if (cfgs == NULL)
  93                 return -ENOMEM;
  94
  95         map->type = type;
  96         map->data.configs.group_or_pin = group_or_pin;
  97         map->data.configs.configs = cfgs;
  98         map->data.configs.num_configs = num_configs;
  99
 100         return 0;
 101 }
 102
 103 static int sh_pfc_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 104                                     struct device_node *np,
 105                                     struct pinctrl_map **map,
 106                                     unsigned int *num_maps, unsigned int *index)
 107 {
 108         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 109         struct device *dev = pmx->pfc->dev;
 110         struct pinctrl_map *maps = *map;
 111         unsigned int nmaps = *num_maps;
 112         unsigned int idx = *index;
 113         unsigned int num_configs;
 114         const char *function = NULL;
 115         unsigned long *configs;
 116         struct property *prop;
 117         unsigned int num_groups;
 118         unsigned int num_pins;
 119         const char *group;
 120         const char *pin;
 121         int ret;
 122
 123         /* Support both the old Renesas-specific properties and the new standard
 124          * properties. Mixing old and new properties isn't allowed, neither
 125          * inside a subnode nor across subnodes.
 126          */
 127         if (!pmx->func_prop_name) {
 128                 if (of_find_property(np, "groups", NULL) ||
 129                     of_find_property(np, "pins", NULL)) {
 130                         pmx->func_prop_name = "function";
 131                         pmx->groups_prop_name = "groups";
 132                         pmx->pins_prop_name = "pins";
 133                 } else {
 134                         pmx->func_prop_name = "renesas,function";
 135                         pmx->groups_prop_name = "renesas,groups";
 136                         pmx->pins_prop_name = "renesas,pins";
 137                 }
 138         }
 139
 140         /* Parse the function and configuration properties. At least a function
 141          * or one configuration must be specified.
 142          */
 143         ret = of_property_read_string(np, pmx->func_prop_name, &function);
 144         if (ret < 0 && ret != -EINVAL) {
 145                 dev_err(dev, "Invalid function in DT\n");
 146                 return ret;
 147         }
 148
 149         ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs);
 150         if (ret < 0)
 151                 return ret;
 152
 153         if (!function && num_configs == 0) {
 154                 dev_err(dev,
 155                         "DT node must contain at least a function or config\n");
 156                 ret = -ENODEV;
 157                 goto done;
 158         }
 159
 160         /* Count the number of pins and groups and reallocate mappings. */
 161         ret = of_property_count_strings(np, pmx->pins_prop_name);
 162         if (ret == -EINVAL) {
 163                 num_pins = 0;
 164         } else if (ret < 0) {
 165                 dev_err(dev, "Invalid pins list in DT\n");
 166                 goto done;
 167         } else {
 168                 num_pins = ret;
 169         }
 170
 171         ret = of_property_count_strings(np, pmx->groups_prop_name);
 172         if (ret == -EINVAL) {
 173                 num_groups = 0;
 174         } else if (ret < 0) {
 175                 dev_err(dev, "Invalid pin groups list in DT\n");
 176                 goto done;
 177         } else {
 178                 num_groups = ret;
 179         }
 180
 181         if (!num_pins && !num_groups) {
 182                 dev_err(dev, "No pin or group provided in DT node\n");
 183                 ret = -ENODEV;
 184                 goto done;
 185         }
 186
 187         if (function)
 188                 nmaps += num_groups;
 189         if (configs)
 190                 nmaps += num_pins + num_groups;
 191
 192         maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
 193         if (maps == NULL) {
 194                 ret = -ENOMEM;
 195                 goto done;
 196         }
 197
 198         *map = maps;
 199         *num_maps = nmaps;
 200
 201         /* Iterate over pins and groups and create the mappings. */
 202         of_property_for_each_string(np, pmx->groups_prop_name, prop, group) {
 203                 if (function) {
 204                         maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
 205                         maps[idx].data.mux.group = group;
 206                         maps[idx].data.mux.function = function;
 207                         idx++;
 208                 }
 209
 210                 if (configs) {
 211                         ret = sh_pfc_map_add_config(&maps[idx], group,
 212                                                     PIN_MAP_TYPE_CONFIGS_GROUP,
 213                                                     configs, num_configs);
 214                         if (ret < 0)
 215                                 goto done;
 216
 217                         idx++;
 218                 }
 219         }
 220
 221         if (!configs) {
 222                 ret = 0;
 223                 goto done;
 224         }
 225
 226         of_property_for_each_string(np, pmx->pins_prop_name, prop, pin) {
 227                 ret = sh_pfc_map_add_config(&maps[idx], pin,
 228                                             PIN_MAP_TYPE_CONFIGS_PIN,
 229                                             configs, num_configs);
 230                 if (ret < 0)
 231                         goto done;
 232
 233                 idx++;
 234         }
 235
 236 done:
 237         *index = idx;
 238         kfree(configs);
 239         return ret;
 240 }
 241
 242 static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
 243                                struct pinctrl_map *map, unsigned num_maps)
 244 {
 245         unsigned int i;
 246
 247         if (map == NULL)
 248                 return;
 249
 250         for (i = 0; i < num_maps; ++i) {
 251                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
 252                     map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
 253                         kfree(map[i].data.configs.configs);
 254         }
 255
 256         kfree(map);
 257 }
 258
 259 static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
 260                                  struct device_node *np,
 261                                  struct pinctrl_map **map, unsigned *num_maps)
 262 {
 263         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 264         struct device *dev = pmx->pfc->dev;
 265         struct device_node *child;
 266         unsigned int index;
 267         int ret;
 268
 269         *map = NULL;
 270         *num_maps = 0;
 271         index = 0;
 272
 273         for_each_child_of_node(np, child) {
 274                 ret = sh_pfc_dt_subnode_to_map(pctldev, child, map, num_maps,
 275                                                &index);
 276                 if (ret < 0) {
 277                         of_node_put(child);
 278                         goto done;
 279                 }
 280         }
 281
 282         /* If no mapping has been found in child nodes try the config node. */
 283         if (*num_maps == 0) {
 284                 ret = sh_pfc_dt_subnode_to_map(pctldev, np, map, num_maps,
 285                                                &index);
 286                 if (ret < 0)
 287                         goto done;
 288         }
 289
 290         if (*num_maps)
 291                 return 0;
 292
 293         dev_err(dev, "no mapping found in node %pOF\n", np);
 294         ret = -EINVAL;
 295
 296 done:
 297         if (ret < 0)
 298                 sh_pfc_dt_free_map(pctldev, *map, *num_maps);
 299
 300         return ret;
 301 }
 302 #endif /* CONFIG_OF */
 303
 304 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
 305         .get_groups_count       = sh_pfc_get_groups_count,
 306         .get_group_name         = sh_pfc_get_group_name,
 307         .get_group_pins         = sh_pfc_get_group_pins,
 308         .pin_dbg_show           = sh_pfc_pin_dbg_show,
 309 #ifdef CONFIG_OF
 310         .dt_node_to_map         = sh_pfc_dt_node_to_map,
 311         .dt_free_map            = sh_pfc_dt_free_map,
 312 #endif
 313 };
 314
 315 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
 316 {
 317         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 318
 319         return pmx->pfc->info->nr_functions;
 320 }
 321
 322 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
 323                                             unsigned selector)
 324 {
 325         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 326
 327         return pmx->pfc->info->functions[selector].name;
 328 }
 329
 330 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
 331                                       unsigned selector,
 332                                       const char * const **groups,
 333                                       unsigned * const num_groups)
 334 {
 335         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 336
 337         *groups = pmx->pfc->info->functions[selector].groups;
 338         *num_groups = pmx->pfc->info->functions[selector].nr_groups;
 339
 340         return 0;
 341 }
 342
 343 static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
 344                                unsigned group)
 345 {
 346         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 347         struct sh_pfc *pfc = pmx->pfc;
 348         const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
 349         unsigned long flags;
 350         unsigned int i;
 351         int ret = 0;
 352
 353         spin_lock_irqsave(&pfc->lock, flags);
 354
 355         for (i = 0; i < grp->nr_pins; ++i) {
 356                 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
 357                 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 358
 359                 if (cfg->type != PINMUX_TYPE_NONE) {
 360                         ret = -EBUSY;
 361                         goto done;
 362                 }
 363         }
 364
 365         for (i = 0; i < grp->nr_pins; ++i) {
 366                 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
 367                 if (ret < 0)
 368                         break;
 369         }
 370
 371 done:
 372         spin_unlock_irqrestore(&pfc->lock, flags);
 373         return ret;
 374 }
 375
 376 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
 377                                       struct pinctrl_gpio_range *range,
 378                                       unsigned offset)
 379 {
 380         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 381         struct sh_pfc *pfc = pmx->pfc;
 382         int idx = sh_pfc_get_pin_index(pfc, offset);
 383         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 384         unsigned long flags;
 385         int ret;
 386
 387         spin_lock_irqsave(&pfc->lock, flags);
 388
 389         if (cfg->type != PINMUX_TYPE_NONE) {
 390                 dev_err(pfc->dev,
 391                         "Pin %u is busy, can't configure it as GPIO.\n",
 392                         offset);
 393                 ret = -EBUSY;
 394                 goto done;
 395         }
 396
 397         if (!pfc->gpio) {
 398                 /* If GPIOs are handled externally the pin mux type need to be
 399                  * set to GPIO here.
 400                  */
 401                 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 402
 403                 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
 404                 if (ret < 0)
 405                         goto done;
 406         }
 407
 408         cfg->type = PINMUX_TYPE_GPIO;
 409
 410         ret = 0;
 411
 412 done:
 413         spin_unlock_irqrestore(&pfc->lock, flags);
 414
 415         return ret;
 416 }
 417
 418 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
 419                                      struct pinctrl_gpio_range *range,
 420                                      unsigned offset)
 421 {
 422         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 423         struct sh_pfc *pfc = pmx->pfc;
 424         int idx = sh_pfc_get_pin_index(pfc, offset);
 425         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 426         unsigned long flags;
 427
 428         spin_lock_irqsave(&pfc->lock, flags);
 429         cfg->type = PINMUX_TYPE_NONE;
 430         spin_unlock_irqrestore(&pfc->lock, flags);
 431 }
 432
 433 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
 434                                      struct pinctrl_gpio_range *range,
 435                                      unsigned offset, bool input)
 436 {
 437         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 438         struct sh_pfc *pfc = pmx->pfc;
 439         int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
 440         int idx = sh_pfc_get_pin_index(pfc, offset);
 441         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 442         struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
 443         unsigned long flags;
 444         unsigned int dir;
 445         int ret;
 446
 447         /* Check if the requested direction is supported by the pin. Not all SoC
 448          * provide pin config data, so perform the check conditionally.
 449          */
 450         if (pin->configs) {
 451                 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;
 452                 if (!(pin->configs & dir))
 453                         return -EINVAL;
 454         }
 455
 456         spin_lock_irqsave(&pfc->lock, flags);
 457
 458         ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
 459         if (ret < 0)
 460                 goto done;
 461
 462         cfg->type = new_type;
 463
 464 done:
 465         spin_unlock_irqrestore(&pfc->lock, flags);
 466         return ret;
 467 }
 468
 469 static const struct pinmux_ops sh_pfc_pinmux_ops = {
 470         .get_functions_count    = sh_pfc_get_functions_count,
 471         .get_function_name      = sh_pfc_get_function_name,
 472         .get_function_groups    = sh_pfc_get_function_groups,
 473         .set_mux                = sh_pfc_func_set_mux,
 474         .gpio_request_enable    = sh_pfc_gpio_request_enable,
 475         .gpio_disable_free      = sh_pfc_gpio_disable_free,
 476         .gpio_set_direction     = sh_pfc_gpio_set_direction,
 477 };
 478
 479 static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,
 480                 unsigned int pin, unsigned int *offset, unsigned int *size)
 481 {
 482         const struct pinmux_drive_reg_field *field;
 483         const struct pinmux_drive_reg *reg;
 484         unsigned int i;
 485
 486         for (reg = pfc->info->drive_regs; reg->reg; ++reg) {
 487                 for (i = 0; i < ARRAY_SIZE(reg->fields); ++i) {
 488                         field = &reg->fields[i];
 489
 490                         if (field->size && field->pin == pin) {
 491                                 *offset = field->offset;
 492                                 *size = field->size;
 493
 494                                 return reg->reg;
 495                         }
 496                 }
 497         }
 498
 499         return 0;
 500 }
 501
 502 static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
 503                                              unsigned int pin)
 504 {
 505         unsigned long flags;
 506         unsigned int offset;
 507         unsigned int size;
 508         u32 reg;
 509         u32 val;
 510
 511         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 512         if (!reg)
 513                 return -EINVAL;
 514
 515         spin_lock_irqsave(&pfc->lock, flags);
 516         val = sh_pfc_read_reg(pfc, reg, 32);
 517         spin_unlock_irqrestore(&pfc->lock, flags);
 518
 519         val = (val >> offset) & GENMASK(size - 1, 0);
 520
 521         /* Convert the value to mA based on a full drive strength value of 24mA.
 522          * We can make the full value configurable later if needed.
 523          */
 524         return (val + 1) * (size == 2 ? 6 : 3);
 525 }
 526
 527 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
 528                                              unsigned int pin, u16 strength)
 529 {
 530         unsigned long flags;
 531         unsigned int offset;
 532         unsigned int size;
 533         unsigned int step;
 534         u32 reg;
 535         u32 val;
 536
 537         reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
 538         if (!reg)
 539                 return -EINVAL;
 540
 541         step = size == 2 ? 6 : 3;
 542
 543         if (strength < step || strength > 24)
 544                 return -EINVAL;
 545
 546         /* Convert the value from mA based on a full drive strength value of
 547          * 24mA. We can make the full value configurable later if needed.
 548          */
 549         strength = strength / step - 1;
 550
 551         spin_lock_irqsave(&pfc->lock, flags);
 552
 553         val = sh_pfc_read_reg(pfc, reg, 32);
 554         val &= ~GENMASK(offset + size - 1, offset);
 555         val |= strength << offset;
 556
 557         sh_pfc_write_reg(pfc, reg, 32, val);
 558
 559         spin_unlock_irqrestore(&pfc->lock, flags);
 560
 561         return 0;
 562 }
 563
 564 /* Check whether the requested parameter is supported for a pin. */
 565 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
 566                                     enum pin_config_param param)
 567 {
 568         int idx = sh_pfc_get_pin_index(pfc, _pin);
 569         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
 570
 571         switch (param) {
 572         case PIN_CONFIG_BIAS_DISABLE:
 573                 return pin->configs &
 574                         (SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN);
 575
 576         case PIN_CONFIG_BIAS_PULL_UP:
 577                 return pin->configs & SH_PFC_PIN_CFG_PULL_UP;
 578
 579         case PIN_CONFIG_BIAS_PULL_DOWN:
 580                 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN;
 581
 582         case PIN_CONFIG_DRIVE_STRENGTH:
 583                 return pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH;
 584
 585         case PIN_CONFIG_POWER_SOURCE:
 586                 return pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE;
 587
 588         default:
 589                 return false;
 590         }
 591 }
 592
 593 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
 594                               unsigned long *config)
 595 {
 596         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 597         struct sh_pfc *pfc = pmx->pfc;
 598         enum pin_config_param param = pinconf_to_config_param(*config);
 599         unsigned long flags;
 600         unsigned int arg;
 601
 602         if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 603                 return -ENOTSUPP;
 604
 605         switch (param) {
 606         case PIN_CONFIG_BIAS_DISABLE:
 607         case PIN_CONFIG_BIAS_PULL_UP:
 608         case PIN_CONFIG_BIAS_PULL_DOWN: {
 609                 unsigned int bias;
 610
 611                 if (!pfc->info->ops || !pfc->info->ops->get_bias)
 612                         return -ENOTSUPP;
 613
 614                 spin_lock_irqsave(&pfc->lock, flags);
 615                 bias = pfc->info->ops->get_bias(pfc, _pin);
 616                 spin_unlock_irqrestore(&pfc->lock, flags);
 617
 618                 if (bias != param)
 619                         return -EINVAL;
 620
 621                 arg = 0;
 622                 break;
 623         }
 624
 625         case PIN_CONFIG_DRIVE_STRENGTH: {
 626                 int ret;
 627
 628                 ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin);
 629                 if (ret < 0)
 630                         return ret;
 631
 632                 arg = ret;
 633                 break;
 634         }
 635
 636         case PIN_CONFIG_POWER_SOURCE: {
 637                 u32 pocctrl, val;
 638                 int bit;
 639
 640                 if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 641                         return -ENOTSUPP;
 642
 643                 bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 644                 if (WARN(bit < 0, "invalid pin %#x", _pin))
 645                         return bit;
 646
 647                 spin_lock_irqsave(&pfc->lock, flags);
 648                 val = sh_pfc_read_reg(pfc, pocctrl, 32);
 649                 spin_unlock_irqrestore(&pfc->lock, flags);
 650
 651                 arg = (val & BIT(bit)) ? 3300 : 1800;
 652                 break;
 653         }
 654
 655         default:
 656                 return -ENOTSUPP;
 657         }
 658
 659         *config = pinconf_to_config_packed(param, arg);
 660         return 0;
 661 }
 662
 663 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
 664                               unsigned long *configs, unsigned num_configs)
 665 {
 666         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 667         struct sh_pfc *pfc = pmx->pfc;
 668         enum pin_config_param param;
 669         unsigned long flags;
 670         unsigned int i;
 671
 672         for (i = 0; i < num_configs; i++) {
 673                 param = pinconf_to_config_param(configs[i]);
 674
 675                 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
 676                         return -ENOTSUPP;
 677
 678                 switch (param) {
 679                 case PIN_CONFIG_BIAS_PULL_UP:
 680                 case PIN_CONFIG_BIAS_PULL_DOWN:
 681                 case PIN_CONFIG_BIAS_DISABLE:
 682                         if (!pfc->info->ops || !pfc->info->ops->set_bias)
 683                                 return -ENOTSUPP;
 684
 685                         spin_lock_irqsave(&pfc->lock, flags);
 686                         pfc->info->ops->set_bias(pfc, _pin, param);
 687                         spin_unlock_irqrestore(&pfc->lock, flags);
 688
 689                         break;
 690
 691                 case PIN_CONFIG_DRIVE_STRENGTH: {
 692                         unsigned int arg =
 693                                 pinconf_to_config_argument(configs[i]);
 694                         int ret;
 695
 696                         ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);
 697                         if (ret < 0)
 698                                 return ret;
 699
 700                         break;
 701                 }
 702
 703                 case PIN_CONFIG_POWER_SOURCE: {
 704                         unsigned int mV = pinconf_to_config_argument(configs[i]);
 705                         u32 pocctrl, val;
 706                         int bit;
 707
 708                         if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
 709                                 return -ENOTSUPP;
 710
 711                         bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
 712                         if (WARN(bit < 0, "invalid pin %#x", _pin))
 713                                 return bit;
 714
 715                         if (mV != 1800 && mV != 3300)
 716                                 return -EINVAL;
 717
 718                         spin_lock_irqsave(&pfc->lock, flags);
 719                         val = sh_pfc_read_reg(pfc, pocctrl, 32);
 720                         if (mV == 3300)
 721                                 val |= BIT(bit);
 722                         else
 723                                 val &= ~BIT(bit);
 724                         sh_pfc_write_reg(pfc, pocctrl, 32, val);
 725                         spin_unlock_irqrestore(&pfc->lock, flags);
 726
 727                         break;
 728                 }
 729
 730                 default:
 731                         return -ENOTSUPP;
 732                 }
 733         } /* for each config */
 734
 735         return 0;
 736 }
 737
 738 static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
 739                                     unsigned long *configs,
 740                                     unsigned num_configs)
 741 {
 742         struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 743         const unsigned int *pins;
 744         unsigned int num_pins;
 745         unsigned int i, ret;
 746
 747         pins = pmx->pfc->info->groups[group].pins;
 748         num_pins = pmx->pfc->info->groups[group].nr_pins;
 749
 750         for (i = 0; i < num_pins; ++i) {
 751                 ret = sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs);
 752                 if (ret)
 753                         return ret;
 754         }
 755
 756         return 0;
 757 }
 758
 759 static const struct pinconf_ops sh_pfc_pinconf_ops = {
 760         .is_generic                     = true,
 761         .pin_config_get                 = sh_pfc_pinconf_get,
 762         .pin_config_set                 = sh_pfc_pinconf_set,
 763         .pin_config_group_set           = sh_pfc_pinconf_group_set,
 764         .pin_config_config_dbg_show     = pinconf_generic_dump_config,
 765 };
 766
 767 /* PFC ranges -> pinctrl pin descs */
 768 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
 769 {
 770         unsigned int i;
 771
 772         /* Allocate and initialize the pins and configs arrays. */
 773         pmx->pins = devm_kzalloc(pfc->dev,
 774                                  sizeof(*pmx->pins) * pfc->info->nr_pins,
 775                                  GFP_KERNEL);
 776         if (unlikely(!pmx->pins))
 777                 return -ENOMEM;
 778
 779         pmx->configs = devm_kzalloc(pfc->dev,
 780                                     sizeof(*pmx->configs) * pfc->info->nr_pins,
 781                                     GFP_KERNEL);
 782         if (unlikely(!pmx->configs))
 783                 return -ENOMEM;
 784
 785         for (i = 0; i < pfc->info->nr_pins; ++i) {
 786                 const struct sh_pfc_pin *info = &pfc->info->pins[i];
 787                 struct sh_pfc_pin_config *cfg = &pmx->configs[i];
 788                 struct pinctrl_pin_desc *pin = &pmx->pins[i];
 789
 790                 /* If the pin number is equal to -1 all pins are considered */
 791                 pin->number = info->pin != (u16)-1 ? info->pin : i;
 792                 pin->name = info->name;
 793                 cfg->type = PINMUX_TYPE_NONE;
 794         }
 795
 796         return 0;
 797 }
 798
 799 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
 800 {
 801         struct sh_pfc_pinctrl *pmx;
 802         int ret;
 803
 804         pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
 805         if (unlikely(!pmx))
 806                 return -ENOMEM;
 807
 808         pmx->pfc = pfc;
 809
 810         ret = sh_pfc_map_pins(pfc, pmx);
 811         if (ret < 0)
 812                 return ret;
 813
 814         pmx->pctl_desc.name = DRV_NAME;
 815         pmx->pctl_desc.owner = THIS_MODULE;
 816         pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
 817         pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
 818         pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
 819         pmx->pctl_desc.pins = pmx->pins;
 820         pmx->pctl_desc.npins = pfc->info->nr_pins;
 821
 822         ret = devm_pinctrl_register_and_init(pfc->dev, &pmx->pctl_desc, pmx,
 823                                              &pmx->pctl);
 824         if (ret) {
 825                 dev_err(pfc->dev, "could not register: %i\n", ret);
 826
 827                 return ret;
 828         }
 829
 830         return pinctrl_enable(pmx->pctl);
 831 }