drivers/w1/w1_io.c

   1 /*
   2  * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <asm/io.h>
  16
  17 #include <linux/delay.h>
  18 #include <linux/moduleparam.h>
  19 #include <linux/module.h>
  20
  21 #include "w1_internal.h"
  22
  23 static int w1_delay_parm = 1;
  24 module_param_named(delay_coef, w1_delay_parm, int, 0);
  25
  26 static int w1_disable_irqs = 0;
  27 module_param_named(disable_irqs, w1_disable_irqs, int, 0);
  28
  29 static u8 w1_crc8_table[] = {
  30         0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
  31         157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
  32         35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
  33         190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
  34         70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
  35         219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
  36         101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
  37         248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
  38         140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
  39         17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
  40         175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
  41         50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
  42         202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
  43         87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
  44         233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
  45         116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
  46 };
  47
  48 static void w1_delay(unsigned long tm)
  49 {
  50         udelay(tm * w1_delay_parm);
  51 }
  52
  53 static void w1_write_bit(struct w1_master *dev, int bit);
  54 static u8 w1_read_bit(struct w1_master *dev);
  55
  56 /**
  57  * w1_touch_bit() - Generates a write-0 or write-1 cycle and samples the level.
  58  * @dev:        the master device
  59  * @bit:        0 - write a 0, 1 - write a 0 read the level
  60  */
  61 static u8 w1_touch_bit(struct w1_master *dev, int bit)
  62 {
  63         if (dev->bus_master->touch_bit)
  64                 return dev->bus_master->touch_bit(dev->bus_master->data, bit);
  65         else if (bit)
  66                 return w1_read_bit(dev);
  67         else {
  68                 w1_write_bit(dev, 0);
  69                 return 0;
  70         }
  71 }
  72
  73 /**
  74  * w1_write_bit() - Generates a write-0 or write-1 cycle.
  75  * @dev:        the master device
  76  * @bit:        bit to write
  77  *
  78  * Only call if dev->bus_master->touch_bit is NULL
  79  */
  80 static void w1_write_bit(struct w1_master *dev, int bit)
  81 {
  82         unsigned long flags = 0;
  83
  84         if(w1_disable_irqs) local_irq_save(flags);
  85
  86         if (bit) {
  87                 dev->bus_master->write_bit(dev->bus_master->data, 0);
  88                 w1_delay(6);
  89                 dev->bus_master->write_bit(dev->bus_master->data, 1);
  90                 w1_delay(64);
  91         } else {
  92                 dev->bus_master->write_bit(dev->bus_master->data, 0);
  93                 w1_delay(60);
  94                 dev->bus_master->write_bit(dev->bus_master->data, 1);
  95                 w1_delay(10);
  96         }
  97
  98         if(w1_disable_irqs) local_irq_restore(flags);
  99 }
 100
 101 /**
 102  * w1_pre_write() - pre-write operations
 103  * @dev:        the master device
 104  *
 105  * Pre-write operation, currently only supporting strong pullups.
 106  * Program the hardware for a strong pullup, if one has been requested and
 107  * the hardware supports it.
 108  */
 109 static void w1_pre_write(struct w1_master *dev)
 110 {
 111         if (dev->pullup_duration &&
 112                 dev->enable_pullup && dev->bus_master->set_pullup) {
 113                 dev->bus_master->set_pullup(dev->bus_master->data,
 114                         dev->pullup_duration);
 115         }
 116 }
 117
 118 /**
 119  * w1_post_write() - post-write options
 120  * @dev:        the master device
 121  *
 122  * Post-write operation, currently only supporting strong pullups.
 123  * If a strong pullup was requested, clear it if the hardware supports
 124  * them, or execute the delay otherwise, in either case clear the request.
 125  */
 126 static void w1_post_write(struct w1_master *dev)
 127 {
 128         if (dev->pullup_duration) {
 129                 if (dev->enable_pullup && dev->bus_master->set_pullup)
 130                         dev->bus_master->set_pullup(dev->bus_master->data, 0);
 131                 else
 132                         msleep(dev->pullup_duration);
 133                 dev->pullup_duration = 0;
 134         }
 135 }
 136
 137 /**
 138  * w1_write_8() - Writes 8 bits.
 139  * @dev:        the master device
 140  * @byte:       the byte to write
 141  */
 142 void w1_write_8(struct w1_master *dev, u8 byte)
 143 {
 144         int i;
 145
 146         if (dev->bus_master->write_byte) {
 147                 w1_pre_write(dev);
 148                 dev->bus_master->write_byte(dev->bus_master->data, byte);
 149         }
 150         else
 151                 for (i = 0; i < 8; ++i) {
 152                         if (i == 7)
 153                                 w1_pre_write(dev);
 154                         w1_touch_bit(dev, (byte >> i) & 0x1);
 155                 }
 156         w1_post_write(dev);
 157 }
 158 EXPORT_SYMBOL_GPL(w1_write_8);
 159
 160
 161 /**
 162  * w1_read_bit() - Generates a write-1 cycle and samples the level.
 163  * @dev:        the master device
 164  *
 165  * Only call if dev->bus_master->touch_bit is NULL
 166  */
 167 static u8 w1_read_bit(struct w1_master *dev)
 168 {
 169         int result;
 170         unsigned long flags = 0;
 171
 172         /* sample timing is critical here */
 173         local_irq_save(flags);
 174         dev->bus_master->write_bit(dev->bus_master->data, 0);
 175         w1_delay(6);
 176         dev->bus_master->write_bit(dev->bus_master->data, 1);
 177         w1_delay(9);
 178
 179         result = dev->bus_master->read_bit(dev->bus_master->data);
 180         local_irq_restore(flags);
 181
 182         w1_delay(55);
 183
 184         return result & 0x1;
 185 }
 186
 187 /**
 188  * w1_triplet() - * Does a triplet - used for searching ROM addresses.
 189  * @dev:        the master device
 190  * @bdir:       the bit to write if both id_bit and comp_bit are 0
 191  *
 192  * Return bits:
 193  *  bit 0 = id_bit
 194  *  bit 1 = comp_bit
 195  *  bit 2 = dir_taken
 196  * If both bits 0 & 1 are set, the search should be restarted.
 197  *
 198  * Return:        bit fields - see above
 199  */
 200 u8 w1_triplet(struct w1_master *dev, int bdir)
 201 {
 202         if (dev->bus_master->triplet)
 203                 return dev->bus_master->triplet(dev->bus_master->data, bdir);
 204         else {
 205                 u8 id_bit   = w1_touch_bit(dev, 1);
 206                 u8 comp_bit = w1_touch_bit(dev, 1);
 207                 u8 retval;
 208
 209                 if (id_bit && comp_bit)
 210                         return 0x03;  /* error */
 211
 212                 if (!id_bit && !comp_bit) {
 213                         /* Both bits are valid, take the direction given */
 214                         retval = bdir ? 0x04 : 0;
 215                 } else {
 216                         /* Only one bit is valid, take that direction */
 217                         bdir = id_bit;
 218                         retval = id_bit ? 0x05 : 0x02;
 219                 }
 220
 221                 if (dev->bus_master->touch_bit)
 222                         w1_touch_bit(dev, bdir);
 223                 else
 224                         w1_write_bit(dev, bdir);
 225                 return retval;
 226         }
 227 }
 228 EXPORT_SYMBOL_GPL(w1_triplet);
 229
 230 /**
 231  * w1_read_8() - Reads 8 bits.
 232  * @dev:        the master device
 233  *
 234  * Return:        the byte read
 235  */
 236 u8 w1_read_8(struct w1_master *dev)
 237 {
 238         int i;
 239         u8 res = 0;
 240
 241         if (dev->bus_master->read_byte)
 242                 res = dev->bus_master->read_byte(dev->bus_master->data);
 243         else
 244                 for (i = 0; i < 8; ++i)
 245                         res |= (w1_touch_bit(dev,1) << i);
 246
 247         return res;
 248 }
 249 EXPORT_SYMBOL_GPL(w1_read_8);
 250
 251 /**
 252  * w1_write_block() - Writes a series of bytes.
 253  * @dev:        the master device
 254  * @buf:        pointer to the data to write
 255  * @len:        the number of bytes to write
 256  */
 257 void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
 258 {
 259         int i;
 260
 261         if (dev->bus_master->write_block) {
 262                 w1_pre_write(dev);
 263                 dev->bus_master->write_block(dev->bus_master->data, buf, len);
 264         }
 265         else
 266                 for (i = 0; i < len; ++i)
 267                         w1_write_8(dev, buf[i]); /* calls w1_pre_write */
 268         w1_post_write(dev);
 269 }
 270 EXPORT_SYMBOL_GPL(w1_write_block);
 271
 272 /**
 273  * w1_touch_block() - Touches a series of bytes.
 274  * @dev:        the master device
 275  * @buf:        pointer to the data to write
 276  * @len:        the number of bytes to write
 277  */
 278 void w1_touch_block(struct w1_master *dev, u8 *buf, int len)
 279 {
 280         int i, j;
 281         u8 tmp;
 282
 283         for (i = 0; i < len; ++i) {
 284                 tmp = 0;
 285                 for (j = 0; j < 8; ++j) {
 286                         if (j == 7)
 287                                 w1_pre_write(dev);
 288                         tmp |= w1_touch_bit(dev, (buf[i] >> j) & 0x1) << j;
 289                 }
 290
 291                 buf[i] = tmp;
 292         }
 293 }
 294 EXPORT_SYMBOL_GPL(w1_touch_block);
 295
 296 /**
 297  * w1_read_block() - Reads a series of bytes.
 298  * @dev:        the master device
 299  * @buf:        pointer to the buffer to fill
 300  * @len:        the number of bytes to read
 301  * Return:      the number of bytes read
 302  */
 303 u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
 304 {
 305         int i;
 306         u8 ret;
 307
 308         if (dev->bus_master->read_block)
 309                 ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
 310         else {
 311                 for (i = 0; i < len; ++i)
 312                         buf[i] = w1_read_8(dev);
 313                 ret = len;
 314         }
 315
 316         return ret;
 317 }
 318 EXPORT_SYMBOL_GPL(w1_read_block);
 319
 320 /**
 321  * w1_reset_bus() - Issues a reset bus sequence.
 322  * @dev:        the master device
 323  * Return:      0=Device present, 1=No device present or error
 324  */
 325 int w1_reset_bus(struct w1_master *dev)
 326 {
 327         int result;
 328         unsigned long flags = 0;
 329
 330         if(w1_disable_irqs) local_irq_save(flags);
 331
 332         if (dev->bus_master->reset_bus)
 333                 result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
 334         else {
 335                 dev->bus_master->write_bit(dev->bus_master->data, 0);
 336                 /* minimum 480, max ? us
 337                  * be nice and sleep, except 18b20 spec lists 960us maximum,
 338                  * so until we can sleep with microsecond accuracy, spin.
 339                  * Feel free to come up with some other way to give up the
 340                  * cpu for such a short amount of time AND get it back in
 341                  * the maximum amount of time.
 342                  */
 343                 w1_delay(500);
 344                 dev->bus_master->write_bit(dev->bus_master->data, 1);
 345                 w1_delay(70);
 346
 347                 result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
 348                 /* minimum 70 (above) + 430 = 500 us
 349                  * There aren't any timing requirements between a reset and
 350                  * the following transactions.  Sleeping is safe here.
 351                  */
 352                 /* w1_delay(430); min required time */
 353                 msleep(1);
 354         }
 355
 356         if(w1_disable_irqs) local_irq_restore(flags);
 357
 358         return result;
 359 }
 360 EXPORT_SYMBOL_GPL(w1_reset_bus);
 361
 362 u8 w1_calc_crc8(u8 * data, int len)
 363 {
 364         u8 crc = 0;
 365
 366         while (len--)
 367                 crc = w1_crc8_table[crc ^ *data++];
 368
 369         return crc;
 370 }
 371 EXPORT_SYMBOL_GPL(w1_calc_crc8);
 372
 373 void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb)
 374 {
 375         dev->attempts++;
 376         if (dev->bus_master->search)
 377                 dev->bus_master->search(dev->bus_master->data, dev,
 378                         search_type, cb);
 379         else
 380                 w1_search(dev, search_type, cb);
 381 }
 382
 383 /**
 384  * w1_reset_select_slave() - reset and select a slave
 385  * @sl:         the slave to select
 386  *
 387  * Resets the bus and then selects the slave by sending either a skip rom
 388  * or a rom match.  A skip rom is issued if there is only one device
 389  * registered on the bus.
 390  * The w1 master lock must be held.
 391  *
 392  * Return:      0=success, anything else=error
 393  */
 394 int w1_reset_select_slave(struct w1_slave *sl)
 395 {
 396         if (w1_reset_bus(sl->master))
 397                 return -1;
 398
 399         if (sl->master->slave_count == 1)
 400                 w1_write_8(sl->master, W1_SKIP_ROM);
 401         else {
 402                 u8 match[9] = {W1_MATCH_ROM, };
 403                 u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
 404
 405                 memcpy(&match[1], &rn, 8);
 406                 w1_write_block(sl->master, match, 9);
 407         }
 408         return 0;
 409 }
 410 EXPORT_SYMBOL_GPL(w1_reset_select_slave);
 411
 412 /**
 413  * w1_reset_resume_command() - resume instead of another match ROM
 414  * @dev:        the master device
 415  *
 416  * When the workflow with a slave amongst many requires several
 417  * successive commands a reset between each, this function is similar
 418  * to doing a reset then a match ROM for the last matched ROM. The
 419  * advantage being that the matched ROM step is skipped in favor of the
 420  * resume command. The slave must support the command of course.
 421  *
 422  * If the bus has only one slave, traditionnaly the match ROM is skipped
 423  * and a "SKIP ROM" is done for efficiency. On multi-slave busses, this
 424  * doesn't work of course, but the resume command is the next best thing.
 425  *
 426  * The w1 master lock must be held.
 427  */
 428 int w1_reset_resume_command(struct w1_master *dev)
 429 {
 430         if (w1_reset_bus(dev))
 431                 return -1;
 432
 433         /* This will make only the last matched slave perform a skip ROM. */
 434         w1_write_8(dev, W1_RESUME_CMD);
 435         return 0;
 436 }
 437 EXPORT_SYMBOL_GPL(w1_reset_resume_command);
 438
 439 /**
 440  * w1_next_pullup() - register for a strong pullup
 441  * @dev:        the master device
 442  * @delay:      time in milliseconds
 443  *
 444  * Put out a strong pull-up of the specified duration after the next write
 445  * operation.  Not all hardware supports strong pullups.  Hardware that
 446  * doesn't support strong pullups will sleep for the given time after the
 447  * write operation without a strong pullup.  This is a one shot request for
 448  * the next write, specifying zero will clear a previous request.
 449  * The w1 master lock must be held.
 450  *
 451  * Return:      0=success, anything else=error
 452  */
 453 void w1_next_pullup(struct w1_master *dev, int delay)
 454 {
 455         dev->pullup_duration = delay;
 456 }
 457 EXPORT_SYMBOL_GPL(w1_next_pullup);