2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Joe.C <yingjoe.chen@mediatek.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
18 #include <linux/of_irq.h>
19 #include <linux/of_address.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
26 #define MT6577_SYS_INTPOL_NUM (224)
28 struct mtk_sysirq_chip_data
{
30 void __iomem
*intpol_base
;
33 static int mtk_sysirq_set_type(struct irq_data
*data
, unsigned int type
)
35 irq_hw_number_t hwirq
= data
->hwirq
;
36 struct mtk_sysirq_chip_data
*chip_data
= data
->chip_data
;
37 u32 offset
, reg_index
, value
;
41 offset
= hwirq
& 0x1f;
42 reg_index
= hwirq
>> 5;
44 spin_lock_irqsave(&chip_data
->lock
, flags
);
45 value
= readl_relaxed(chip_data
->intpol_base
+ reg_index
* 4);
46 if (type
== IRQ_TYPE_LEVEL_LOW
|| type
== IRQ_TYPE_EDGE_FALLING
) {
47 if (type
== IRQ_TYPE_LEVEL_LOW
)
48 type
= IRQ_TYPE_LEVEL_HIGH
;
50 type
= IRQ_TYPE_EDGE_RISING
;
51 value
|= (1 << offset
);
53 value
&= ~(1 << offset
);
55 writel(value
, chip_data
->intpol_base
+ reg_index
* 4);
57 data
= data
->parent_data
;
58 ret
= data
->chip
->irq_set_type(data
, type
);
59 spin_unlock_irqrestore(&chip_data
->lock
, flags
);
63 static struct irq_chip mtk_sysirq_chip
= {
65 .irq_mask
= irq_chip_mask_parent
,
66 .irq_unmask
= irq_chip_unmask_parent
,
67 .irq_eoi
= irq_chip_eoi_parent
,
68 .irq_set_type
= mtk_sysirq_set_type
,
69 .irq_retrigger
= irq_chip_retrigger_hierarchy
,
70 .irq_set_affinity
= irq_chip_set_affinity_parent
,
73 static int mtk_sysirq_domain_xlate(struct irq_domain
*d
,
74 struct device_node
*controller
,
75 const u32
*intspec
, unsigned int intsize
,
76 unsigned long *out_hwirq
,
77 unsigned int *out_type
)
82 /* sysirq doesn't support PPI */
86 *out_hwirq
= intspec
[1];
87 *out_type
= intspec
[2] & IRQ_TYPE_SENSE_MASK
;
91 static int mtk_sysirq_domain_alloc(struct irq_domain
*domain
, unsigned int virq
,
92 unsigned int nr_irqs
, void *arg
)
95 irq_hw_number_t hwirq
;
96 struct of_phandle_args
*irq_data
= arg
;
97 struct of_phandle_args gic_data
= *irq_data
;
99 if (irq_data
->args_count
!= 3)
102 /* sysirq doesn't support PPI */
103 if (irq_data
->args
[0])
106 hwirq
= irq_data
->args
[1];
107 for (i
= 0; i
< nr_irqs
; i
++)
108 irq_domain_set_hwirq_and_chip(domain
, virq
+ i
, hwirq
+ i
,
112 gic_data
.np
= domain
->parent
->of_node
;
113 return irq_domain_alloc_irqs_parent(domain
, virq
, nr_irqs
, &gic_data
);
116 static struct irq_domain_ops sysirq_domain_ops
= {
117 .xlate
= mtk_sysirq_domain_xlate
,
118 .alloc
= mtk_sysirq_domain_alloc
,
119 .free
= irq_domain_free_irqs_common
,
122 static int __init
mtk_sysirq_of_init(struct device_node
*node
,
123 struct device_node
*parent
)
125 struct irq_domain
*domain
, *domain_parent
;
126 struct mtk_sysirq_chip_data
*chip_data
;
129 domain_parent
= irq_find_host(parent
);
130 if (!domain_parent
) {
131 pr_err("mtk_sysirq: interrupt-parent not found\n");
135 chip_data
= kzalloc(sizeof(*chip_data
), GFP_KERNEL
);
139 chip_data
->intpol_base
= of_io_request_and_map(node
, 0, "intpol");
140 if (!chip_data
->intpol_base
) {
141 pr_err("mtk_sysirq: unable to map sysirq register\n");
146 domain
= irq_domain_add_hierarchy(domain_parent
, 0,
147 MT6577_SYS_INTPOL_NUM
, node
,
148 &sysirq_domain_ops
, chip_data
);
153 spin_lock_init(&chip_data
->lock
);
158 iounmap(chip_data
->intpol_base
);
163 IRQCHIP_DECLARE(mtk_sysirq
, "mediatek,mt6577-sysirq", mtk_sysirq_of_init
);