x86/build: Don't add -maccumulate-outgoing-args w/o compiler support
[linux/fpc-iii.git] / drivers / media / platform / s5p-mfc / regs-mfc-v7.h
blob1a5c6fdf78462ea8cedc1cbe3026a8d180347519
1 /*
2 * Register definition file for Samsung MFC V7.x Interface (FIMV) driver
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef _REGS_MFC_V7_H
13 #define _REGS_MFC_V7_H
15 #include "regs-mfc-v6.h"
17 /* Additional features of v7 */
18 #define S5P_FIMV_CODEC_VP8_ENC_V7 25
20 /* Additional registers for v7 */
21 #define S5P_FIMV_E_SOURCE_FIRST_ADDR_V7 0xf9e0
22 #define S5P_FIMV_E_SOURCE_SECOND_ADDR_V7 0xf9e4
23 #define S5P_FIMV_E_SOURCE_THIRD_ADDR_V7 0xf9e8
24 #define S5P_FIMV_E_SOURCE_FIRST_STRIDE_V7 0xf9ec
25 #define S5P_FIMV_E_SOURCE_SECOND_STRIDE_V7 0xf9f0
26 #define S5P_FIMV_E_SOURCE_THIRD_STRIDE_V7 0xf9f4
28 #define S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7 0xfa70
29 #define S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7 0xfa74
31 #define S5P_FIMV_E_VP8_OPTIONS_V7 0xfdb0
32 #define S5P_FIMV_E_VP8_FILTER_OPTIONS_V7 0xfdb4
33 #define S5P_FIMV_E_VP8_GOLDEN_FRAME_OPTION_V7 0xfdb8
34 #define S5P_FIMV_E_VP8_NUM_T_LAYER_V7 0xfdc4
36 /* MFCv7 variant defines */
37 #define MAX_FW_SIZE_V7 (SZ_1M) /* 1MB */
38 #define MAX_CPB_SIZE_V7 (3 * SZ_1M) /* 3MB */
39 #define MFC_VERSION_V7 0x72
40 #define MFC_NUM_PORTS_V7 1
42 #define MFC_LUMA_PAD_BYTES_V7 256
43 #define MFC_CHROMA_PAD_BYTES_V7 128
45 /* MFCv7 Context buffer sizes */
46 #define MFC_CTX_BUF_SIZE_V7 (30 * SZ_1K) /* 30KB */
47 #define MFC_H264_DEC_CTX_BUF_SIZE_V7 (2 * SZ_1M) /* 2MB */
48 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V7 (20 * SZ_1K) /* 20KB */
49 #define MFC_H264_ENC_CTX_BUF_SIZE_V7 (100 * SZ_1K) /* 100KB */
50 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V7 (10 * SZ_1K) /* 10KB */
52 /* Buffer size defines */
53 #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(w, h) \
54 (SZ_1M + ((w) * 144) + (8192 * (h)) + 49216)
56 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V7(w, h) \
57 (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \
58 ((((((w) * 16) * ((h) * 16)) * 3) / 2) * 4))
60 #endif /*_REGS_MFC_V7_H*/