arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36
  37 #include <linux/atomic.h>
  38 #include <asm/cpu.h>
  39 #include <asm/processor.h>
  40 #include <asm/r4k-timer.h>
  41 #include <asm/mmu_context.h>
  42 #include <asm/time.h>
  43 #include <asm/setup.h>
  44
  45 #ifdef CONFIG_MIPS_MT_SMTC
  46 #include <asm/mipsmtregs.h>
  47 #endif /* CONFIG_MIPS_MT_SMTC */
  48
  49 volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
  50
  51 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  52 EXPORT_SYMBOL(__cpu_number_map);
  53
  54 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  55 EXPORT_SYMBOL(__cpu_logical_map);
  56
  57 /* Number of TCs (or siblings in Intel speak) per CPU core */
  58 int smp_num_siblings = 1;
  59 EXPORT_SYMBOL(smp_num_siblings);
  60
  61 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  62 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  63 EXPORT_SYMBOL(cpu_sibling_map);
  64
  65 /* representing cpus for which sibling maps can be computed */
  66 static cpumask_t cpu_sibling_setup_map;
  67
  68 static inline void set_cpu_sibling_map(int cpu)
  69 {
  70         int i;
  71
  72         cpu_set(cpu, cpu_sibling_setup_map);
  73
  74         if (smp_num_siblings > 1) {
  75                 for_each_cpu_mask(i, cpu_sibling_setup_map) {
  76                         if (cpu_data[cpu].core == cpu_data[i].core) {
  77                                 cpu_set(i, cpu_sibling_map[cpu]);
  78                                 cpu_set(cpu, cpu_sibling_map[i]);
  79                         }
  80                 }
  81         } else
  82                 cpu_set(cpu, cpu_sibling_map[cpu]);
  83 }
  84
  85 struct plat_smp_ops *mp_ops;
  86
  87 __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
  88 {
  89         if (mp_ops)
  90                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
  91
  92         mp_ops = ops;
  93 }
  94
  95 /*
  96  * First C code run on the secondary CPUs after being started up by
  97  * the master.
  98  */
  99 asmlinkage __cpuinit void start_secondary(void)
 100 {
 101         unsigned int cpu;
 102
 103 #ifdef CONFIG_MIPS_MT_SMTC
 104         /* Only do cpu_probe for first TC of CPU */
 105         if ((read_c0_tcbind() & TCBIND_CURTC) != 0)
 106                 __cpu_name[smp_processor_id()] = __cpu_name[0];
 107         else
 108 #endif /* CONFIG_MIPS_MT_SMTC */
 109         cpu_probe();
 110         cpu_report();
 111         per_cpu_trap_init(false);
 112         mips_clockevent_init();
 113         mp_ops->init_secondary();
 114
 115         /*
 116          * XXX parity protection should be folded in here when it's converted
 117          * to an option instead of something based on .cputype
 118          */
 119
 120         calibrate_delay();
 121         preempt_disable();
 122         cpu = smp_processor_id();
 123         cpu_data[cpu].udelay_val = loops_per_jiffy;
 124
 125         notify_cpu_starting(cpu);
 126
 127         set_cpu_online(cpu, true);
 128
 129         set_cpu_sibling_map(cpu);
 130
 131         cpu_set(cpu, cpu_callin_map);
 132
 133         synchronise_count_slave(cpu);
 134
 135         /*
 136          * irq will be enabled in ->smp_finish(), enabling it too early
 137          * is dangerous.
 138          */
 139         WARN_ON_ONCE(!irqs_disabled());
 140         mp_ops->smp_finish();
 141
 142         cpu_idle();
 143 }
 144
 145 /*
 146  * Call into both interrupt handlers, as we share the IPI for them
 147  */
 148 void __irq_entry smp_call_function_interrupt(void)
 149 {
 150         irq_enter();
 151         generic_smp_call_function_single_interrupt();
 152         generic_smp_call_function_interrupt();
 153         irq_exit();
 154 }
 155
 156 static void stop_this_cpu(void *dummy)
 157 {
 158         /*
 159          * Remove this CPU:
 160          */
 161         set_cpu_online(smp_processor_id(), false);
 162         for (;;) {
 163                 if (cpu_wait)
 164                         (*cpu_wait)();          /* Wait if available. */
 165         }
 166 }
 167
 168 void smp_send_stop(void)
 169 {
 170         smp_call_function(stop_this_cpu, NULL, 0);
 171 }
 172
 173 void __init smp_cpus_done(unsigned int max_cpus)
 174 {
 175         mp_ops->cpus_done();
 176 }
 177
 178 /* called from main before smp_init() */
 179 void __init smp_prepare_cpus(unsigned int max_cpus)
 180 {
 181         init_new_context(current, &init_mm);
 182         current_thread_info()->cpu = 0;
 183         mp_ops->prepare_cpus(max_cpus);
 184         set_cpu_sibling_map(0);
 185 #ifndef CONFIG_HOTPLUG_CPU
 186         init_cpu_present(cpu_possible_mask);
 187 #endif
 188 }
 189
 190 /* preload SMP state for boot cpu */
 191 void __devinit smp_prepare_boot_cpu(void)
 192 {
 193         set_cpu_possible(0, true);
 194         set_cpu_online(0, true);
 195         cpu_set(0, cpu_callin_map);
 196 }
 197
 198 int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
 199 {
 200         mp_ops->boot_secondary(cpu, tidle);
 201
 202         /*
 203          * Trust is futile.  We should really have timeouts ...
 204          */
 205         while (!cpu_isset(cpu, cpu_callin_map))
 206                 udelay(100);
 207
 208         synchronise_count_master(cpu);
 209         return 0;
 210 }
 211
 212 /* Not really SMP stuff ... */
 213 int setup_profiling_timer(unsigned int multiplier)
 214 {
 215         return 0;
 216 }
 217
 218 static void flush_tlb_all_ipi(void *info)
 219 {
 220         local_flush_tlb_all();
 221 }
 222
 223 void flush_tlb_all(void)
 224 {
 225         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 226 }
 227
 228 static void flush_tlb_mm_ipi(void *mm)
 229 {
 230         local_flush_tlb_mm((struct mm_struct *)mm);
 231 }
 232
 233 /*
 234  * Special Variant of smp_call_function for use by TLB functions:
 235  *
 236  *  o No return value
 237  *  o collapses to normal function call on UP kernels
 238  *  o collapses to normal function call on systems with a single shared
 239  *    primary cache.
 240  *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
 241  */
 242 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 243 {
 244 #ifndef CONFIG_MIPS_MT_SMTC
 245         smp_call_function(func, info, 1);
 246 #endif
 247 }
 248
 249 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 250 {
 251         preempt_disable();
 252
 253         smp_on_other_tlbs(func, info);
 254         func(info);
 255
 256         preempt_enable();
 257 }
 258
 259 /*
 260  * The following tlb flush calls are invoked when old translations are
 261  * being torn down, or pte attributes are changing. For single threaded
 262  * address spaces, a new context is obtained on the current cpu, and tlb
 263  * context on other cpus are invalidated to force a new context allocation
 264  * at switch_mm time, should the mm ever be used on other cpus. For
 265  * multithreaded address spaces, intercpu interrupts have to be sent.
 266  * Another case where intercpu interrupts are required is when the target
 267  * mm might be active on another cpu (eg debuggers doing the flushes on
 268  * behalf of debugees, kswapd stealing pages from another process etc).
 269  * Kanoj 07/00.
 270  */
 271
 272 void flush_tlb_mm(struct mm_struct *mm)
 273 {
 274         preempt_disable();
 275
 276         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 277                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 278         } else {
 279                 unsigned int cpu;
 280
 281                 for_each_online_cpu(cpu) {
 282                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 283                                 cpu_context(cpu, mm) = 0;
 284                 }
 285         }
 286         local_flush_tlb_mm(mm);
 287
 288         preempt_enable();
 289 }
 290
 291 struct flush_tlb_data {
 292         struct vm_area_struct *vma;
 293         unsigned long addr1;
 294         unsigned long addr2;
 295 };
 296
 297 static void flush_tlb_range_ipi(void *info)
 298 {
 299         struct flush_tlb_data *fd = info;
 300
 301         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 302 }
 303
 304 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 305 {
 306         struct mm_struct *mm = vma->vm_mm;
 307
 308         preempt_disable();
 309         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 310                 struct flush_tlb_data fd = {
 311                         .vma = vma,
 312                         .addr1 = start,
 313                         .addr2 = end,
 314                 };
 315
 316                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 317         } else {
 318                 unsigned int cpu;
 319
 320                 for_each_online_cpu(cpu) {
 321                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 322                                 cpu_context(cpu, mm) = 0;
 323                 }
 324         }
 325         local_flush_tlb_range(vma, start, end);
 326         preempt_enable();
 327 }
 328
 329 static void flush_tlb_kernel_range_ipi(void *info)
 330 {
 331         struct flush_tlb_data *fd = info;
 332
 333         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 334 }
 335
 336 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 337 {
 338         struct flush_tlb_data fd = {
 339                 .addr1 = start,
 340                 .addr2 = end,
 341         };
 342
 343         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 344 }
 345
 346 static void flush_tlb_page_ipi(void *info)
 347 {
 348         struct flush_tlb_data *fd = info;
 349
 350         local_flush_tlb_page(fd->vma, fd->addr1);
 351 }
 352
 353 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 354 {
 355         preempt_disable();
 356         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 357                 struct flush_tlb_data fd = {
 358                         .vma = vma,
 359                         .addr1 = page,
 360                 };
 361
 362                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 363         } else {
 364                 unsigned int cpu;
 365
 366                 for_each_online_cpu(cpu) {
 367                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 368                                 cpu_context(cpu, vma->vm_mm) = 0;
 369                 }
 370         }
 371         local_flush_tlb_page(vma, page);
 372         preempt_enable();
 373 }
 374
 375 static void flush_tlb_one_ipi(void *info)
 376 {
 377         unsigned long vaddr = (unsigned long) info;
 378
 379         local_flush_tlb_one(vaddr);
 380 }
 381
 382 void flush_tlb_one(unsigned long vaddr)
 383 {
 384         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 385 }
 386
 387 EXPORT_SYMBOL(flush_tlb_page);
 388 EXPORT_SYMBOL(flush_tlb_one);