1 Qualcomm MSM8994 TLMM block
3 This binding describes the Top Level Mode Multiplexer block found in the
9 Definition: Should contain one of:
10 "qcom,msm8992-pinctrl",
11 "qcom,msm8994-pinctrl".
15 Value type: <prop-encoded-array>
16 Definition: the base address and size of the TLMM register space.
20 Value type: <prop-encoded-array>
21 Definition: should specify the TLMM summary IRQ.
23 - interrupt-controller:
26 Definition: identifies this node as an interrupt controller
31 Definition: must be 2. Specifying the pin number and flags, as defined
32 in <dt-bindings/interrupt-controller/irq.h>
37 Definition: identifies this node as a gpio controller
42 Definition: must be 2. Specifying the pin number and flags, as defined
43 in <dt-bindings/gpio/gpio.h>
45 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
46 a general description of GPIO and interrupt bindings.
48 Please refer to pinctrl-bindings.txt in this directory for details of the
49 common pinctrl bindings used by client devices, including the meaning of the
50 phrase "pin configuration node".
52 The pin configuration nodes act as a container for an arbitrary number of
53 subnodes. Each of these subnodes represents some desired configuration for a
54 pin, a group, or a list of pins or groups. This configuration can include the
55 mux function to select on those pin(s)/group(s), and various pin configuration
56 parameters, such as pull-up, drive strength, etc.
59 PIN CONFIGURATION NODES:
61 The name of each subnode is not important; all subnodes should be enumerated
62 and processed purely based on their content.
64 Each subnode only affects those parameters that are explicitly listed. In
65 other words, a subnode that lists a mux function but no pin configuration
66 parameters implies no information about any pin configuration parameters.
67 Similarly, a pin subnode that describes a pullup parameter implies no
68 information about e.g. the mux function.
71 The following generic properties as defined in pinctrl-bindings.txt are valid
72 to specify in a pin configuration subnode:
76 Value type: <string-array>
77 Definition: List of gpio pins affected by the properties specified in
82 Supports mux, bias and drive-strength
84 sdc1_clk, sdc1_cmd, sdc1_data sdc1_rclk, sdc2_clk,
86 Supports bias and drive-strength
91 Definition: Specify the alternative function to be configured for the
92 specified pins. Functions are only valid for gpio pins.
95 audio_ref_clk, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,
96 blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9, blsp_i2c10, blsp_i2c11,
97 blsp_i2c12, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3,
98 blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3,
99 blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9,
100 blsp_spi10, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3, blsp_spi11,
101 blsp_spi12, blsp_uart1, blsp_uart2, blsp_uart3, blsp_uart4, blsp_uart5,
102 blsp_uart6, blsp_uart7, blsp_uart8, blsp_uart9, blsp_uart10, blsp_uart11,
103 blsp_uart12, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim4, blsp_uim5,
104 blsp_uim6, blsp_uim7, blsp_uim8, blsp_uim9, blsp_uim10, blsp_uim11,
105 blsp_uim12, blsp11_i2c_scl_b, blsp11_i2c_sda_b, blsp11_uart_rx_b,
106 blsp11_uart_tx_b, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,
107 cci_async_in0, cci_async_in1, cci_async_in2, cci_i2c0, cci_i2c1,
108 cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,
109 gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a,
110 gcc_gp3_clk_b, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2, gp0_clk,
111 gp1_clk, gps_tx, gsm_tx, hdmi_cec, hdmi_ddc, hdmi_hpd, hdmi_rcv,
112 mdp_vsync, mss_lte, nav_pps, nav_tsync, qdss_cti_trig_in_a,
113 qdss_cti_trig_in_b, qdss_cti_trig_in_c, qdss_cti_trig_in_d,
114 qdss_cti_trig_out_a, qdss_cti_trig_out_b, qdss_cti_trig_out_c,
115 qdss_cti_trig_out_d, qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
116 qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, qua_mi2s, pci_e0,
117 pci_e1, pri_mi2s, sdc4, sec_mi2s, slimbus, spkr_i2s, ter_mi2s, tsif1,
118 tsif2, uim_batt_alarm, uim1, uim2, uim3, uim4, gpio
123 Definition: The specified pins should be configued as no pull.
128 Definition: The specified pins should be configued as pull down.
133 Definition: The specified pins should be configued as pull up.
138 Definition: The specified pins are configured in output mode, driven
140 Not valid for sdc pins.
145 Definition: The specified pins are configured in output mode, driven
147 Not valid for sdc pins.
152 Definition: Selects the drive strength for the specified pins, in mA.
153 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
157 msmgpio: pinctrl@fd510000 {
158 compatible = "qcom,msm8994-pinctrl";
159 reg = <0xfd510000 0x4000>;
160 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
163 interrupt-controller;
164 #interrupt-cells = <2>;
166 blsp1_uart2_default: blsp1_uart2_default {
168 pins = "gpio4", "gpio5";
169 function = "blsp_uart2";
172 pins = "gpio4", "gpio5";
173 drive-strength = <16>;