[PATCH] elevator=as back-compatibility
[linux/fpc-iii.git] / include / asm-xtensa / io.h
blobc5c13985bbe1f013577fa2d371a086517bab8a7c
1 /*
2 * linux/include/asm-xtensa/io.h
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
11 #ifndef _XTENSA_IO_H
12 #define _XTENSA_IO_H
14 #ifdef __KERNEL__
15 #include <linux/config.h>
16 #include <asm/byteorder.h>
18 #include <linux/types.h>
19 #include <asm/fixmap.h>
21 #define _IO_BASE 0
25 * swap functions to change byte order from little-endian to big-endian and
26 * vice versa.
29 static inline unsigned short _swapw (unsigned short v)
31 return (v << 8) | (v >> 8);
34 static inline unsigned int _swapl (unsigned int v)
36 return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
40 * Change virtual addresses to physical addresses and vv.
41 * These are trivial on the 1:1 Linux/Xtensa mapping
44 static inline unsigned long virt_to_phys(volatile void * address)
46 return PHYSADDR((unsigned long)address);
49 static inline void * phys_to_virt(unsigned long address)
51 return (void*) CACHED_ADDR(address);
55 * IO bus memory addresses are also 1:1 with the physical address
58 static inline unsigned long virt_to_bus(volatile void * address)
60 return PHYSADDR((unsigned long)address);
63 static inline void * bus_to_virt (unsigned long address)
65 return (void *) CACHED_ADDR(address);
69 * Change "struct page" to physical address.
72 static inline void *ioremap(unsigned long offset, unsigned long size)
74 return (void *) CACHED_ADDR_IO(offset);
77 static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
79 return (void *) BYPASS_ADDR_IO(offset);
82 static inline void iounmap(void *addr)
87 * Generic I/O
90 #define readb(addr) \
91 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
92 #define readw(addr) \
93 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
94 #define readl(addr) \
95 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
96 #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
97 #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
98 #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
100 static inline __u8 __raw_readb(const volatile void __iomem *addr)
102 return *(__force volatile __u8 *)(addr);
104 static inline __u16 __raw_readw(const volatile void __iomem *addr)
106 return *(__force volatile __u16 *)(addr);
108 static inline __u32 __raw_readl(const volatile void __iomem *addr)
110 return *(__force volatile __u32 *)(addr);
112 static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
114 *(__force volatile __u8 *)(addr) = b;
116 static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
118 *(__force volatile __u16 *)(addr) = b;
120 static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
122 *(__force volatile __u32 *)(addr) = b;
128 /* These are the definitions for the x86 IO instructions
129 * inb/inw/inl/outb/outw/outl, the "string" versions
130 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
131 * inb_p/inw_p/...
132 * The macros don't do byte-swapping.
135 #define inb(port) readb((u8 *)((port)+_IO_BASE))
136 #define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)+_IO_BASE))
137 #define inw(port) readw((u16 *)((port)+_IO_BASE))
138 #define outw(val, port) writew((val),(u16 *)((unsigned long)(port)+_IO_BASE))
139 #define inl(port) readl((u32 *)((port)+_IO_BASE))
140 #define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
142 #define inb_p(port) inb((port))
143 #define outb_p(val, port) outb((val), (port))
144 #define inw_p(port) inw((port))
145 #define outw_p(val, port) outw((val), (port))
146 #define inl_p(port) inl((port))
147 #define outl_p(val, port) outl((val), (port))
149 extern void insb (unsigned long port, void *dst, unsigned long count);
150 extern void insw (unsigned long port, void *dst, unsigned long count);
151 extern void insl (unsigned long port, void *dst, unsigned long count);
152 extern void outsb (unsigned long port, const void *src, unsigned long count);
153 extern void outsw (unsigned long port, const void *src, unsigned long count);
154 extern void outsl (unsigned long port, const void *src, unsigned long count);
156 #define IO_SPACE_LIMIT ~0
158 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
159 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
160 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
162 /* At this point the Xtensa doesn't provide byte swap instructions */
164 #ifdef __XTENSA_EB__
165 # define in_8(addr) (*(u8*)(addr))
166 # define in_le16(addr) _swapw(*(u16*)(addr))
167 # define in_le32(addr) _swapl(*(u32*)(addr))
168 # define out_8(b, addr) *(u8*)(addr) = (b)
169 # define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
170 # define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
171 #elif defined(__XTENSA_EL__)
172 # define in_8(addr) (*(u8*)(addr))
173 # define in_le16(addr) (*(u16*)(addr))
174 # define in_le32(addr) (*(u32*)(addr))
175 # define out_8(b, addr) *(u8*)(addr) = (b)
176 # define out_le16(b, addr) *(u16*)(addr) = (b)
177 # define out_le32(b, addr) *(u32*)(addr) = (b)
178 #else
179 # error processor byte order undefined!
180 #endif
184 * * Convert a physical pointer to a virtual kernel pointer for /dev/mem
185 * * access
186 * */
187 #define xlate_dev_mem_ptr(p) __va(p)
190 * * Convert a virtual cached pointer to an uncached pointer
191 * */
192 #define xlate_dev_kmem_ptr(p) p
195 #endif /* __KERNEL__ */
197 #endif /* _XTENSA_IO_H */