2 * Copyright (c) 2015, Sony Mobile Communications AB.
3 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/regulator/of_regulator.h>
22 #include <linux/soc/qcom/smd-rpm.h>
27 struct qcom_smd_rpm
*rpm
;
32 struct regulator_desc desc
;
38 struct rpm_regulator_req
{
44 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
45 #define RPM_KEY_UV 0x00007675 /* "uv" */
46 #define RPM_KEY_MA 0x0000616d /* "ma" */
48 static int rpm_reg_write_active(struct qcom_rpm_reg
*vreg
,
49 struct rpm_regulator_req
*req
,
52 return qcom_rpm_smd_write(vreg
->rpm
,
53 QCOM_SMD_RPM_ACTIVE_STATE
,
59 static int rpm_reg_enable(struct regulator_dev
*rdev
)
61 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
62 struct rpm_regulator_req req
;
65 req
.key
= cpu_to_le32(RPM_KEY_SWEN
);
66 req
.nbytes
= cpu_to_le32(sizeof(u32
));
67 req
.value
= cpu_to_le32(1);
69 ret
= rpm_reg_write_active(vreg
, &req
, sizeof(req
));
76 static int rpm_reg_is_enabled(struct regulator_dev
*rdev
)
78 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
80 return vreg
->is_enabled
;
83 static int rpm_reg_disable(struct regulator_dev
*rdev
)
85 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
86 struct rpm_regulator_req req
;
89 req
.key
= cpu_to_le32(RPM_KEY_SWEN
);
90 req
.nbytes
= cpu_to_le32(sizeof(u32
));
93 ret
= rpm_reg_write_active(vreg
, &req
, sizeof(req
));
100 static int rpm_reg_get_voltage(struct regulator_dev
*rdev
)
102 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
107 static int rpm_reg_set_voltage(struct regulator_dev
*rdev
,
112 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
113 struct rpm_regulator_req req
;
116 req
.key
= cpu_to_le32(RPM_KEY_UV
);
117 req
.nbytes
= cpu_to_le32(sizeof(u32
));
118 req
.value
= cpu_to_le32(min_uV
);
120 ret
= rpm_reg_write_active(vreg
, &req
, sizeof(req
));
127 static int rpm_reg_set_load(struct regulator_dev
*rdev
, int load_uA
)
129 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
130 struct rpm_regulator_req req
;
132 req
.key
= cpu_to_le32(RPM_KEY_MA
);
133 req
.nbytes
= cpu_to_le32(sizeof(u32
));
134 req
.value
= cpu_to_le32(load_uA
/ 1000);
136 return rpm_reg_write_active(vreg
, &req
, sizeof(req
));
139 static const struct regulator_ops rpm_smps_ldo_ops
= {
140 .enable
= rpm_reg_enable
,
141 .disable
= rpm_reg_disable
,
142 .is_enabled
= rpm_reg_is_enabled
,
143 .list_voltage
= regulator_list_voltage_linear_range
,
145 .get_voltage
= rpm_reg_get_voltage
,
146 .set_voltage
= rpm_reg_set_voltage
,
148 .set_load
= rpm_reg_set_load
,
151 static const struct regulator_ops rpm_smps_ldo_ops_fixed
= {
152 .enable
= rpm_reg_enable
,
153 .disable
= rpm_reg_disable
,
154 .is_enabled
= rpm_reg_is_enabled
,
155 .list_voltage
= regulator_list_voltage_linear_range
,
157 .get_voltage
= rpm_reg_get_voltage
,
158 .set_voltage
= rpm_reg_set_voltage
,
160 .set_load
= rpm_reg_set_load
,
163 static const struct regulator_ops rpm_switch_ops
= {
164 .enable
= rpm_reg_enable
,
165 .disable
= rpm_reg_disable
,
166 .is_enabled
= rpm_reg_is_enabled
,
169 static const struct regulator_desc pma8084_hfsmps
= {
170 .linear_ranges
= (struct regulator_linear_range
[]) {
171 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
172 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
174 .n_linear_ranges
= 2,
176 .ops
= &rpm_smps_ldo_ops
,
179 static const struct regulator_desc pma8084_ftsmps
= {
180 .linear_ranges
= (struct regulator_linear_range
[]) {
181 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
182 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
184 .n_linear_ranges
= 2,
186 .ops
= &rpm_smps_ldo_ops
,
189 static const struct regulator_desc pma8084_pldo
= {
190 .linear_ranges
= (struct regulator_linear_range
[]) {
191 REGULATOR_LINEAR_RANGE(750000, 0, 30, 25000),
192 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
194 .n_linear_ranges
= 2,
196 .ops
= &rpm_smps_ldo_ops
,
199 static const struct regulator_desc pma8084_nldo
= {
200 .linear_ranges
= (struct regulator_linear_range
[]) {
201 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
203 .n_linear_ranges
= 1,
205 .ops
= &rpm_smps_ldo_ops
,
208 static const struct regulator_desc pma8084_switch
= {
209 .ops
= &rpm_switch_ops
,
212 static const struct regulator_desc pm8x41_hfsmps
= {
213 .linear_ranges
= (struct regulator_linear_range
[]) {
214 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
215 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
217 .n_linear_ranges
= 2,
219 .ops
= &rpm_smps_ldo_ops
,
222 static const struct regulator_desc pm8841_ftsmps
= {
223 .linear_ranges
= (struct regulator_linear_range
[]) {
224 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
225 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
227 .n_linear_ranges
= 2,
229 .ops
= &rpm_smps_ldo_ops
,
232 static const struct regulator_desc pm8941_boost
= {
233 .linear_ranges
= (struct regulator_linear_range
[]) {
234 REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
236 .n_linear_ranges
= 1,
238 .ops
= &rpm_smps_ldo_ops
,
241 static const struct regulator_desc pm8941_pldo
= {
242 .linear_ranges
= (struct regulator_linear_range
[]) {
243 REGULATOR_LINEAR_RANGE( 750000, 0, 30, 25000),
244 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
246 .n_linear_ranges
= 2,
248 .ops
= &rpm_smps_ldo_ops
,
251 static const struct regulator_desc pm8941_nldo
= {
252 .linear_ranges
= (struct regulator_linear_range
[]) {
253 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
255 .n_linear_ranges
= 1,
257 .ops
= &rpm_smps_ldo_ops
,
260 static const struct regulator_desc pm8941_lnldo
= {
263 .ops
= &rpm_smps_ldo_ops_fixed
,
266 static const struct regulator_desc pm8941_switch
= {
267 .ops
= &rpm_switch_ops
,
270 static const struct regulator_desc pm8916_pldo
= {
271 .linear_ranges
= (struct regulator_linear_range
[]) {
272 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
274 .n_linear_ranges
= 1,
276 .ops
= &rpm_smps_ldo_ops
,
279 static const struct regulator_desc pm8916_nldo
= {
280 .linear_ranges
= (struct regulator_linear_range
[]) {
281 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
283 .n_linear_ranges
= 1,
285 .ops
= &rpm_smps_ldo_ops
,
288 static const struct regulator_desc pm8916_buck_lvo_smps
= {
289 .linear_ranges
= (struct regulator_linear_range
[]) {
290 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
291 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
293 .n_linear_ranges
= 2,
295 .ops
= &rpm_smps_ldo_ops
,
298 static const struct regulator_desc pm8916_buck_hvo_smps
= {
299 .linear_ranges
= (struct regulator_linear_range
[]) {
300 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
302 .n_linear_ranges
= 1,
304 .ops
= &rpm_smps_ldo_ops
,
307 struct rpm_regulator_data
{
311 const struct regulator_desc
*desc
;
315 static const struct rpm_regulator_data rpm_pm8841_regulators
[] = {
316 { "s1", QCOM_SMD_RPM_SMPB
, 1, &pm8x41_hfsmps
, "vdd_s1" },
317 { "s2", QCOM_SMD_RPM_SMPB
, 2, &pm8841_ftsmps
, "vdd_s2" },
318 { "s3", QCOM_SMD_RPM_SMPB
, 3, &pm8x41_hfsmps
, "vdd_s3" },
319 { "s4", QCOM_SMD_RPM_SMPB
, 4, &pm8841_ftsmps
, "vdd_s4" },
320 { "s5", QCOM_SMD_RPM_SMPB
, 5, &pm8841_ftsmps
, "vdd_s5" },
321 { "s6", QCOM_SMD_RPM_SMPB
, 6, &pm8841_ftsmps
, "vdd_s6" },
322 { "s7", QCOM_SMD_RPM_SMPB
, 7, &pm8841_ftsmps
, "vdd_s7" },
323 { "s8", QCOM_SMD_RPM_SMPB
, 8, &pm8841_ftsmps
, "vdd_s8" },
327 static const struct rpm_regulator_data rpm_pm8916_regulators
[] = {
328 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8916_buck_lvo_smps
, "vdd_s1" },
329 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8916_buck_lvo_smps
, "vdd_s2" },
330 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8916_buck_lvo_smps
, "vdd_s3" },
331 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pm8916_buck_hvo_smps
, "vdd_s4" },
332 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8916_nldo
, "vdd_l1_l2_l3" },
333 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8916_nldo
, "vdd_l1_l2_l3" },
334 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8916_nldo
, "vdd_l1_l2_l3" },
335 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8916_pldo
, "vdd_l4_l5_l6" },
336 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8916_pldo
, "vdd_l4_l5_l6" },
337 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8916_pldo
, "vdd_l4_l5_l6" },
338 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8916_pldo
, "vdd_l7" },
339 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
340 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
341 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
342 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
343 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
344 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
345 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
346 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
347 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
348 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
349 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
353 static const struct rpm_regulator_data rpm_pm8941_regulators
[] = {
354 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8x41_hfsmps
, "vdd_s1" },
355 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8x41_hfsmps
, "vdd_s2" },
356 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8x41_hfsmps
, "vdd_s3" },
357 { "s4", QCOM_SMD_RPM_BOOST
, 1, &pm8941_boost
},
359 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8941_nldo
, "vdd_l1_l3" },
360 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8941_nldo
, "vdd_l2_lvs1_2_3" },
361 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8941_nldo
, "vdd_l1_l3" },
362 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8941_nldo
, "vdd_l4_l11" },
363 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8941_lnldo
, "vdd_l5_l7" },
364 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
365 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8941_lnldo
, "vdd_l5_l7" },
366 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
367 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
368 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
369 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8941_nldo
, "vdd_l4_l11" },
370 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
371 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
372 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
373 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
374 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
375 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
376 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
377 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
378 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
379 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pm8941_pldo
, "vdd_l21" },
380 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
381 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
382 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
384 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
385 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
386 { "lvs3", QCOM_SMD_RPM_VSA
, 3, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
388 { "5vs1", QCOM_SMD_RPM_VSA
, 4, &pm8941_switch
, "vin_5vs" },
389 { "5vs2", QCOM_SMD_RPM_VSA
, 5, &pm8941_switch
, "vin_5vs" },
394 static const struct rpm_regulator_data rpm_pma8084_regulators
[] = {
395 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pma8084_ftsmps
, "vdd_s1" },
396 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pma8084_ftsmps
, "vdd_s2" },
397 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pma8084_hfsmps
, "vdd_s3" },
398 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pma8084_hfsmps
, "vdd_s4" },
399 { "s5", QCOM_SMD_RPM_SMPA
, 5, &pma8084_hfsmps
, "vdd_s5" },
400 { "s6", QCOM_SMD_RPM_SMPA
, 6, &pma8084_ftsmps
, "vdd_s6" },
401 { "s7", QCOM_SMD_RPM_SMPA
, 7, &pma8084_ftsmps
, "vdd_s7" },
402 { "s8", QCOM_SMD_RPM_SMPA
, 8, &pma8084_ftsmps
, "vdd_s8" },
403 { "s9", QCOM_SMD_RPM_SMPA
, 9, &pma8084_ftsmps
, "vdd_s9" },
404 { "s10", QCOM_SMD_RPM_SMPA
, 10, &pma8084_ftsmps
, "vdd_s10" },
405 { "s11", QCOM_SMD_RPM_SMPA
, 11, &pma8084_ftsmps
, "vdd_s11" },
406 { "s12", QCOM_SMD_RPM_SMPA
, 12, &pma8084_ftsmps
, "vdd_s12" },
408 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pma8084_nldo
, "vdd_l1_l11" },
409 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
410 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
411 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
412 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pma8084_pldo
, "vdd_l5_l7" },
413 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
414 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pma8084_pldo
, "vdd_l5_l7" },
415 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pma8084_pldo
, "vdd_l8" },
416 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
417 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
418 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pma8084_nldo
, "vdd_l1_l11" },
419 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
420 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
421 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
422 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
423 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pma8084_pldo
, "vdd_l16_l25" },
424 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pma8084_pldo
, "vdd_l17" },
425 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pma8084_pldo
, "vdd_l18" },
426 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pma8084_pldo
, "vdd_l19" },
427 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
428 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pma8084_pldo
, "vdd_l21" },
429 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pma8084_pldo
, "vdd_l22" },
430 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
431 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
432 { "l25", QCOM_SMD_RPM_LDOA
, 25, &pma8084_pldo
, "vdd_l16_l25" },
433 { "l26", QCOM_SMD_RPM_LDOA
, 26, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
434 { "l27", QCOM_SMD_RPM_LDOA
, 27, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
436 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pma8084_switch
},
437 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pma8084_switch
},
438 { "lvs3", QCOM_SMD_RPM_VSA
, 3, &pma8084_switch
},
439 { "lvs4", QCOM_SMD_RPM_VSA
, 4, &pma8084_switch
},
440 { "5vs1", QCOM_SMD_RPM_VSA
, 5, &pma8084_switch
},
445 static const struct of_device_id rpm_of_match
[] = {
446 { .compatible
= "qcom,rpm-pm8841-regulators", .data
= &rpm_pm8841_regulators
},
447 { .compatible
= "qcom,rpm-pm8916-regulators", .data
= &rpm_pm8916_regulators
},
448 { .compatible
= "qcom,rpm-pm8941-regulators", .data
= &rpm_pm8941_regulators
},
449 { .compatible
= "qcom,rpm-pma8084-regulators", .data
= &rpm_pma8084_regulators
},
452 MODULE_DEVICE_TABLE(of
, rpm_of_match
);
454 static int rpm_reg_probe(struct platform_device
*pdev
)
456 const struct rpm_regulator_data
*reg
;
457 const struct of_device_id
*match
;
458 struct regulator_config config
= { };
459 struct regulator_dev
*rdev
;
460 struct qcom_rpm_reg
*vreg
;
461 struct qcom_smd_rpm
*rpm
;
463 rpm
= dev_get_drvdata(pdev
->dev
.parent
);
465 dev_err(&pdev
->dev
, "unable to retrieve handle to rpm\n");
469 match
= of_match_device(rpm_of_match
, &pdev
->dev
);
470 for (reg
= match
->data
; reg
->name
; reg
++) {
471 vreg
= devm_kzalloc(&pdev
->dev
, sizeof(*vreg
), GFP_KERNEL
);
475 vreg
->dev
= &pdev
->dev
;
476 vreg
->type
= reg
->type
;
480 memcpy(&vreg
->desc
, reg
->desc
, sizeof(vreg
->desc
));
483 vreg
->desc
.owner
= THIS_MODULE
;
484 vreg
->desc
.type
= REGULATOR_VOLTAGE
;
485 vreg
->desc
.name
= reg
->name
;
486 vreg
->desc
.supply_name
= reg
->supply
;
487 vreg
->desc
.of_match
= reg
->name
;
489 config
.dev
= &pdev
->dev
;
490 config
.driver_data
= vreg
;
491 rdev
= devm_regulator_register(&pdev
->dev
, &vreg
->desc
, &config
);
493 dev_err(&pdev
->dev
, "failed to register %s\n", reg
->name
);
494 return PTR_ERR(rdev
);
501 static struct platform_driver rpm_reg_driver
= {
502 .probe
= rpm_reg_probe
,
504 .name
= "qcom_rpm_smd_regulator",
505 .of_match_table
= rpm_of_match
,
509 static int __init
rpm_reg_init(void)
511 return platform_driver_register(&rpm_reg_driver
);
513 subsys_initcall(rpm_reg_init
);
515 static void __exit
rpm_reg_exit(void)
517 platform_driver_unregister(&rpm_reg_driver
);
519 module_exit(rpm_reg_exit
)
521 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
522 MODULE_LICENSE("GPL v2");