2 * Copyright (C) 2012-2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/compiler.h>
19 #include <linux/kvm_host.h>
21 #include <asm/kvm_asm.h>
22 #include <asm/kvm_mmu.h>
26 /* ctxt is already in the HYP VA space */
27 void __hyp_text
__sysreg_save_state(struct kvm_cpu_context
*ctxt
)
29 ctxt
->sys_regs
[MPIDR_EL1
] = read_sysreg(vmpidr_el2
);
30 ctxt
->sys_regs
[CSSELR_EL1
] = read_sysreg(csselr_el1
);
31 ctxt
->sys_regs
[SCTLR_EL1
] = read_sysreg(sctlr_el1
);
32 ctxt
->sys_regs
[ACTLR_EL1
] = read_sysreg(actlr_el1
);
33 ctxt
->sys_regs
[CPACR_EL1
] = read_sysreg(cpacr_el1
);
34 ctxt
->sys_regs
[TTBR0_EL1
] = read_sysreg(ttbr0_el1
);
35 ctxt
->sys_regs
[TTBR1_EL1
] = read_sysreg(ttbr1_el1
);
36 ctxt
->sys_regs
[TCR_EL1
] = read_sysreg(tcr_el1
);
37 ctxt
->sys_regs
[ESR_EL1
] = read_sysreg(esr_el1
);
38 ctxt
->sys_regs
[AFSR0_EL1
] = read_sysreg(afsr0_el1
);
39 ctxt
->sys_regs
[AFSR1_EL1
] = read_sysreg(afsr1_el1
);
40 ctxt
->sys_regs
[FAR_EL1
] = read_sysreg(far_el1
);
41 ctxt
->sys_regs
[MAIR_EL1
] = read_sysreg(mair_el1
);
42 ctxt
->sys_regs
[VBAR_EL1
] = read_sysreg(vbar_el1
);
43 ctxt
->sys_regs
[CONTEXTIDR_EL1
] = read_sysreg(contextidr_el1
);
44 ctxt
->sys_regs
[TPIDR_EL0
] = read_sysreg(tpidr_el0
);
45 ctxt
->sys_regs
[TPIDRRO_EL0
] = read_sysreg(tpidrro_el0
);
46 ctxt
->sys_regs
[TPIDR_EL1
] = read_sysreg(tpidr_el1
);
47 ctxt
->sys_regs
[AMAIR_EL1
] = read_sysreg(amair_el1
);
48 ctxt
->sys_regs
[CNTKCTL_EL1
] = read_sysreg(cntkctl_el1
);
49 ctxt
->sys_regs
[PAR_EL1
] = read_sysreg(par_el1
);
50 ctxt
->sys_regs
[MDSCR_EL1
] = read_sysreg(mdscr_el1
);
52 ctxt
->gp_regs
.regs
.sp
= read_sysreg(sp_el0
);
53 ctxt
->gp_regs
.regs
.pc
= read_sysreg(elr_el2
);
54 ctxt
->gp_regs
.regs
.pstate
= read_sysreg(spsr_el2
);
55 ctxt
->gp_regs
.sp_el1
= read_sysreg(sp_el1
);
56 ctxt
->gp_regs
.elr_el1
= read_sysreg(elr_el1
);
57 ctxt
->gp_regs
.spsr
[KVM_SPSR_EL1
]= read_sysreg(spsr_el1
);
60 void __hyp_text
__sysreg_restore_state(struct kvm_cpu_context
*ctxt
)
62 write_sysreg(ctxt
->sys_regs
[MPIDR_EL1
], vmpidr_el2
);
63 write_sysreg(ctxt
->sys_regs
[CSSELR_EL1
], csselr_el1
);
64 write_sysreg(ctxt
->sys_regs
[SCTLR_EL1
], sctlr_el1
);
65 write_sysreg(ctxt
->sys_regs
[ACTLR_EL1
], actlr_el1
);
66 write_sysreg(ctxt
->sys_regs
[CPACR_EL1
], cpacr_el1
);
67 write_sysreg(ctxt
->sys_regs
[TTBR0_EL1
], ttbr0_el1
);
68 write_sysreg(ctxt
->sys_regs
[TTBR1_EL1
], ttbr1_el1
);
69 write_sysreg(ctxt
->sys_regs
[TCR_EL1
], tcr_el1
);
70 write_sysreg(ctxt
->sys_regs
[ESR_EL1
], esr_el1
);
71 write_sysreg(ctxt
->sys_regs
[AFSR0_EL1
], afsr0_el1
);
72 write_sysreg(ctxt
->sys_regs
[AFSR1_EL1
], afsr1_el1
);
73 write_sysreg(ctxt
->sys_regs
[FAR_EL1
], far_el1
);
74 write_sysreg(ctxt
->sys_regs
[MAIR_EL1
], mair_el1
);
75 write_sysreg(ctxt
->sys_regs
[VBAR_EL1
], vbar_el1
);
76 write_sysreg(ctxt
->sys_regs
[CONTEXTIDR_EL1
], contextidr_el1
);
77 write_sysreg(ctxt
->sys_regs
[TPIDR_EL0
], tpidr_el0
);
78 write_sysreg(ctxt
->sys_regs
[TPIDRRO_EL0
], tpidrro_el0
);
79 write_sysreg(ctxt
->sys_regs
[TPIDR_EL1
], tpidr_el1
);
80 write_sysreg(ctxt
->sys_regs
[AMAIR_EL1
], amair_el1
);
81 write_sysreg(ctxt
->sys_regs
[CNTKCTL_EL1
], cntkctl_el1
);
82 write_sysreg(ctxt
->sys_regs
[PAR_EL1
], par_el1
);
83 write_sysreg(ctxt
->sys_regs
[MDSCR_EL1
], mdscr_el1
);
85 write_sysreg(ctxt
->gp_regs
.regs
.sp
, sp_el0
);
86 write_sysreg(ctxt
->gp_regs
.regs
.pc
, elr_el2
);
87 write_sysreg(ctxt
->gp_regs
.regs
.pstate
, spsr_el2
);
88 write_sysreg(ctxt
->gp_regs
.sp_el1
, sp_el1
);
89 write_sysreg(ctxt
->gp_regs
.elr_el1
, elr_el1
);
90 write_sysreg(ctxt
->gp_regs
.spsr
[KVM_SPSR_EL1
], spsr_el1
);
93 void __hyp_text
__sysreg32_save_state(struct kvm_vcpu
*vcpu
)
97 if (read_sysreg(hcr_el2
) & HCR_RW
)
100 spsr
= vcpu
->arch
.ctxt
.gp_regs
.spsr
;
101 sysreg
= vcpu
->arch
.ctxt
.sys_regs
;
103 spsr
[KVM_SPSR_ABT
] = read_sysreg(spsr_abt
);
104 spsr
[KVM_SPSR_UND
] = read_sysreg(spsr_und
);
105 spsr
[KVM_SPSR_IRQ
] = read_sysreg(spsr_irq
);
106 spsr
[KVM_SPSR_FIQ
] = read_sysreg(spsr_fiq
);
108 sysreg
[DACR32_EL2
] = read_sysreg(dacr32_el2
);
109 sysreg
[IFSR32_EL2
] = read_sysreg(ifsr32_el2
);
111 if (__fpsimd_enabled())
112 sysreg
[FPEXC32_EL2
] = read_sysreg(fpexc32_el2
);
114 if (vcpu
->arch
.debug_flags
& KVM_ARM64_DEBUG_DIRTY
)
115 sysreg
[DBGVCR32_EL2
] = read_sysreg(dbgvcr32_el2
);
118 void __hyp_text
__sysreg32_restore_state(struct kvm_vcpu
*vcpu
)
122 if (read_sysreg(hcr_el2
) & HCR_RW
)
125 spsr
= vcpu
->arch
.ctxt
.gp_regs
.spsr
;
126 sysreg
= vcpu
->arch
.ctxt
.sys_regs
;
128 write_sysreg(spsr
[KVM_SPSR_ABT
], spsr_abt
);
129 write_sysreg(spsr
[KVM_SPSR_UND
], spsr_und
);
130 write_sysreg(spsr
[KVM_SPSR_IRQ
], spsr_irq
);
131 write_sysreg(spsr
[KVM_SPSR_FIQ
], spsr_fiq
);
133 write_sysreg(sysreg
[DACR32_EL2
], dacr32_el2
);
134 write_sysreg(sysreg
[IFSR32_EL2
], ifsr32_el2
);
136 if (vcpu
->arch
.debug_flags
& KVM_ARM64_DEBUG_DIRTY
)
137 write_sysreg(sysreg
[DBGVCR32_EL2
], dbgvcr32_el2
);