1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
5 * Copyright (C) 2008 David Brownell
8 #include <linux/module.h>
9 #include <linux/string.h>
10 #include <linux/slab.h>
11 #include <linux/init.h>
12 #include <linux/err.h>
13 #include <linux/platform_device.h>
15 #include <linux/of_device.h>
16 #include <linux/regulator/driver.h>
17 #include <linux/regulator/machine.h>
18 #include <linux/regulator/of_regulator.h>
19 #include <linux/mfd/twl.h>
20 #include <linux/delay.h>
23 * The TWL4030/TW5030/TPS659x0 family chips include power management, a
24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
25 * include an audio codec, battery charger, and more voltage regulators.
26 * These chips are often used in OMAP-based systems.
28 * This driver implements software-based resource control for various
29 * voltage regulators. This is usually augmented with state machine
34 /* start of regulator's PM_RECEIVER control register bank */
37 /* twl resource ID, for resource control state machine */
40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
44 /* State REMAP default configuration */
47 /* used by regulator core */
48 struct regulator_desc desc
;
50 /* chip specific features */
51 unsigned long features
;
53 /* data passed from board for external get/set voltage */
58 /* LDO control registers ... offset is from the base of its register bank.
59 * The first three registers of all power resource banks help hardware to
60 * manage the various resource groups.
62 /* Common offset in TWL4030/6030 */
64 /* TWL4030 register offsets */
67 #define VREG_DEDICATED 3 /* LDO control */
68 #define VREG_VOLTAGE_SMPS_4030 9
69 /* TWL6030 register offsets */
72 #define VREG_VOLTAGE 3
73 #define VREG_VOLTAGE_SMPS 4
76 twlreg_read(struct twlreg_info
*info
, unsigned slave_subgp
, unsigned offset
)
81 status
= twl_i2c_read_u8(slave_subgp
,
82 &value
, info
->base
+ offset
);
83 return (status
< 0) ? status
: value
;
87 twlreg_write(struct twlreg_info
*info
, unsigned slave_subgp
, unsigned offset
,
90 return twl_i2c_write_u8(slave_subgp
,
91 value
, info
->base
+ offset
);
94 /*----------------------------------------------------------------------*/
96 /* generic power resource operations, which work on all regulators */
98 static int twlreg_grp(struct regulator_dev
*rdev
)
100 return twlreg_read(rdev_get_drvdata(rdev
), TWL_MODULE_PM_RECEIVER
,
105 * Enable/disable regulators by joining/leaving the P1 (processor) group.
106 * We assume nobody else is updating the DEV_GRP registers.
108 /* definition for 4030 family */
109 #define P3_GRP_4030 BIT(7) /* "peripherals" */
110 #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
111 #define P1_GRP_4030 BIT(5) /* CPU/Linux */
112 /* definition for 6030 family */
113 #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
114 #define P2_GRP_6030 BIT(1) /* "peripherals" */
115 #define P1_GRP_6030 BIT(0) /* CPU/Linux */
117 static int twl4030reg_is_enabled(struct regulator_dev
*rdev
)
119 int state
= twlreg_grp(rdev
);
124 return state
& P1_GRP_4030
;
127 #define PB_I2C_BUSY BIT(0)
128 #define PB_I2C_BWEN BIT(1)
130 /* Wait until buffer empty/ready to send a word on power bus. */
131 static int twl4030_wait_pb_ready(void)
139 ret
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &val
,
140 TWL4030_PM_MASTER_PB_CFG
);
144 if (!(val
& PB_I2C_BUSY
))
154 /* Send a word over the powerbus */
155 static int twl4030_send_pb_msg(unsigned msg
)
160 /* save powerbus configuration */
161 ret
= twl_i2c_read_u8(TWL_MODULE_PM_MASTER
, &val
,
162 TWL4030_PM_MASTER_PB_CFG
);
166 /* Enable i2c access to powerbus */
167 ret
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, val
| PB_I2C_BWEN
,
168 TWL4030_PM_MASTER_PB_CFG
);
172 ret
= twl4030_wait_pb_ready();
176 ret
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, msg
>> 8,
177 TWL4030_PM_MASTER_PB_WORD_MSB
);
181 ret
= twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, msg
& 0xff,
182 TWL4030_PM_MASTER_PB_WORD_LSB
);
186 ret
= twl4030_wait_pb_ready();
190 /* Restore powerbus configuration */
191 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER
, val
,
192 TWL4030_PM_MASTER_PB_CFG
);
195 static int twl4030reg_enable(struct regulator_dev
*rdev
)
197 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
201 grp
= twlreg_grp(rdev
);
207 ret
= twlreg_write(info
, TWL_MODULE_PM_RECEIVER
, VREG_GRP
, grp
);
212 static int twl4030reg_disable(struct regulator_dev
*rdev
)
214 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
218 grp
= twlreg_grp(rdev
);
222 grp
&= ~(P1_GRP_4030
| P2_GRP_4030
| P3_GRP_4030
);
224 ret
= twlreg_write(info
, TWL_MODULE_PM_RECEIVER
, VREG_GRP
, grp
);
229 static int twl4030reg_get_status(struct regulator_dev
*rdev
)
231 int state
= twlreg_grp(rdev
);
237 /* assume state != WARM_RESET; we'd not be running... */
239 return REGULATOR_STATUS_OFF
;
240 return (state
& BIT(3))
241 ? REGULATOR_STATUS_NORMAL
242 : REGULATOR_STATUS_STANDBY
;
245 static int twl4030reg_set_mode(struct regulator_dev
*rdev
, unsigned mode
)
247 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
250 /* We can only set the mode through state machine commands... */
252 case REGULATOR_MODE_NORMAL
:
253 message
= MSG_SINGULAR(DEV_GRP_P1
, info
->id
, RES_STATE_ACTIVE
);
255 case REGULATOR_MODE_STANDBY
:
256 message
= MSG_SINGULAR(DEV_GRP_P1
, info
->id
, RES_STATE_SLEEP
);
262 return twl4030_send_pb_msg(message
);
265 static inline unsigned int twl4030reg_map_mode(unsigned int mode
)
268 case RES_STATE_ACTIVE
:
269 return REGULATOR_MODE_NORMAL
;
270 case RES_STATE_SLEEP
:
271 return REGULATOR_MODE_STANDBY
;
273 return REGULATOR_MODE_INVALID
;
277 /*----------------------------------------------------------------------*/
280 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
281 * select field in its control register. We use tables indexed by VSEL
282 * to record voltages in milliVolts. (Accuracy is about three percent.)
284 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
285 * currently handled by listing two slightly different VAUX2 regulators,
286 * only one of which will be configured.
288 * VSEL values documented as "TI cannot support these values" are flagged
289 * in these tables as UNSUP() values; we normally won't assign them.
291 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
292 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
294 #define UNSUP_MASK 0x8000
296 #define UNSUP(x) (UNSUP_MASK | (x))
297 #define IS_UNSUP(info, x) \
298 ((UNSUP_MASK & (x)) && \
299 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
300 #define LDO_MV(x) (~UNSUP_MASK & (x))
303 static const u16 VAUX1_VSEL_table
[] = {
304 UNSUP(1500), UNSUP(1800), 2500, 2800,
305 3000, 3000, 3000, 3000,
307 static const u16 VAUX2_4030_VSEL_table
[] = {
308 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
309 1500, 1800, UNSUP(1850), 2500,
310 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
311 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
313 static const u16 VAUX2_VSEL_table
[] = {
314 1700, 1700, 1900, 1300,
315 1500, 1800, 2000, 2500,
316 2100, 2800, 2200, 2300,
317 2400, 2400, 2400, 2400,
319 static const u16 VAUX3_VSEL_table
[] = {
320 1500, 1800, 2500, 2800,
321 3000, 3000, 3000, 3000,
323 static const u16 VAUX4_VSEL_table
[] = {
324 700, 1000, 1200, UNSUP(1300),
325 1500, 1800, UNSUP(1850), 2500,
326 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
327 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
329 static const u16 VMMC1_VSEL_table
[] = {
330 1850, 2850, 3000, 3150,
332 static const u16 VMMC2_VSEL_table
[] = {
333 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
334 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
335 2600, 2800, 2850, 3000,
336 3150, 3150, 3150, 3150,
338 static const u16 VPLL1_VSEL_table
[] = {
339 1000, 1200, 1300, 1800,
340 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
342 static const u16 VPLL2_VSEL_table
[] = {
343 700, 1000, 1200, 1300,
344 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
345 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
346 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
348 static const u16 VSIM_VSEL_table
[] = {
349 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
350 2800, 3000, 3000, 3000,
352 static const u16 VDAC_VSEL_table
[] = {
353 1200, 1300, 1800, 1800,
355 static const u16 VIO_VSEL_table
[] = {
358 static const u16 VINTANA2_VSEL_table
[] = {
362 /* 600mV to 1450mV in 12.5 mV steps */
363 static const struct linear_range VDD1_ranges
[] = {
364 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500)
367 /* 600mV to 1450mV in 12.5 mV steps, everything above = 1500mV */
368 static const struct linear_range VDD2_ranges
[] = {
369 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500),
370 REGULATOR_LINEAR_RANGE(1500000, 69, 69, 12500)
373 static int twl4030ldo_list_voltage(struct regulator_dev
*rdev
, unsigned index
)
375 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
376 int mV
= info
->table
[index
];
378 return IS_UNSUP(info
, mV
) ? 0 : (LDO_MV(mV
) * 1000);
382 twl4030ldo_set_voltage_sel(struct regulator_dev
*rdev
, unsigned selector
)
384 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
386 return twlreg_write(info
, TWL_MODULE_PM_RECEIVER
, VREG_VOLTAGE
,
390 static int twl4030ldo_get_voltage_sel(struct regulator_dev
*rdev
)
392 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
393 int vsel
= twlreg_read(info
, TWL_MODULE_PM_RECEIVER
, VREG_VOLTAGE
);
398 vsel
&= info
->table_len
- 1;
402 static const struct regulator_ops twl4030ldo_ops
= {
403 .list_voltage
= twl4030ldo_list_voltage
,
405 .set_voltage_sel
= twl4030ldo_set_voltage_sel
,
406 .get_voltage_sel
= twl4030ldo_get_voltage_sel
,
408 .enable
= twl4030reg_enable
,
409 .disable
= twl4030reg_disable
,
410 .is_enabled
= twl4030reg_is_enabled
,
412 .set_mode
= twl4030reg_set_mode
,
414 .get_status
= twl4030reg_get_status
,
418 twl4030smps_set_voltage(struct regulator_dev
*rdev
, int min_uV
, int max_uV
,
421 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
422 int vsel
= DIV_ROUND_UP(min_uV
- 600000, 12500);
424 twlreg_write(info
, TWL_MODULE_PM_RECEIVER
, VREG_VOLTAGE_SMPS_4030
, vsel
);
429 static int twl4030smps_get_voltage(struct regulator_dev
*rdev
)
431 struct twlreg_info
*info
= rdev_get_drvdata(rdev
);
434 vsel
= twlreg_read(info
, TWL_MODULE_PM_RECEIVER
,
435 VREG_VOLTAGE_SMPS_4030
);
437 return vsel
* 12500 + 600000;
440 static const struct regulator_ops twl4030smps_ops
= {
441 .list_voltage
= regulator_list_voltage_linear_range
,
443 .set_voltage
= twl4030smps_set_voltage
,
444 .get_voltage
= twl4030smps_get_voltage
,
447 /*----------------------------------------------------------------------*/
449 static const struct regulator_ops twl4030fixed_ops
= {
450 .list_voltage
= regulator_list_voltage_linear
,
452 .enable
= twl4030reg_enable
,
453 .disable
= twl4030reg_disable
,
454 .is_enabled
= twl4030reg_is_enabled
,
456 .set_mode
= twl4030reg_set_mode
,
458 .get_status
= twl4030reg_get_status
,
461 /*----------------------------------------------------------------------*/
463 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
464 static const struct twlreg_info TWL4030_INFO_##label = { \
467 .table_len = ARRAY_SIZE(label##_VSEL_table), \
468 .table = label##_VSEL_table, \
469 .remap = remap_conf, \
472 .id = TWL4030_REG_##label, \
473 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
474 .ops = &twl4030ldo_ops, \
475 .type = REGULATOR_VOLTAGE, \
476 .owner = THIS_MODULE, \
477 .enable_time = turnon_delay, \
478 .of_map_mode = twl4030reg_map_mode, \
482 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf, \
484 static const struct twlreg_info TWL4030_INFO_##label = { \
487 .remap = remap_conf, \
490 .id = TWL4030_REG_##label, \
491 .ops = &twl4030smps_ops, \
492 .type = REGULATOR_VOLTAGE, \
493 .owner = THIS_MODULE, \
494 .enable_time = turnon_delay, \
495 .of_map_mode = twl4030reg_map_mode, \
496 .n_voltages = n_volt, \
497 .n_linear_ranges = ARRAY_SIZE(label ## _ranges), \
498 .linear_ranges = label ## _ranges, \
502 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
504 static const struct twlreg_info TWLFIXED_INFO_##label = { \
507 .remap = remap_conf, \
510 .id = TWL4030##_REG_##label, \
512 .ops = &twl4030fixed_ops, \
513 .type = REGULATOR_VOLTAGE, \
514 .owner = THIS_MODULE, \
515 .min_uV = mVolts * 1000, \
516 .enable_time = turnon_delay, \
517 .of_map_mode = twl4030reg_map_mode, \
522 * We list regulators here if systems need some level of
523 * software control over them after boot.
525 TWL4030_ADJUSTABLE_LDO(VAUX1
, 0x17, 1, 100, 0x08);
526 TWL4030_ADJUSTABLE_LDO(VAUX2_4030
, 0x1b, 2, 100, 0x08);
527 TWL4030_ADJUSTABLE_LDO(VAUX2
, 0x1b, 2, 100, 0x08);
528 TWL4030_ADJUSTABLE_LDO(VAUX3
, 0x1f, 3, 100, 0x08);
529 TWL4030_ADJUSTABLE_LDO(VAUX4
, 0x23, 4, 100, 0x08);
530 TWL4030_ADJUSTABLE_LDO(VMMC1
, 0x27, 5, 100, 0x08);
531 TWL4030_ADJUSTABLE_LDO(VMMC2
, 0x2b, 6, 100, 0x08);
532 TWL4030_ADJUSTABLE_LDO(VPLL1
, 0x2f, 7, 100, 0x00);
533 TWL4030_ADJUSTABLE_LDO(VPLL2
, 0x33, 8, 100, 0x08);
534 TWL4030_ADJUSTABLE_LDO(VSIM
, 0x37, 9, 100, 0x00);
535 TWL4030_ADJUSTABLE_LDO(VDAC
, 0x3b, 10, 100, 0x08);
536 TWL4030_ADJUSTABLE_LDO(VINTANA2
, 0x43, 12, 100, 0x08);
537 TWL4030_ADJUSTABLE_LDO(VIO
, 0x4b, 14, 1000, 0x08);
538 TWL4030_ADJUSTABLE_SMPS(VDD1
, 0x55, 15, 1000, 0x08, 68);
539 TWL4030_ADJUSTABLE_SMPS(VDD2
, 0x63, 16, 1000, 0x08, 69);
540 /* VUSBCP is managed *only* by the USB subchip */
541 TWL4030_FIXED_LDO(VINTANA1
, 0x3f, 1500, 11, 100, 0x08);
542 TWL4030_FIXED_LDO(VINTDIG
, 0x47, 1500, 13, 100, 0x08);
543 TWL4030_FIXED_LDO(VUSB1V5
, 0x71, 1500, 17, 100, 0x08);
544 TWL4030_FIXED_LDO(VUSB1V8
, 0x74, 1800, 18, 100, 0x08);
545 TWL4030_FIXED_LDO(VUSB3V1
, 0x77, 3100, 19, 150, 0x08);
547 #define TWL_OF_MATCH(comp, family, label) \
549 .compatible = comp, \
550 .data = &family##_INFO_##label, \
553 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
554 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
555 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
556 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
557 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
559 static const struct of_device_id twl_of_match
[] = {
560 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1
),
561 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030
),
562 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2
),
563 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3
),
564 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4
),
565 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1
),
566 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2
),
567 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1
),
568 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2
),
569 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM
),
570 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC
),
571 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2
),
572 TWL4030_OF_MATCH("ti,twl4030-vio", VIO
),
573 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1
),
574 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2
),
575 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1
),
576 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG
),
577 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5
),
578 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8
),
579 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1
),
582 MODULE_DEVICE_TABLE(of
, twl_of_match
);
584 static int twlreg_probe(struct platform_device
*pdev
)
587 struct twlreg_info
*info
;
588 const struct twlreg_info
*template;
589 struct regulator_init_data
*initdata
;
590 struct regulation_constraints
*c
;
591 struct regulator_dev
*rdev
;
592 struct regulator_config config
= { };
594 template = of_device_get_match_data(&pdev
->dev
);
598 id
= template->desc
.id
;
599 initdata
= of_get_regulator_init_data(&pdev
->dev
, pdev
->dev
.of_node
,
604 info
= devm_kmemdup(&pdev
->dev
, template, sizeof(*info
), GFP_KERNEL
);
608 /* Constrain board-specific capabilities according to what
609 * this driver and the chip itself can actually do.
611 c
= &initdata
->constraints
;
612 c
->valid_modes_mask
&= REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY
;
613 c
->valid_ops_mask
&= REGULATOR_CHANGE_VOLTAGE
614 | REGULATOR_CHANGE_MODE
615 | REGULATOR_CHANGE_STATUS
;
617 case TWL4030_REG_VIO
:
618 case TWL4030_REG_VDD1
:
619 case TWL4030_REG_VDD2
:
620 case TWL4030_REG_VPLL1
:
621 case TWL4030_REG_VINTANA1
:
622 case TWL4030_REG_VINTANA2
:
623 case TWL4030_REG_VINTDIG
:
630 config
.dev
= &pdev
->dev
;
631 config
.init_data
= initdata
;
632 config
.driver_data
= info
;
633 config
.of_node
= pdev
->dev
.of_node
;
635 rdev
= devm_regulator_register(&pdev
->dev
, &info
->desc
, &config
);
637 dev_err(&pdev
->dev
, "can't register %s, %ld\n",
638 info
->desc
.name
, PTR_ERR(rdev
));
639 return PTR_ERR(rdev
);
641 platform_set_drvdata(pdev
, rdev
);
643 twlreg_write(info
, TWL_MODULE_PM_RECEIVER
, VREG_REMAP
, info
->remap
);
645 /* NOTE: many regulators support short-circuit IRQs (presentable
646 * as REGULATOR_OVER_CURRENT notifications?) configured via:
648 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
649 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
656 MODULE_ALIAS("platform:twl4030_reg");
658 static struct platform_driver twlreg_driver
= {
659 .probe
= twlreg_probe
,
660 /* NOTE: short name, to work around driver model truncation of
661 * "twl_regulator.12" (and friends) to "twl_regulator.1".
664 .name
= "twl4030_reg",
665 .of_match_table
= of_match_ptr(twl_of_match
),
669 static int __init
twlreg_init(void)
671 return platform_driver_register(&twlreg_driver
);
673 subsys_initcall(twlreg_init
);
675 static void __exit
twlreg_exit(void)
677 platform_driver_unregister(&twlreg_driver
);
679 module_exit(twlreg_exit
)
681 MODULE_DESCRIPTION("TWL4030 regulator driver");
682 MODULE_LICENSE("GPL");