arch/arm64/include/asm/processor.h

   1 /*
   2  * Based on arch/arm/include/asm/processor.h
   3  *
   4  * Copyright (C) 1995-1999 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef __ASM_PROCESSOR_H
  20 #define __ASM_PROCESSOR_H
  21
  22 /*
  23  * Default implementation of macro that returns current
  24  * instruction pointer ("program counter").
  25  */
  26 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  27
  28 #ifdef __KERNEL__
  29
  30 #include <linux/string.h>
  31
  32 #include <asm/fpsimd.h>
  33 #include <asm/hw_breakpoint.h>
  34 #include <asm/ptrace.h>
  35 #include <asm/types.h>
  36
  37 #ifdef __KERNEL__
  38 #define STACK_TOP_MAX           TASK_SIZE_64
  39 #ifdef CONFIG_COMPAT
  40 #define AARCH32_VECTORS_BASE    0xffff0000
  41 #define STACK_TOP               (test_thread_flag(TIF_32BIT) ? \
  42                                 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  43 #else
  44 #define STACK_TOP               STACK_TOP_MAX
  45 #endif /* CONFIG_COMPAT */
  46
  47 #define ARCH_LOW_ADDRESS_LIMIT  PHYS_MASK
  48 #endif /* __KERNEL__ */
  49
  50 struct debug_info {
  51         /* Have we suspended stepping by a debugger? */
  52         int                     suspended_step;
  53         /* Allow breakpoints and watchpoints to be disabled for this thread. */
  54         int                     bps_disabled;
  55         int                     wps_disabled;
  56         /* Hardware breakpoints pinned to this task. */
  57         struct perf_event       *hbp_break[ARM_MAX_BRP];
  58         struct perf_event       *hbp_watch[ARM_MAX_WRP];
  59 };
  60
  61 struct cpu_context {
  62         unsigned long x19;
  63         unsigned long x20;
  64         unsigned long x21;
  65         unsigned long x22;
  66         unsigned long x23;
  67         unsigned long x24;
  68         unsigned long x25;
  69         unsigned long x26;
  70         unsigned long x27;
  71         unsigned long x28;
  72         unsigned long fp;
  73         unsigned long sp;
  74         unsigned long pc;
  75 };
  76
  77 struct thread_struct {
  78         struct cpu_context      cpu_context;    /* cpu context */
  79         unsigned long           tp_value;
  80         struct fpsimd_state     fpsimd_state;
  81         unsigned long           fault_address;  /* fault info */
  82         unsigned long           fault_code;     /* ESR_EL1 value */
  83         struct debug_info       debug;          /* debugging */
  84 };
  85
  86 #define INIT_THREAD  {  }
  87
  88 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
  89 {
  90         memset(regs, 0, sizeof(*regs));
  91         regs->syscallno = ~0UL;
  92         regs->pc = pc;
  93 }
  94
  95 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
  96                                 unsigned long sp)
  97 {
  98         start_thread_common(regs, pc);
  99         regs->pstate = PSR_MODE_EL0t;
 100         regs->sp = sp;
 101 }
 102
 103 #ifdef CONFIG_COMPAT
 104 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
 105                                        unsigned long sp)
 106 {
 107         start_thread_common(regs, pc);
 108         regs->pstate = COMPAT_PSR_MODE_USR;
 109         if (pc & 1)
 110                 regs->pstate |= COMPAT_PSR_T_BIT;
 111
 112 #ifdef __AARCH64EB__
 113         regs->pstate |= COMPAT_PSR_E_BIT;
 114 #endif
 115
 116         regs->compat_sp = sp;
 117 }
 118 #endif
 119
 120 /* Forward declaration, a strange C thing */
 121 struct task_struct;
 122
 123 /* Free all resources held by a thread. */
 124 extern void release_thread(struct task_struct *);
 125
 126 /* Prepare to copy thread state - unlazy all lazy status */
 127 #define prepare_to_copy(tsk)    do { } while (0)
 128
 129 unsigned long get_wchan(struct task_struct *p);
 130
 131 #define cpu_relax()                     barrier()
 132 #define cpu_relax_lowlatency()                cpu_relax()
 133
 134 /* Thread switching */
 135 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
 136                                          struct task_struct *next);
 137
 138 #define task_pt_regs(p) \
 139         ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
 140
 141 #define KSTK_EIP(tsk)   ((unsigned long)task_pt_regs(tsk)->pc)
 142 #define KSTK_ESP(tsk)   ((unsigned long)task_pt_regs(tsk)->sp)
 143
 144 /*
 145  * Prefetching support
 146  */
 147 #define ARCH_HAS_PREFETCH
 148 static inline void prefetch(const void *ptr)
 149 {
 150         asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
 151 }
 152
 153 #define ARCH_HAS_PREFETCHW
 154 static inline void prefetchw(const void *ptr)
 155 {
 156         asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
 157 }
 158
 159 #define ARCH_HAS_SPINLOCK_PREFETCH
 160 static inline void spin_lock_prefetch(const void *x)
 161 {
 162         prefetchw(x);
 163 }
 164
 165 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 166
 167 #endif
 168
 169 #endif /* __ASM_PROCESSOR_H */