arch/arm64/kernel/smp_spin_table.c

   1 /*
   2  * Spin Table SMP initialisation
   3  *
   4  * Copyright (C) 2013 ARM Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #include <linux/delay.h>
  20 #include <linux/init.h>
  21 #include <linux/of.h>
  22 #include <linux/smp.h>
  23
  24 #include <asm/cacheflush.h>
  25 #include <asm/cpu_ops.h>
  26 #include <asm/cputype.h>
  27 #include <asm/smp_plat.h>
  28
  29 extern void secondary_holding_pen(void);
  30 volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
  31
  32 static phys_addr_t cpu_release_addr[NR_CPUS];
  33
  34 /*
  35  * Write secondary_holding_pen_release in a way that is guaranteed to be
  36  * visible to all observers, irrespective of whether they're taking part
  37  * in coherency or not.  This is necessary for the hotplug code to work
  38  * reliably.
  39  */
  40 static void write_pen_release(u64 val)
  41 {
  42         void *start = (void *)&secondary_holding_pen_release;
  43         unsigned long size = sizeof(secondary_holding_pen_release);
  44
  45         secondary_holding_pen_release = val;
  46         __flush_dcache_area(start, size);
  47 }
  48
  49
  50 static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
  51 {
  52         /*
  53          * Determine the address from which the CPU is polling.
  54          */
  55         if (of_property_read_u64(dn, "cpu-release-addr",
  56                                  &cpu_release_addr[cpu])) {
  57                 pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
  58                        cpu);
  59
  60                 return -1;
  61         }
  62
  63         return 0;
  64 }
  65
  66 static int smp_spin_table_cpu_prepare(unsigned int cpu)
  67 {
  68         void **release_addr;
  69
  70         if (!cpu_release_addr[cpu])
  71                 return -ENODEV;
  72
  73         release_addr = __va(cpu_release_addr[cpu]);
  74
  75         /*
  76          * We write the release address as LE regardless of the native
  77          * endianess of the kernel. Therefore, any boot-loaders that
  78          * read this address need to convert this address to the
  79          * boot-loader's endianess before jumping. This is mandated by
  80          * the boot protocol.
  81          */
  82         release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen));
  83
  84         __flush_dcache_area(release_addr, sizeof(release_addr[0]));
  85
  86         /*
  87          * Send an event to wake up the secondary CPU.
  88          */
  89         sev();
  90
  91         return 0;
  92 }
  93
  94 static int smp_spin_table_cpu_boot(unsigned int cpu)
  95 {
  96         /*
  97          * Update the pen release flag.
  98          */
  99         write_pen_release(cpu_logical_map(cpu));
 100
 101         /*
 102          * Send an event, causing the secondaries to read pen_release.
 103          */
 104         sev();
 105
 106         return 0;
 107 }
 108
 109 const struct cpu_operations smp_spin_table_ops = {
 110         .name           = "spin-table",
 111         .cpu_init       = smp_spin_table_cpu_init,
 112         .cpu_prepare    = smp_spin_table_cpu_prepare,
 113         .cpu_boot       = smp_spin_table_cpu_boot,
 114 };