arch/blackfin/mach-bf537/boards/cm_bf537e.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *           2008-2009 Bluetechnix
   4  *                2005 National ICT Australia (NICTA)
   5  *                      Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/export.h>
  12 #include <linux/etherdevice.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/spi/flash.h>
  19 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  20 #include <linux/usb/isp1362.h>
  21 #endif
  22 #include <linux/ata_platform.h>
  23 #include <linux/irq.h>
  24 #include <linux/gpio.h>
  25 #include <asm/dma.h>
  26 #include <asm/bfin5xx_spi.h>
  27 #include <asm/portmux.h>
  28 #include <asm/dpmc.h>
  29 #include <asm/bfin_sport.h>
  30
  31 /*
  32  * Name the Board for the /proc/cpuinfo
  33  */
  34 const char bfin_board_name[] = "Bluetechnix CM BF537E";
  35
  36 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  37 /* all SPI peripherals info goes here */
  38
  39 #if IS_ENABLED(CONFIG_MTD_M25P80)
  40 static struct mtd_partition bfin_spi_flash_partitions[] = {
  41         {
  42                 .name = "bootloader(spi)",
  43                 .size = 0x00020000,
  44                 .offset = 0,
  45                 .mask_flags = MTD_CAP_ROM
  46         }, {
  47                 .name = "linux kernel(spi)",
  48                 .size = 0xe0000,
  49                 .offset = 0x20000
  50         }, {
  51                 .name = "file system(spi)",
  52                 .size = 0x700000,
  53                 .offset = 0x00100000,
  54         }
  55 };
  56
  57 static struct flash_platform_data bfin_spi_flash_data = {
  58         .name = "m25p80",
  59         .parts = bfin_spi_flash_partitions,
  60         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  61         .type = "m25p64",
  62 };
  63
  64 /* SPI flash chip (m25p64) */
  65 static struct bfin5xx_spi_chip spi_flash_chip_info = {
  66         .enable_dma = 0,         /* use dma transfer with this chip*/
  67 };
  68 #endif
  69
  70 #if IS_ENABLED(CONFIG_MMC_SPI)
  71 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
  72         .enable_dma = 0,
  73 };
  74 #endif
  75
  76 static struct spi_board_info bfin_spi_board_info[] __initdata = {
  77 #if IS_ENABLED(CONFIG_MTD_M25P80)
  78         {
  79                 /* the modalias must be the same as spi device driver name */
  80                 .modalias = "m25p80", /* Name of spi_driver for this device */
  81                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
  82                 .bus_num = 0, /* Framework bus number */
  83                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  84                 .platform_data = &bfin_spi_flash_data,
  85                 .controller_data = &spi_flash_chip_info,
  86                 .mode = SPI_MODE_3,
  87         },
  88 #endif
  89
  90 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  91         {
  92                 .modalias = "ad183x",
  93                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
  94                 .bus_num = 0,
  95                 .chip_select = 4,
  96         },
  97 #endif
  98
  99 #if IS_ENABLED(CONFIG_MMC_SPI)
 100         {
 101                 .modalias = "mmc_spi",
 102                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 103                 .bus_num = 0,
 104                 .chip_select = 1,
 105                 .controller_data = &mmc_spi_chip_info,
 106                 .mode = SPI_MODE_3,
 107         },
 108 #endif
 109 };
 110
 111 /* SPI (0) */
 112 static struct resource bfin_spi0_resource[] = {
 113         [0] = {
 114                 .start = SPI0_REGBASE,
 115                 .end   = SPI0_REGBASE + 0xFF,
 116                 .flags = IORESOURCE_MEM,
 117                 },
 118         [1] = {
 119                 .start = CH_SPI,
 120                 .end   = CH_SPI,
 121                 .flags = IORESOURCE_DMA,
 122         },
 123         [2] = {
 124                 .start = IRQ_SPI,
 125                 .end   = IRQ_SPI,
 126                 .flags = IORESOURCE_IRQ,
 127         },
 128 };
 129
 130 /* SPI controller data */
 131 static struct bfin5xx_spi_master bfin_spi0_info = {
 132         .num_chipselect = 8,
 133         .enable_dma = 1,  /* master has the ability to do dma transfer */
 134         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 135 };
 136
 137 static struct platform_device bfin_spi0_device = {
 138         .name = "bfin-spi",
 139         .id = 0, /* Bus number */
 140         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 141         .resource = bfin_spi0_resource,
 142         .dev = {
 143                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 144         },
 145 };
 146 #endif  /* spi master and devices */
 147
 148 #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
 149
 150 /* SPORT SPI controller data */
 151 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
 152         .num_chipselect = MAX_BLACKFIN_GPIOS,
 153         .enable_dma = 0,  /* master don't support DMA */
 154         .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
 155                 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
 156 };
 157
 158 static struct resource bfin_sport_spi0_resource[] = {
 159         [0] = {
 160                 .start = SPORT0_TCR1,
 161                 .end   = SPORT0_TCR1 + 0xFF,
 162                 .flags = IORESOURCE_MEM,
 163                 },
 164         [1] = {
 165                 .start = IRQ_SPORT0_ERROR,
 166                 .end   = IRQ_SPORT0_ERROR,
 167                 .flags = IORESOURCE_IRQ,
 168                 },
 169 };
 170
 171 static struct platform_device bfin_sport_spi0_device = {
 172         .name = "bfin-sport-spi",
 173         .id = 1, /* Bus number */
 174         .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
 175         .resource = bfin_sport_spi0_resource,
 176         .dev = {
 177                 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
 178         },
 179 };
 180
 181 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
 182         .num_chipselect = MAX_BLACKFIN_GPIOS,
 183         .enable_dma = 0,  /* master don't support DMA */
 184         .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
 185                 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
 186 };
 187
 188 static struct resource bfin_sport_spi1_resource[] = {
 189         [0] = {
 190                 .start = SPORT1_TCR1,
 191                 .end   = SPORT1_TCR1 + 0xFF,
 192                 .flags = IORESOURCE_MEM,
 193                 },
 194         [1] = {
 195                 .start = IRQ_SPORT1_ERROR,
 196                 .end   = IRQ_SPORT1_ERROR,
 197                 .flags = IORESOURCE_IRQ,
 198                 },
 199 };
 200
 201 static struct platform_device bfin_sport_spi1_device = {
 202         .name = "bfin-sport-spi",
 203         .id = 2, /* Bus number */
 204         .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
 205         .resource = bfin_sport_spi1_resource,
 206         .dev = {
 207                 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
 208         },
 209 };
 210
 211 #endif  /* sport spi master and devices */
 212
 213 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
 214 static struct platform_device rtc_device = {
 215         .name = "rtc-bfin",
 216         .id   = -1,
 217 };
 218 #endif
 219
 220 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
 221 static struct platform_device hitachi_fb_device = {
 222         .name = "hitachi-tx09",
 223 };
 224 #endif
 225
 226 #if IS_ENABLED(CONFIG_SMC91X)
 227 #include <linux/smc91x.h>
 228
 229 static struct smc91x_platdata smc91x_info = {
 230         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 231         .leda = RPC_LED_100_10,
 232         .ledb = RPC_LED_TX_RX,
 233 };
 234
 235 static struct resource smc91x_resources[] = {
 236         {
 237                 .start = 0x20200300,
 238                 .end = 0x20200300 + 16,
 239                 .flags = IORESOURCE_MEM,
 240         }, {
 241                 .start = IRQ_PF14,
 242                 .end = IRQ_PF14,
 243                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 244                 },
 245 };
 246
 247 static struct platform_device smc91x_device = {
 248         .name = "smc91x",
 249         .id = 0,
 250         .num_resources = ARRAY_SIZE(smc91x_resources),
 251         .resource = smc91x_resources,
 252         .dev    = {
 253                 .platform_data  = &smc91x_info,
 254         },
 255 };
 256 #endif
 257
 258 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
 259 static struct resource isp1362_hcd_resources[] = {
 260         {
 261                 .start = 0x20308000,
 262                 .end = 0x20308000,
 263                 .flags = IORESOURCE_MEM,
 264         }, {
 265                 .start = 0x20308004,
 266                 .end = 0x20308004,
 267                 .flags = IORESOURCE_MEM,
 268         }, {
 269                 .start = IRQ_PG15,
 270                 .end = IRQ_PG15,
 271                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 272         },
 273 };
 274
 275 static struct isp1362_platform_data isp1362_priv = {
 276         .sel15Kres = 1,
 277         .clknotstop = 0,
 278         .oc_enable = 0,
 279         .int_act_high = 0,
 280         .int_edge_triggered = 0,
 281         .remote_wakeup_connected = 0,
 282         .no_power_switching = 1,
 283         .power_switching_mode = 0,
 284 };
 285
 286 static struct platform_device isp1362_hcd_device = {
 287         .name = "isp1362-hcd",
 288         .id = 0,
 289         .dev = {
 290                 .platform_data = &isp1362_priv,
 291         },
 292         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 293         .resource = isp1362_hcd_resources,
 294 };
 295 #endif
 296
 297 #if IS_ENABLED(CONFIG_USB_NET2272)
 298 static struct resource net2272_bfin_resources[] = {
 299         {
 300                 .start = 0x20300000,
 301                 .end = 0x20300000 + 0x100,
 302                 .flags = IORESOURCE_MEM,
 303         }, {
 304                 .start = IRQ_PG13,
 305                 .end = IRQ_PG13,
 306                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 307         },
 308 };
 309
 310 static struct platform_device net2272_bfin_device = {
 311         .name = "net2272",
 312         .id = -1,
 313         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 314         .resource = net2272_bfin_resources,
 315 };
 316 #endif
 317
 318 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
 319 static struct mtd_partition cm_partitions[] = {
 320         {
 321                 .name   = "bootloader(nor)",
 322                 .size   = 0x40000,
 323                 .offset = 0,
 324         }, {
 325                 .name   = "linux kernel(nor)",
 326                 .size   = 0x100000,
 327                 .offset = MTDPART_OFS_APPEND,
 328         }, {
 329                 .name   = "file system(nor)",
 330                 .size   = MTDPART_SIZ_FULL,
 331                 .offset = MTDPART_OFS_APPEND,
 332         }
 333 };
 334
 335 static struct physmap_flash_data cm_flash_data = {
 336         .width    = 2,
 337         .parts    = cm_partitions,
 338         .nr_parts = ARRAY_SIZE(cm_partitions),
 339 };
 340
 341 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
 342
 343 static struct resource cm_flash_resource[] = {
 344         {
 345                 .name  = "cfi_probe",
 346                 .start = 0x20000000,
 347                 .end   = 0x201fffff,
 348                 .flags = IORESOURCE_MEM,
 349         }, {
 350                 .start = (unsigned long)cm_flash_gpios,
 351                 .end   = ARRAY_SIZE(cm_flash_gpios),
 352                 .flags = IORESOURCE_IRQ,
 353         }
 354 };
 355
 356 static struct platform_device cm_flash_device = {
 357         .name          = "gpio-addr-flash",
 358         .id            = 0,
 359         .dev = {
 360                 .platform_data = &cm_flash_data,
 361         },
 362         .num_resources = ARRAY_SIZE(cm_flash_resource),
 363         .resource      = cm_flash_resource,
 364 };
 365 #endif
 366
 367 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 368 #ifdef CONFIG_SERIAL_BFIN_UART0
 369 static struct resource bfin_uart0_resources[] = {
 370         {
 371                 .start = UART0_THR,
 372                 .end = UART0_GCTL+2,
 373                 .flags = IORESOURCE_MEM,
 374         },
 375         {
 376                 .start = IRQ_UART0_TX,
 377                 .end = IRQ_UART0_TX,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380         {
 381                 .start = IRQ_UART0_RX,
 382                 .end = IRQ_UART0_RX,
 383                 .flags = IORESOURCE_IRQ,
 384         },
 385         {
 386                 .start = IRQ_UART0_ERROR,
 387                 .end = IRQ_UART0_ERROR,
 388                 .flags = IORESOURCE_IRQ,
 389         },
 390         {
 391                 .start = CH_UART0_TX,
 392                 .end = CH_UART0_TX,
 393                 .flags = IORESOURCE_DMA,
 394         },
 395         {
 396                 .start = CH_UART0_RX,
 397                 .end = CH_UART0_RX,
 398                 .flags = IORESOURCE_DMA,
 399         },
 400 #ifdef CONFIG_BFIN_UART0_CTSRTS
 401         {
 402                 /*
 403                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 404                  */
 405                 .start = -1,
 406                 .end = -1,
 407                 .flags = IORESOURCE_IO,
 408         },
 409         {
 410                 /*
 411                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 412                  */
 413                 .start = -1,
 414                 .end = -1,
 415                 .flags = IORESOURCE_IO,
 416         },
 417 #endif
 418 };
 419
 420 static unsigned short bfin_uart0_peripherals[] = {
 421         P_UART0_TX, P_UART0_RX, 0
 422 };
 423
 424 static struct platform_device bfin_uart0_device = {
 425         .name = "bfin-uart",
 426         .id = 0,
 427         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 428         .resource = bfin_uart0_resources,
 429         .dev = {
 430                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 431         },
 432 };
 433 #endif
 434 #ifdef CONFIG_SERIAL_BFIN_UART1
 435 static struct resource bfin_uart1_resources[] = {
 436         {
 437                 .start = UART1_THR,
 438                 .end = UART1_GCTL+2,
 439                 .flags = IORESOURCE_MEM,
 440         },
 441         {
 442                 .start = IRQ_UART1_TX,
 443                 .end = IRQ_UART1_TX,
 444                 .flags = IORESOURCE_IRQ,
 445         },
 446         {
 447                 .start = IRQ_UART1_RX,
 448                 .end = IRQ_UART1_RX,
 449                 .flags = IORESOURCE_IRQ,
 450         },
 451         {
 452                 .start = IRQ_UART1_ERROR,
 453                 .end = IRQ_UART1_ERROR,
 454                 .flags = IORESOURCE_IRQ,
 455         },
 456         {
 457                 .start = CH_UART1_TX,
 458                 .end = CH_UART1_TX,
 459                 .flags = IORESOURCE_DMA,
 460         },
 461         {
 462                 .start = CH_UART1_RX,
 463                 .end = CH_UART1_RX,
 464                 .flags = IORESOURCE_DMA,
 465         },
 466 #ifdef CONFIG_BFIN_UART1_CTSRTS
 467         {
 468                 /*
 469                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 470                  */
 471                 .start = -1,
 472                 .end = -1,
 473                 .flags = IORESOURCE_IO,
 474         },
 475         {
 476                 /*
 477                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 478                  */
 479                 .start = -1,
 480                 .end = -1,
 481                 .flags = IORESOURCE_IO,
 482         },
 483 #endif
 484 };
 485
 486 static unsigned short bfin_uart1_peripherals[] = {
 487         P_UART1_TX, P_UART1_RX, 0
 488 };
 489
 490 static struct platform_device bfin_uart1_device = {
 491         .name = "bfin-uart",
 492         .id = 1,
 493         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 494         .resource = bfin_uart1_resources,
 495         .dev = {
 496                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 497         },
 498 };
 499 #endif
 500 #endif
 501
 502 #if IS_ENABLED(CONFIG_BFIN_SIR)
 503 #ifdef CONFIG_BFIN_SIR0
 504 static struct resource bfin_sir0_resources[] = {
 505         {
 506                 .start = 0xFFC00400,
 507                 .end = 0xFFC004FF,
 508                 .flags = IORESOURCE_MEM,
 509         },
 510         {
 511                 .start = IRQ_UART0_RX,
 512                 .end = IRQ_UART0_RX+1,
 513                 .flags = IORESOURCE_IRQ,
 514         },
 515         {
 516                 .start = CH_UART0_RX,
 517                 .end = CH_UART0_RX+1,
 518                 .flags = IORESOURCE_DMA,
 519         },
 520 };
 521 static struct platform_device bfin_sir0_device = {
 522         .name = "bfin_sir",
 523         .id = 0,
 524         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 525         .resource = bfin_sir0_resources,
 526 };
 527 #endif
 528 #ifdef CONFIG_BFIN_SIR1
 529 static struct resource bfin_sir1_resources[] = {
 530         {
 531                 .start = 0xFFC02000,
 532                 .end = 0xFFC020FF,
 533                 .flags = IORESOURCE_MEM,
 534         },
 535         {
 536                 .start = IRQ_UART1_RX,
 537                 .end = IRQ_UART1_RX+1,
 538                 .flags = IORESOURCE_IRQ,
 539         },
 540         {
 541                 .start = CH_UART1_RX,
 542                 .end = CH_UART1_RX+1,
 543                 .flags = IORESOURCE_DMA,
 544         },
 545 };
 546 static struct platform_device bfin_sir1_device = {
 547         .name = "bfin_sir",
 548         .id = 1,
 549         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 550         .resource = bfin_sir1_resources,
 551 };
 552 #endif
 553 #endif
 554
 555 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
 556 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 557
 558 static struct resource bfin_twi0_resource[] = {
 559         [0] = {
 560                 .start = TWI0_REGBASE,
 561                 .end   = TWI0_REGBASE,
 562                 .flags = IORESOURCE_MEM,
 563         },
 564         [1] = {
 565                 .start = IRQ_TWI,
 566                 .end   = IRQ_TWI,
 567                 .flags = IORESOURCE_IRQ,
 568         },
 569 };
 570
 571 static struct platform_device i2c_bfin_twi_device = {
 572         .name = "i2c-bfin-twi",
 573         .id = 0,
 574         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 575         .resource = bfin_twi0_resource,
 576         .dev = {
 577                 .platform_data = &bfin_twi0_pins,
 578         },
 579 };
 580 #endif
 581
 582 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT) \
 583 || IS_ENABLED(CONFIG_BFIN_SPORT)
 584 unsigned short bfin_sport0_peripherals[] = {
 585         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 586         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 587 };
 588 #endif
 589 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
 590 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 591 static struct resource bfin_sport0_uart_resources[] = {
 592         {
 593                 .start = SPORT0_TCR1,
 594                 .end = SPORT0_MRCS3+4,
 595                 .flags = IORESOURCE_MEM,
 596         },
 597         {
 598                 .start = IRQ_SPORT0_RX,
 599                 .end = IRQ_SPORT0_RX+1,
 600                 .flags = IORESOURCE_IRQ,
 601         },
 602         {
 603                 .start = IRQ_SPORT0_ERROR,
 604                 .end = IRQ_SPORT0_ERROR,
 605                 .flags = IORESOURCE_IRQ,
 606         },
 607 };
 608
 609 static struct platform_device bfin_sport0_uart_device = {
 610         .name = "bfin-sport-uart",
 611         .id = 0,
 612         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 613         .resource = bfin_sport0_uart_resources,
 614         .dev = {
 615                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 616         },
 617 };
 618 #endif
 619 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 620 static struct resource bfin_sport1_uart_resources[] = {
 621         {
 622                 .start = SPORT1_TCR1,
 623                 .end = SPORT1_MRCS3+4,
 624                 .flags = IORESOURCE_MEM,
 625         },
 626         {
 627                 .start = IRQ_SPORT1_RX,
 628                 .end = IRQ_SPORT1_RX+1,
 629                 .flags = IORESOURCE_IRQ,
 630         },
 631         {
 632                 .start = IRQ_SPORT1_ERROR,
 633                 .end = IRQ_SPORT1_ERROR,
 634                 .flags = IORESOURCE_IRQ,
 635         },
 636 };
 637
 638 static unsigned short bfin_sport1_peripherals[] = {
 639         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 640         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 641 };
 642
 643 static struct platform_device bfin_sport1_uart_device = {
 644         .name = "bfin-sport-uart",
 645         .id = 1,
 646         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 647         .resource = bfin_sport1_uart_resources,
 648         .dev = {
 649                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 650         },
 651 };
 652 #endif
 653 #endif
 654 #if IS_ENABLED(CONFIG_BFIN_SPORT)
 655 static struct resource bfin_sport0_resources[] = {
 656         {
 657                 .start = SPORT0_TCR1,
 658                 .end = SPORT0_MRCS3+4,
 659                 .flags = IORESOURCE_MEM,
 660         },
 661         {
 662                 .start = IRQ_SPORT0_RX,
 663                 .end = IRQ_SPORT0_RX+1,
 664                 .flags = IORESOURCE_IRQ,
 665         },
 666         {
 667                 .start = IRQ_SPORT0_TX,
 668                 .end = IRQ_SPORT0_TX+1,
 669                 .flags = IORESOURCE_IRQ,
 670         },
 671         {
 672                 .start = IRQ_SPORT0_ERROR,
 673                 .end = IRQ_SPORT0_ERROR,
 674                 .flags = IORESOURCE_IRQ,
 675         },
 676         {
 677                 .start = CH_SPORT0_TX,
 678                 .end = CH_SPORT0_TX,
 679                 .flags = IORESOURCE_DMA,
 680         },
 681         {
 682                 .start = CH_SPORT0_RX,
 683                 .end = CH_SPORT0_RX,
 684                 .flags = IORESOURCE_DMA,
 685         },
 686 };
 687 static struct platform_device bfin_sport0_device = {
 688         .name = "bfin_sport_raw",
 689         .id = 0,
 690         .num_resources = ARRAY_SIZE(bfin_sport0_resources),
 691         .resource = bfin_sport0_resources,
 692         .dev = {
 693                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 694         },
 695 };
 696 #endif
 697
 698 #if IS_ENABLED(CONFIG_BFIN_MAC)
 699 #include <linux/bfin_mac.h>
 700 static const unsigned short bfin_mac_peripherals[] = P_MII0;
 701
 702 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 703         {
 704                 .addr = 1,
 705                 .irq = IRQ_MAC_PHYINT,
 706         },
 707 };
 708
 709 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 710         .phydev_number = 1,
 711         .phydev_data = bfin_phydev_data,
 712         .phy_mode = PHY_INTERFACE_MODE_MII,
 713         .mac_peripherals = bfin_mac_peripherals,
 714 };
 715
 716 static struct platform_device bfin_mii_bus = {
 717         .name = "bfin_mii_bus",
 718         .dev = {
 719                 .platform_data = &bfin_mii_bus_data,
 720         }
 721 };
 722
 723 static struct platform_device bfin_mac_device = {
 724         .name = "bfin_mac",
 725         .dev = {
 726                 .platform_data = &bfin_mii_bus,
 727         }
 728 };
 729 #endif
 730
 731 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
 732 #define PATA_INT        IRQ_PF14
 733
 734 static struct pata_platform_info bfin_pata_platform_data = {
 735         .ioport_shift = 2,
 736         .irq_type = IRQF_TRIGGER_HIGH,
 737 };
 738
 739 static struct resource bfin_pata_resources[] = {
 740         {
 741                 .start = 0x2030C000,
 742                 .end = 0x2030C01F,
 743                 .flags = IORESOURCE_MEM,
 744         },
 745         {
 746                 .start = 0x2030D018,
 747                 .end = 0x2030D01B,
 748                 .flags = IORESOURCE_MEM,
 749         },
 750         {
 751                 .start = PATA_INT,
 752                 .end = PATA_INT,
 753                 .flags = IORESOURCE_IRQ,
 754         },
 755 };
 756
 757 static struct platform_device bfin_pata_device = {
 758         .name = "pata_platform",
 759         .id = -1,
 760         .num_resources = ARRAY_SIZE(bfin_pata_resources),
 761         .resource = bfin_pata_resources,
 762         .dev = {
 763                 .platform_data = &bfin_pata_platform_data,
 764         }
 765 };
 766 #endif
 767
 768 static const unsigned int cclk_vlev_datasheet[] =
 769 {
 770         VRPAIR(VLEV_085, 250000000),
 771         VRPAIR(VLEV_090, 376000000),
 772         VRPAIR(VLEV_095, 426000000),
 773         VRPAIR(VLEV_100, 426000000),
 774         VRPAIR(VLEV_105, 476000000),
 775         VRPAIR(VLEV_110, 476000000),
 776         VRPAIR(VLEV_115, 476000000),
 777         VRPAIR(VLEV_120, 500000000),
 778         VRPAIR(VLEV_125, 533000000),
 779         VRPAIR(VLEV_130, 600000000),
 780 };
 781
 782 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 783         .tuple_tab = cclk_vlev_datasheet,
 784         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 785         .vr_settling_time = 25 /* us */,
 786 };
 787
 788 static struct platform_device bfin_dpmc = {
 789         .name = "bfin dpmc",
 790         .dev = {
 791                 .platform_data = &bfin_dmpc_vreg_data,
 792         },
 793 };
 794
 795 static struct platform_device *cm_bf537e_devices[] __initdata = {
 796
 797         &bfin_dpmc,
 798
 799 #if IS_ENABLED(CONFIG_BFIN_SPORT)
 800         &bfin_sport0_device,
 801 #endif
 802
 803 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
 804         &hitachi_fb_device,
 805 #endif
 806
 807 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
 808         &rtc_device,
 809 #endif
 810
 811 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 812 #ifdef CONFIG_SERIAL_BFIN_UART0
 813         &bfin_uart0_device,
 814 #endif
 815 #ifdef CONFIG_SERIAL_BFIN_UART1
 816         &bfin_uart1_device,
 817 #endif
 818 #endif
 819
 820 #if IS_ENABLED(CONFIG_BFIN_SIR)
 821 #ifdef CONFIG_BFIN_SIR0
 822         &bfin_sir0_device,
 823 #endif
 824 #ifdef CONFIG_BFIN_SIR1
 825         &bfin_sir1_device,
 826 #endif
 827 #endif
 828
 829 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
 830         &i2c_bfin_twi_device,
 831 #endif
 832
 833 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
 834 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 835         &bfin_sport0_uart_device,
 836 #endif
 837 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 838         &bfin_sport1_uart_device,
 839 #endif
 840 #endif
 841
 842 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
 843         &isp1362_hcd_device,
 844 #endif
 845
 846 #if IS_ENABLED(CONFIG_SMC91X)
 847         &smc91x_device,
 848 #endif
 849
 850 #if IS_ENABLED(CONFIG_BFIN_MAC)
 851         &bfin_mii_bus,
 852         &bfin_mac_device,
 853 #endif
 854
 855 #if IS_ENABLED(CONFIG_USB_NET2272)
 856         &net2272_bfin_device,
 857 #endif
 858
 859 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 860         &bfin_spi0_device,
 861 #endif
 862
 863 #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
 864         &bfin_sport_spi0_device,
 865         &bfin_sport_spi1_device,
 866 #endif
 867
 868 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
 869         &bfin_pata_device,
 870 #endif
 871
 872 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
 873         &cm_flash_device,
 874 #endif
 875 };
 876
 877 static int __init net2272_init(void)
 878 {
 879 #if IS_ENABLED(CONFIG_USB_NET2272)
 880         int ret;
 881
 882         ret = gpio_request(GPIO_PG14, "net2272");
 883         if (ret)
 884                 return ret;
 885
 886         /* Reset USB Chip, PG14 */
 887         gpio_direction_output(GPIO_PG14, 0);
 888         mdelay(2);
 889         gpio_set_value(GPIO_PG14, 1);
 890 #endif
 891
 892         return 0;
 893 }
 894
 895 static int __init cm_bf537e_init(void)
 896 {
 897         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 898         platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
 899 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 900         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 901 #endif
 902
 903 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
 904         irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
 905 #endif
 906
 907         if (net2272_init())
 908                 pr_warning("unable to configure net2272; it probably won't work\n");
 909
 910         return 0;
 911 }
 912
 913 arch_initcall(cm_bf537e_init);
 914
 915 static struct platform_device *cm_bf537e_early_devices[] __initdata = {
 916 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 917 #ifdef CONFIG_SERIAL_BFIN_UART0
 918         &bfin_uart0_device,
 919 #endif
 920 #ifdef CONFIG_SERIAL_BFIN_UART1
 921         &bfin_uart1_device,
 922 #endif
 923 #endif
 924
 925 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 926 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 927         &bfin_sport0_uart_device,
 928 #endif
 929 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 930         &bfin_sport1_uart_device,
 931 #endif
 932 #endif
 933 };
 934
 935 void __init native_machine_early_platform_add_devices(void)
 936 {
 937         printk(KERN_INFO "register early platform devices\n");
 938         early_platform_add_devices(cm_bf537e_early_devices,
 939                 ARRAY_SIZE(cm_bf537e_early_devices));
 940 }
 941
 942 int bfin_get_ether_addr(char *addr)
 943 {
 944         return 1;
 945 }
 946 EXPORT_SYMBOL(bfin_get_ether_addr);