2 * MPC8572 DS Core1 Device Tree Source in CAMP mode.
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
8 * Please note to add "-b 1" for core1's dts compiling.
10 * Copyright 2007-2009 Freescale Semiconductor Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 /include/ "mpc8572ds.dts"
21 model = "fsl,MPC8572DS";
22 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
43 memory-controller@2000 {
46 memory-controller@6000 {
58 gpio-controller@f000 {
61 l2-cache-controller@20000 {
62 cache-size = <0x80000>; // L2, 512K
84 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
85 29 30 34 35 36 40 /* enet0 enet1 */
86 24 25 20 21 22 23 /* pci0 pci1 dma1 */
88 0x1 0x2 0x3 0x4 /* pci slot */
89 0x9 0xa 0xb 0xc /* usb */
90 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */
91 0xe0 0xe1 0xe2 0xe3 /* msi */
98 msi-available-ranges = <0x80 0x80>;
105 global-utilities@e0000 {