2 * P3041DS Device Tree Source
4 * Copyright 2010-2011 Freescale Semiconductor Inc.
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35 /include/ "fsl/p3041si-pre.dtsi"
38 model = "fsl,P3041DS";
39 compatible = "fsl,P3041DS";
42 interrupt-parent = <&mpic>;
45 device_type = "memory";
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
59 compatible = "spansion,s25sl12801";
61 spi-max-frequency = <35000000>; /* input clock */
64 reg = <0x00000000 0x00100000>;
69 reg = <0x00100000 0x00500000>;
74 reg = <0x00600000 0x00100000>;
78 label = "file system";
79 reg = <0x00700000 0x00900000>;
86 compatible = "at24,24c256";
90 compatible = "at24,24c256";
97 compatible = "dallas,ds3232";
99 interrupts = <0x1 0x1 0 0>;
102 compatible = "adi,adt7461";
108 rio: rapidio@ffe0c0000 {
109 reg = <0xf 0xfe0c0000 0 0x11000>;
112 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
115 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
119 lbc: localbus@ffe124000 {
120 reg = <0xf 0xfe124000 0 0x1000>;
121 ranges = <0 0 0xf 0xe8000000 0x08000000
122 2 0 0xf 0xffa00000 0x00040000
123 3 0 0xf 0xffdf0000 0x00008000>;
126 compatible = "cfi-flash";
127 reg = <0 0 0x08000000>;
133 #address-cells = <1>;
135 compatible = "fsl,elbc-fcm-nand";
136 reg = <0x2 0x0 0x40000>;
139 label = "NAND U-Boot Image";
140 reg = <0x0 0x02000000>;
145 label = "NAND Root File System";
146 reg = <0x02000000 0x10000000>;
150 label = "NAND Compressed RFS Image";
151 reg = <0x12000000 0x08000000>;
155 label = "NAND Linux Kernel Image";
156 reg = <0x1a000000 0x04000000>;
160 label = "NAND DTB Image";
161 reg = <0x1e000000 0x01000000>;
165 label = "NAND Writable User area";
166 reg = <0x1f000000 0x21000000>;
171 compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
176 pci0: pcie@ffe200000 {
177 reg = <0xf 0xfe200000 0 0x1000>;
178 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
179 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
181 ranges = <0x02000000 0 0xe0000000
182 0x02000000 0 0xe0000000
185 0x01000000 0 0x00000000
186 0x01000000 0 0x00000000
191 pci1: pcie@ffe201000 {
192 reg = <0xf 0xfe201000 0 0x1000>;
193 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
194 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
196 ranges = <0x02000000 0 0xe0000000
197 0x02000000 0 0xe0000000
200 0x01000000 0 0x00000000
201 0x01000000 0 0x00000000
206 pci2: pcie@ffe202000 {
207 reg = <0xf 0xfe202000 0 0x1000>;
208 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
209 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
211 ranges = <0x02000000 0 0xe0000000
212 0x02000000 0 0xe0000000
215 0x01000000 0 0x00000000
216 0x01000000 0 0x00000000
221 pci3: pcie@ffe203000 {
222 reg = <0xf 0xfe203000 0 0x1000>;
223 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
224 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
226 ranges = <0x02000000 0 0xe0000000
227 0x02000000 0 0xe0000000
230 0x01000000 0 0x00000000
231 0x01000000 0 0x00000000
237 /include/ "fsl/p3041si-post.dtsi"