| blob | 050f79a4a168cd16a1c4f22be4046cd06a5e6a85 |
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
19 /*
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
29 */
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
32 BEGIN_FTR_SECTION \
33 cmpdi r0,0x1ebe ; \
34 beq- 1f ; \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
36 mr r9,r13 ; \
37 GET_PACA(r13) ; \
38 mfspr r11,SPRN_SRR0 ; \
39 0:
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
48 rfid ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
57 b . ; /* prevent speculative execution */
59 #if defined(CONFIG_RELOCATABLE)
60 /*
61 * We can't branch directly; in the direct case we use LR
62 * and system_call_entry restores LR. (We thus need to move
63 * LR to r10 in the RFID case too.)
64 */
65 #define SYSCALL_PSERIES_2_DIRECT \
66 mflr r10 ; \
67 ld r12,PACAKBASE(r13) ; \
68 LOAD_HANDLER(r12, system_call_entry_direct) ; \
69 mtctr r12 ; \
70 mfspr r12,SPRN_SRR1 ; \
71 /* Re-use of r13... No spare regs to do this */ \
72 li r13,MSR_RI ; \
73 mtmsrd r13,1 ; \
74 GET_PACA(r13) ; /* get r13 back */ \
75 bctr ;
76 #else
77 /* We can branch directly */
78 #define SYSCALL_PSERIES_2_DIRECT \
79 mfspr r12,SPRN_SRR1 ; \
80 li r10,MSR_RI ; \
81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
82 b system_call_entry_direct ;
83 #endif
85 /*
86 * This is the start of the interrupt handlers for pSeries
87 * This code runs with relocation off.
88 * Code from here to __end_interrupts gets copied down to real
89 * address 0x100 when we are running a relocatable kernel.
90 * Therefore any relative branches in this section must only
91 * branch to labels in this section.
92 */
93 . = 0x100
94 .globl __start_interrupts
95 __start_interrupts:
97 .globl system_reset_pSeries;
98 system_reset_pSeries:
99 HMT_MEDIUM_PPR_DISCARD
100 SET_SCRATCH0(r13)
101 #ifdef CONFIG_PPC_P7_NAP
102 BEGIN_FTR_SECTION
103 /* Running native on arch 2.06 or later, check if we are
104 * waking up from nap. We only handle no state loss and
105 * supervisor state loss. We do -not- handle hypervisor
106 * state loss at this time.
107 */
108 mfspr r13,SPRN_SRR1
109 rlwinm. r13,r13,47-31,30,31
110 beq 9f
112 /* waking up from powersave (nap) state */
113 cmpwi cr1,r13,2
114 /* Total loss of HV state is fatal, we could try to use the
115 * PIR to locate a PACA, then use an emergency stack etc...
116 * OPAL v3 based powernv platforms have new idle states
117 * which fall in this catagory.
118 */
119 bgt cr1,8f
120 GET_PACA(r13)
122 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
123 li r0,KVM_HWTHREAD_IN_KERNEL
124 stb r0,HSTATE_HWTHREAD_STATE(r13)
125 /* Order setting hwthread_state vs. testing hwthread_req */
126 sync
127 lbz r0,HSTATE_HWTHREAD_REQ(r13)
128 cmpwi r0,0
129 beq 1f
130 b kvm_start_guest
131 1:
132 #endif
134 beq cr1,2f
135 b power7_wakeup_noloss
136 2: b power7_wakeup_loss
138 /* Fast Sleep wakeup on PowerNV */
139 8: GET_PACA(r13)
140 b power7_wakeup_tb_loss
142 9:
143 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
144 #endif /* CONFIG_PPC_P7_NAP */
145 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
146 NOTEST, 0x100)
148 . = 0x200
149 machine_check_pSeries_1:
150 /* This is moved out of line as it can be patched by FW, but
151 * some code path might still want to branch into the original
152 * vector
153 */
154 HMT_MEDIUM_PPR_DISCARD
155 SET_SCRATCH0(r13) /* save r13 */
156 #ifdef CONFIG_PPC_P7_NAP
157 BEGIN_FTR_SECTION
158 /* Running native on arch 2.06 or later, check if we are
159 * waking up from nap. We only handle no state loss and
160 * supervisor state loss. We do -not- handle hypervisor
161 * state loss at this time.
162 */
163 mfspr r13,SPRN_SRR1
164 rlwinm. r13,r13,47-31,30,31
165 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
166 beq 9f
168 mfspr r13,SPRN_SRR1
169 rlwinm. r13,r13,47-31,30,31
170 /* waking up from powersave (nap) state */
171 cmpwi cr1,r13,2
172 /* Total loss of HV state is fatal. let's just stay stuck here */
173 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
174 bgt cr1,.
175 9:
176 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
177 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
178 #endif /* CONFIG_PPC_P7_NAP */
179 EXCEPTION_PROLOG_0(PACA_EXMC)
180 BEGIN_FTR_SECTION
181 b machine_check_pSeries_early
182 FTR_SECTION_ELSE
183 b machine_check_pSeries_0
184 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
186 . = 0x300
187 .globl data_access_pSeries
188 data_access_pSeries:
189 HMT_MEDIUM_PPR_DISCARD
190 SET_SCRATCH0(r13)
191 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
192 KVMTEST, 0x300)
194 . = 0x380
195 .globl data_access_slb_pSeries
196 data_access_slb_pSeries:
197 HMT_MEDIUM_PPR_DISCARD
198 SET_SCRATCH0(r13)
199 EXCEPTION_PROLOG_0(PACA_EXSLB)
200 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
201 std r3,PACA_EXSLB+EX_R3(r13)
202 mfspr r3,SPRN_DAR
203 #ifdef __DISABLED__
204 /* Keep that around for when we re-implement dynamic VSIDs */
205 cmpdi r3,0
206 bge slb_miss_user_pseries
207 #endif /* __DISABLED__ */
208 mfspr r12,SPRN_SRR1
209 #ifndef CONFIG_RELOCATABLE
210 b slb_miss_realmode
211 #else
212 /*
213 * We can't just use a direct branch to slb_miss_realmode
214 * because the distance from here to there depends on where
215 * the kernel ends up being put.
216 */
217 mfctr r11
218 ld r10,PACAKBASE(r13)
219 LOAD_HANDLER(r10, slb_miss_realmode)
220 mtctr r10
221 bctr
222 #endif
224 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
226 . = 0x480
227 .globl instruction_access_slb_pSeries
228 instruction_access_slb_pSeries:
229 HMT_MEDIUM_PPR_DISCARD
230 SET_SCRATCH0(r13)
231 EXCEPTION_PROLOG_0(PACA_EXSLB)
232 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
233 std r3,PACA_EXSLB+EX_R3(r13)
234 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
235 #ifdef __DISABLED__
236 /* Keep that around for when we re-implement dynamic VSIDs */
237 cmpdi r3,0
238 bge slb_miss_user_pseries
239 #endif /* __DISABLED__ */
240 mfspr r12,SPRN_SRR1
241 #ifndef CONFIG_RELOCATABLE
242 b slb_miss_realmode
243 #else
244 mfctr r11
245 ld r10,PACAKBASE(r13)
246 LOAD_HANDLER(r10, slb_miss_realmode)
247 mtctr r10
248 bctr
249 #endif
251 /* We open code these as we can't have a ". = x" (even with
252 * x = "." within a feature section
253 */
254 . = 0x500;
255 .globl hardware_interrupt_pSeries;
256 .globl hardware_interrupt_hv;
257 hardware_interrupt_pSeries:
258 hardware_interrupt_hv:
259 HMT_MEDIUM_PPR_DISCARD
260 BEGIN_FTR_SECTION
261 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
262 EXC_HV, SOFTEN_TEST_HV)
263 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
264 FTR_SECTION_ELSE
265 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
266 EXC_STD, SOFTEN_TEST_HV_201)
267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
268 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
270 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
271 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
273 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
274 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
276 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
277 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
279 . = 0x900
280 .globl decrementer_pSeries
281 decrementer_pSeries:
282 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
284 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
286 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
287 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
289 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
290 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
292 . = 0xc00
293 .globl system_call_pSeries
294 system_call_pSeries:
295 HMT_MEDIUM
296 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
297 SET_SCRATCH0(r13)
298 GET_PACA(r13)
299 std r9,PACA_EXGEN+EX_R9(r13)
300 std r10,PACA_EXGEN+EX_R10(r13)
301 mfcr r9
302 KVMTEST(0xc00)
303 GET_SCRATCH0(r13)
304 #endif
305 SYSCALL_PSERIES_1
306 SYSCALL_PSERIES_2_RFID
307 SYSCALL_PSERIES_3
308 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
310 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
311 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
313 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
314 * out of line to handle them
315 */
316 . = 0xe00
317 hv_data_storage_trampoline:
318 SET_SCRATCH0(r13)
319 EXCEPTION_PROLOG_0(PACA_EXGEN)
320 b h_data_storage_hv
322 . = 0xe20
323 hv_instr_storage_trampoline:
324 SET_SCRATCH0(r13)
325 EXCEPTION_PROLOG_0(PACA_EXGEN)
326 b h_instr_storage_hv
328 . = 0xe40
329 emulation_assist_trampoline:
330 SET_SCRATCH0(r13)
331 EXCEPTION_PROLOG_0(PACA_EXGEN)
332 b emulation_assist_hv
334 . = 0xe60
335 hv_exception_trampoline:
336 SET_SCRATCH0(r13)
337 EXCEPTION_PROLOG_0(PACA_EXGEN)
338 b hmi_exception_early
340 . = 0xe80
341 hv_doorbell_trampoline:
342 SET_SCRATCH0(r13)
343 EXCEPTION_PROLOG_0(PACA_EXGEN)
344 b h_doorbell_hv
346 /* We need to deal with the Altivec unavailable exception
347 * here which is at 0xf20, thus in the middle of the
348 * prolog code of the PerformanceMonitor one. A little
349 * trickery is thus necessary
350 */
351 . = 0xf00
352 performance_monitor_pseries_trampoline:
353 SET_SCRATCH0(r13)
354 EXCEPTION_PROLOG_0(PACA_EXGEN)
355 b performance_monitor_pSeries
357 . = 0xf20
358 altivec_unavailable_pseries_trampoline:
359 SET_SCRATCH0(r13)
360 EXCEPTION_PROLOG_0(PACA_EXGEN)
361 b altivec_unavailable_pSeries
363 . = 0xf40
364 vsx_unavailable_pseries_trampoline:
365 SET_SCRATCH0(r13)
366 EXCEPTION_PROLOG_0(PACA_EXGEN)
367 b vsx_unavailable_pSeries
369 . = 0xf60
370 facility_unavailable_trampoline:
371 SET_SCRATCH0(r13)
372 EXCEPTION_PROLOG_0(PACA_EXGEN)
373 b facility_unavailable_pSeries
375 . = 0xf80
376 hv_facility_unavailable_trampoline:
377 SET_SCRATCH0(r13)
378 EXCEPTION_PROLOG_0(PACA_EXGEN)
379 b facility_unavailable_hv
381 #ifdef CONFIG_CBE_RAS
382 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
383 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
384 #endif /* CONFIG_CBE_RAS */
386 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
387 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
389 . = 0x1500
390 .global denorm_exception_hv
391 denorm_exception_hv:
392 HMT_MEDIUM_PPR_DISCARD
393 mtspr SPRN_SPRG_HSCRATCH0,r13
394 EXCEPTION_PROLOG_0(PACA_EXGEN)
395 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
397 #ifdef CONFIG_PPC_DENORMALISATION
398 mfspr r10,SPRN_HSRR1
399 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
400 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
401 addi r11,r11,-4 /* HSRR0 is next instruction */
402 bne+ denorm_assist
403 #endif
405 KVMTEST(0x1500)
406 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
407 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
409 #ifdef CONFIG_CBE_RAS
410 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
411 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
412 #endif /* CONFIG_CBE_RAS */
414 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
415 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
417 #ifdef CONFIG_CBE_RAS
418 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
419 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
420 #else
421 . = 0x1800
422 #endif /* CONFIG_CBE_RAS */
425 /*** Out of line interrupts support ***/
427 .align 7
428 /* moved from 0x200 */
429 machine_check_pSeries_early:
430 BEGIN_FTR_SECTION
431 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
432 /*
433 * Register contents:
434 * R13 = PACA
435 * R9 = CR
436 * Original R9 to R13 is saved on PACA_EXMC
437 *
438 * Switch to mc_emergency stack and handle re-entrancy (we limit
439 * the nested MCE upto level 4 to avoid stack overflow).
440 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
441 *
442 * We use paca->in_mce to check whether this is the first entry or
443 * nested machine check. We increment paca->in_mce to track nested
444 * machine checks.
445 *
446 * If this is the first entry then set stack pointer to
447 * paca->mc_emergency_sp, otherwise r1 is already pointing to
448 * stack frame on mc_emergency stack.
449 *
450 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
451 * checkstop if we get another machine check exception before we do
452 * rfid with MSR_ME=1.
453 */
454 mr r11,r1 /* Save r1 */
455 lhz r10,PACA_IN_MCE(r13)
456 cmpwi r10,0 /* Are we in nested machine check */
457 bne 0f /* Yes, we are. */
458 /* First machine check entry */
459 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
460 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
461 addi r10,r10,1 /* increment paca->in_mce */
462 sth r10,PACA_IN_MCE(r13)
463 /* Limit nested MCE to level 4 to avoid stack overflow */
464 cmpwi r10,4
465 bgt 2f /* Check if we hit limit of 4 */
466 std r11,GPR1(r1) /* Save r1 on the stack. */
467 std r11,0(r1) /* make stack chain pointer */
468 mfspr r11,SPRN_SRR0 /* Save SRR0 */
469 std r11,_NIP(r1)
470 mfspr r11,SPRN_SRR1 /* Save SRR1 */
471 std r11,_MSR(r1)
472 mfspr r11,SPRN_DAR /* Save DAR */
473 std r11,_DAR(r1)
474 mfspr r11,SPRN_DSISR /* Save DSISR */
475 std r11,_DSISR(r1)
476 std r9,_CCR(r1) /* Save CR in stackframe */
477 /* Save r9 through r13 from EXMC save area to stack frame. */
478 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
479 mfmsr r11 /* get MSR value */
480 ori r11,r11,MSR_ME /* turn on ME bit */
481 ori r11,r11,MSR_RI /* turn on RI bit */
482 ld r12,PACAKBASE(r13) /* get high part of &label */
483 LOAD_HANDLER(r12, machine_check_handle_early)
484 1: mtspr SPRN_SRR0,r12
485 mtspr SPRN_SRR1,r11
486 rfid
487 b . /* prevent speculative execution */
488 2:
489 /* Stack overflow. Stay on emergency stack and panic.
490 * Keep the ME bit off while panic-ing, so that if we hit
491 * another machine check we checkstop.
492 */
493 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
494 ld r11,PACAKMSR(r13)
495 ld r12,PACAKBASE(r13)
496 LOAD_HANDLER(r12, unrecover_mce)
497 li r10,MSR_ME
498 andc r11,r11,r10 /* Turn off MSR_ME */
499 b 1b
500 b . /* prevent speculative execution */
501 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
503 machine_check_pSeries:
504 .globl machine_check_fwnmi
505 machine_check_fwnmi:
506 HMT_MEDIUM_PPR_DISCARD
507 SET_SCRATCH0(r13) /* save r13 */
508 EXCEPTION_PROLOG_0(PACA_EXMC)
509 machine_check_pSeries_0:
510 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
511 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
512 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
513 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
514 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
515 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
516 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
517 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
518 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
520 #ifdef CONFIG_PPC_DENORMALISATION
521 denorm_assist:
522 BEGIN_FTR_SECTION
523 /*
524 * To denormalise we need to move a copy of the register to itself.
525 * For POWER6 do that here for all FP regs.
526 */
527 mfmsr r10
528 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
529 xori r10,r10,(MSR_FE0|MSR_FE1)
530 mtmsrd r10
531 sync
533 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
534 #define FMR4(n) FMR2(n) ; FMR2(n+2)
535 #define FMR8(n) FMR4(n) ; FMR4(n+4)
536 #define FMR16(n) FMR8(n) ; FMR8(n+8)
537 #define FMR32(n) FMR16(n) ; FMR16(n+16)
538 FMR32(0)
540 FTR_SECTION_ELSE
541 /*
542 * To denormalise we need to move a copy of the register to itself.
543 * For POWER7 do that here for the first 32 VSX registers only.
544 */
545 mfmsr r10
546 oris r10,r10,MSR_VSX@h
547 mtmsrd r10
548 sync
550 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
551 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
552 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
553 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
554 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
555 XVCPSGNDP32(0)
557 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
559 BEGIN_FTR_SECTION
560 b denorm_done
561 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
562 /*
563 * To denormalise we need to move a copy of the register to itself.
564 * For POWER8 we need to do that for all 64 VSX registers
565 */
566 XVCPSGNDP32(32)
567 denorm_done:
568 mtspr SPRN_HSRR0,r11
569 mtcrf 0x80,r9
570 ld r9,PACA_EXGEN+EX_R9(r13)
571 RESTORE_PPR_PACA(PACA_EXGEN, r10)
572 BEGIN_FTR_SECTION
573 ld r10,PACA_EXGEN+EX_CFAR(r13)
574 mtspr SPRN_CFAR,r10
575 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
576 ld r10,PACA_EXGEN+EX_R10(r13)
577 ld r11,PACA_EXGEN+EX_R11(r13)
578 ld r12,PACA_EXGEN+EX_R12(r13)
579 ld r13,PACA_EXGEN+EX_R13(r13)
580 HRFID
581 b .
582 #endif
584 .align 7
585 /* moved from 0xe00 */
586 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
587 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
588 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
589 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
590 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
592 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
593 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
595 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
596 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
598 /* moved from 0xf00 */
599 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
600 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
601 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
602 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
603 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
604 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
605 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
606 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
607 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
608 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
610 /*
611 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
612 * - If it was a decrementer interrupt, we bump the dec to max and and return.
613 * - If it was a doorbell we return immediately since doorbells are edge
614 * triggered and won't automatically refire.
615 * - If it was a HMI we return immediately since we handled it in realmode
616 * and it won't refire.
617 * - else we hard disable and return.
618 * This is called with r10 containing the value to OR to the paca field.
619 */
620 #define MASKED_INTERRUPT(_H) \
621 masked_##_H##interrupt: \
622 std r11,PACA_EXGEN+EX_R11(r13); \
623 lbz r11,PACAIRQHAPPENED(r13); \
624 or r11,r11,r10; \
625 stb r11,PACAIRQHAPPENED(r13); \
626 cmpwi r10,PACA_IRQ_DEC; \
627 bne 1f; \
628 lis r10,0x7fff; \
629 ori r10,r10,0xffff; \
630 mtspr SPRN_DEC,r10; \
631 b 2f; \
632 1: cmpwi r10,PACA_IRQ_DBELL; \
633 beq 2f; \
634 cmpwi r10,PACA_IRQ_HMI; \
635 beq 2f; \
636 mfspr r10,SPRN_##_H##SRR1; \
637 rldicl r10,r10,48,1; /* clear MSR_EE */ \
638 rotldi r10,r10,16; \
639 mtspr SPRN_##_H##SRR1,r10; \
640 2: mtcrf 0x80,r9; \
641 ld r9,PACA_EXGEN+EX_R9(r13); \
642 ld r10,PACA_EXGEN+EX_R10(r13); \
643 ld r11,PACA_EXGEN+EX_R11(r13); \
644 GET_SCRATCH0(r13); \
645 ##_H##rfid; \
646 b .
648 MASKED_INTERRUPT()
649 MASKED_INTERRUPT(H)
651 /*
652 * Called from arch_local_irq_enable when an interrupt needs
653 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
654 * which kind of interrupt. MSR:EE is already off. We generate a
655 * stackframe like if a real interrupt had happened.
656 *
657 * Note: While MSR:EE is off, we need to make sure that _MSR
658 * in the generated frame has EE set to 1 or the exception
659 * handler will not properly re-enable them.
660 */
661 _GLOBAL(__replay_interrupt)
662 /* We are going to jump to the exception common code which
663 * will retrieve various register values from the PACA which
664 * we don't give a damn about, so we don't bother storing them.
665 */
666 mfmsr r12
667 mflr r11
668 mfcr r9
669 ori r12,r12,MSR_EE
670 cmpwi r3,0x900
671 beq decrementer_common
672 cmpwi r3,0x500
673 beq hardware_interrupt_common
674 BEGIN_FTR_SECTION
675 cmpwi r3,0xe80
676 beq h_doorbell_common
677 FTR_SECTION_ELSE
678 cmpwi r3,0xa00
679 beq doorbell_super_common
680 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
681 blr
683 #ifdef CONFIG_PPC_PSERIES
684 /*
685 * Vectors for the FWNMI option. Share common code.
686 */
687 .globl system_reset_fwnmi
688 .align 7
689 system_reset_fwnmi:
690 HMT_MEDIUM_PPR_DISCARD
691 SET_SCRATCH0(r13) /* save r13 */
692 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
693 NOTEST, 0x100)
695 #endif /* CONFIG_PPC_PSERIES */
697 #ifdef __DISABLED__
698 /*
699 * This is used for when the SLB miss handler has to go virtual,
700 * which doesn't happen for now anymore but will once we re-implement
701 * dynamic VSIDs for shared page tables
702 */
703 slb_miss_user_pseries:
704 std r10,PACA_EXGEN+EX_R10(r13)
705 std r11,PACA_EXGEN+EX_R11(r13)
706 std r12,PACA_EXGEN+EX_R12(r13)
707 GET_SCRATCH0(r10)
708 ld r11,PACA_EXSLB+EX_R9(r13)
709 ld r12,PACA_EXSLB+EX_R3(r13)
710 std r10,PACA_EXGEN+EX_R13(r13)
711 std r11,PACA_EXGEN+EX_R9(r13)
712 std r12,PACA_EXGEN+EX_R3(r13)
713 clrrdi r12,r13,32
714 mfmsr r10
715 mfspr r11,SRR0 /* save SRR0 */
716 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
717 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
718 mtspr SRR0,r12
719 mfspr r12,SRR1 /* and SRR1 */
720 mtspr SRR1,r10
721 rfid
722 b . /* prevent spec. execution */
723 #endif /* __DISABLED__ */
725 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
726 kvmppc_skip_interrupt:
727 /*
728 * Here all GPRs are unchanged from when the interrupt happened
729 * except for r13, which is saved in SPRG_SCRATCH0.
730 */
731 mfspr r13, SPRN_SRR0
732 addi r13, r13, 4
733 mtspr SPRN_SRR0, r13
734 GET_SCRATCH0(r13)
735 rfid
736 b .
738 kvmppc_skip_Hinterrupt:
739 /*
740 * Here all GPRs are unchanged from when the interrupt happened
741 * except for r13, which is saved in SPRG_SCRATCH0.
742 */
743 mfspr r13, SPRN_HSRR0
744 addi r13, r13, 4
745 mtspr SPRN_HSRR0, r13
746 GET_SCRATCH0(r13)
747 hrfid
748 b .
749 #endif
751 /*
752 * Code from here down to __end_handlers is invoked from the
753 * exception prologs above. Because the prologs assemble the
754 * addresses of these handlers using the LOAD_HANDLER macro,
755 * which uses an ori instruction, these handlers must be in
756 * the first 64k of the kernel image.
757 */
759 /*** Common interrupt handlers ***/
761 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
763 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
764 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
765 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
766 #ifdef CONFIG_PPC_DOORBELL
767 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
768 #else
769 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
770 #endif
771 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
772 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
773 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
774 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
775 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
776 #ifdef CONFIG_PPC_DOORBELL
777 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
778 #else
779 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
780 #endif
781 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
782 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
783 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
784 #ifdef CONFIG_ALTIVEC
785 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
786 #else
787 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
788 #endif
789 #ifdef CONFIG_CBE_RAS
790 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
791 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
792 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
793 #endif /* CONFIG_CBE_RAS */
795 /*
796 * Relocation-on interrupts: A subset of the interrupts can be delivered
797 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
798 * it. Addresses are the same as the original interrupt addresses, but
799 * offset by 0xc000000000004000.
800 * It's impossible to receive interrupts below 0x300 via this mechanism.
801 * KVM: None of these traps are from the guest ; anything that escalated
802 * to HV=1 from HV=0 is delivered via real mode handlers.
803 */
805 /*
806 * This uses the standard macro, since the original 0x300 vector
807 * only has extra guff for STAB-based processors -- which never
808 * come here.
809 */
810 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
811 . = 0x4380
812 .globl data_access_slb_relon_pSeries
813 data_access_slb_relon_pSeries:
814 SET_SCRATCH0(r13)
815 EXCEPTION_PROLOG_0(PACA_EXSLB)
816 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
817 std r3,PACA_EXSLB+EX_R3(r13)
818 mfspr r3,SPRN_DAR
819 mfspr r12,SPRN_SRR1
820 #ifndef CONFIG_RELOCATABLE
821 b slb_miss_realmode
822 #else
823 /*
824 * We can't just use a direct branch to slb_miss_realmode
825 * because the distance from here to there depends on where
826 * the kernel ends up being put.
827 */
828 mfctr r11
829 ld r10,PACAKBASE(r13)
830 LOAD_HANDLER(r10, slb_miss_realmode)
831 mtctr r10
832 bctr
833 #endif
835 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
836 . = 0x4480
837 .globl instruction_access_slb_relon_pSeries
838 instruction_access_slb_relon_pSeries:
839 SET_SCRATCH0(r13)
840 EXCEPTION_PROLOG_0(PACA_EXSLB)
841 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
842 std r3,PACA_EXSLB+EX_R3(r13)
843 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
844 mfspr r12,SPRN_SRR1
845 #ifndef CONFIG_RELOCATABLE
846 b slb_miss_realmode
847 #else
848 mfctr r11
849 ld r10,PACAKBASE(r13)
850 LOAD_HANDLER(r10, slb_miss_realmode)
851 mtctr r10
852 bctr
853 #endif
855 . = 0x4500
856 .globl hardware_interrupt_relon_pSeries;
857 .globl hardware_interrupt_relon_hv;
858 hardware_interrupt_relon_pSeries:
859 hardware_interrupt_relon_hv:
860 BEGIN_FTR_SECTION
861 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
862 FTR_SECTION_ELSE
863 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
864 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
865 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
866 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
867 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
868 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
869 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
870 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
871 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
873 . = 0x4c00
874 .globl system_call_relon_pSeries
875 system_call_relon_pSeries:
876 HMT_MEDIUM
877 SYSCALL_PSERIES_1
878 SYSCALL_PSERIES_2_DIRECT
879 SYSCALL_PSERIES_3
881 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
883 . = 0x4e00
884 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
886 . = 0x4e20
887 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
889 . = 0x4e40
890 emulation_assist_relon_trampoline:
891 SET_SCRATCH0(r13)
892 EXCEPTION_PROLOG_0(PACA_EXGEN)
893 b emulation_assist_relon_hv
895 . = 0x4e60
896 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
898 . = 0x4e80
899 h_doorbell_relon_trampoline:
900 SET_SCRATCH0(r13)
901 EXCEPTION_PROLOG_0(PACA_EXGEN)
902 b h_doorbell_relon_hv
904 . = 0x4f00
905 performance_monitor_relon_pseries_trampoline:
906 SET_SCRATCH0(r13)
907 EXCEPTION_PROLOG_0(PACA_EXGEN)
908 b performance_monitor_relon_pSeries
910 . = 0x4f20
911 altivec_unavailable_relon_pseries_trampoline:
912 SET_SCRATCH0(r13)
913 EXCEPTION_PROLOG_0(PACA_EXGEN)
914 b altivec_unavailable_relon_pSeries
916 . = 0x4f40
917 vsx_unavailable_relon_pseries_trampoline:
918 SET_SCRATCH0(r13)
919 EXCEPTION_PROLOG_0(PACA_EXGEN)
920 b vsx_unavailable_relon_pSeries
922 . = 0x4f60
923 facility_unavailable_relon_trampoline:
924 SET_SCRATCH0(r13)
925 EXCEPTION_PROLOG_0(PACA_EXGEN)
926 b facility_unavailable_relon_pSeries
928 . = 0x4f80
929 hv_facility_unavailable_relon_trampoline:
930 SET_SCRATCH0(r13)
931 EXCEPTION_PROLOG_0(PACA_EXGEN)
932 b hv_facility_unavailable_relon_hv
934 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
935 #ifdef CONFIG_PPC_DENORMALISATION
936 . = 0x5500
937 b denorm_exception_hv
938 #endif
939 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
941 /* Other future vectors */
942 .align 7
943 .globl __end_interrupts
944 __end_interrupts:
946 .align 7
947 system_call_entry_direct:
948 #if defined(CONFIG_RELOCATABLE)
949 /* The first level prologue may have used LR to get here, saving
950 * orig in r10. To save hacking/ifdeffing common code, restore here.
951 */
952 mtlr r10
953 #endif
954 system_call_entry:
955 b system_call_common
957 ppc64_runlatch_on_trampoline:
958 b __ppc64_runlatch_on
960 /*
961 * Here r13 points to the paca, r9 contains the saved CR,
962 * SRR0 and SRR1 are saved in r11 and r12,
963 * r9 - r13 are saved in paca->exgen.
964 */
965 .align 7
966 .globl data_access_common
967 data_access_common:
968 mfspr r10,SPRN_DAR
969 std r10,PACA_EXGEN+EX_DAR(r13)
970 mfspr r10,SPRN_DSISR
971 stw r10,PACA_EXGEN+EX_DSISR(r13)
972 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
973 RECONCILE_IRQ_STATE(r10, r11)
974 ld r12,_MSR(r1)
975 ld r3,PACA_EXGEN+EX_DAR(r13)
976 lwz r4,PACA_EXGEN+EX_DSISR(r13)
977 li r5,0x300
978 b do_hash_page /* Try to handle as hpte fault */
980 .align 7
981 .globl h_data_storage_common
982 h_data_storage_common:
983 mfspr r10,SPRN_HDAR
984 std r10,PACA_EXGEN+EX_DAR(r13)
985 mfspr r10,SPRN_HDSISR
986 stw r10,PACA_EXGEN+EX_DSISR(r13)
987 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
988 bl save_nvgprs
989 RECONCILE_IRQ_STATE(r10, r11)
990 addi r3,r1,STACK_FRAME_OVERHEAD
991 bl unknown_exception
992 b ret_from_except
994 .align 7
995 .globl instruction_access_common
996 instruction_access_common:
997 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
998 RECONCILE_IRQ_STATE(r10, r11)
999 ld r12,_MSR(r1)
1000 ld r3,_NIP(r1)
1001 andis. r4,r12,0x5820
1002 li r5,0x400
1003 b do_hash_page /* Try to handle as hpte fault */
1005 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
1007 /*
1008 * Here is the common SLB miss user that is used when going to virtual
1009 * mode for SLB misses, that is currently not used
1010 */
1011 #ifdef __DISABLED__
1012 .align 7
1013 .globl slb_miss_user_common
1014 slb_miss_user_common:
1015 mflr r10
1016 std r3,PACA_EXGEN+EX_DAR(r13)
1017 stw r9,PACA_EXGEN+EX_CCR(r13)
1018 std r10,PACA_EXGEN+EX_LR(r13)
1019 std r11,PACA_EXGEN+EX_SRR0(r13)
1020 bl slb_allocate_user
1022 ld r10,PACA_EXGEN+EX_LR(r13)
1023 ld r3,PACA_EXGEN+EX_R3(r13)
1024 lwz r9,PACA_EXGEN+EX_CCR(r13)
1025 ld r11,PACA_EXGEN+EX_SRR0(r13)
1026 mtlr r10
1027 beq- slb_miss_fault
1029 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1030 beq- unrecov_user_slb
1031 mfmsr r10
1033 .machine push
1034 .machine "power4"
1035 mtcrf 0x80,r9
1036 .machine pop
1038 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1039 mtmsrd r10,1
1041 mtspr SRR0,r11
1042 mtspr SRR1,r12
1044 ld r9,PACA_EXGEN+EX_R9(r13)
1045 ld r10,PACA_EXGEN+EX_R10(r13)
1046 ld r11,PACA_EXGEN+EX_R11(r13)
1047 ld r12,PACA_EXGEN+EX_R12(r13)
1048 ld r13,PACA_EXGEN+EX_R13(r13)
1049 rfid
1050 b .
1052 slb_miss_fault:
1053 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1054 ld r4,PACA_EXGEN+EX_DAR(r13)
1055 li r5,0
1056 std r4,_DAR(r1)
1057 std r5,_DSISR(r1)
1058 b handle_page_fault
1060 unrecov_user_slb:
1061 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1062 RECONCILE_IRQ_STATE(r10, r11)
1063 bl save_nvgprs
1064 1: addi r3,r1,STACK_FRAME_OVERHEAD
1065 bl unrecoverable_exception
1066 b 1b
1068 #endif /* __DISABLED__ */
1071 /*
1072 * Machine check is different because we use a different
1073 * save area: PACA_EXMC instead of PACA_EXGEN.
1074 */
1075 .align 7
1076 .globl machine_check_common
1077 machine_check_common:
1079 mfspr r10,SPRN_DAR
1080 std r10,PACA_EXGEN+EX_DAR(r13)
1081 mfspr r10,SPRN_DSISR
1082 stw r10,PACA_EXGEN+EX_DSISR(r13)
1083 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1084 FINISH_NAP
1085 RECONCILE_IRQ_STATE(r10, r11)
1086 ld r3,PACA_EXGEN+EX_DAR(r13)
1087 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1088 std r3,_DAR(r1)
1089 std r4,_DSISR(r1)
1090 bl save_nvgprs
1091 addi r3,r1,STACK_FRAME_OVERHEAD
1092 bl machine_check_exception
1093 b ret_from_except
1095 .align 7
1096 .globl alignment_common
1097 alignment_common:
1098 mfspr r10,SPRN_DAR
1099 std r10,PACA_EXGEN+EX_DAR(r13)
1100 mfspr r10,SPRN_DSISR
1101 stw r10,PACA_EXGEN+EX_DSISR(r13)
1102 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1103 ld r3,PACA_EXGEN+EX_DAR(r13)
1104 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1105 std r3,_DAR(r1)
1106 std r4,_DSISR(r1)
1107 bl save_nvgprs
1108 RECONCILE_IRQ_STATE(r10, r11)
1109 addi r3,r1,STACK_FRAME_OVERHEAD
1110 bl alignment_exception
1111 b ret_from_except
1113 .align 7
1114 .globl program_check_common
1115 program_check_common:
1116 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1117 bl save_nvgprs
1118 RECONCILE_IRQ_STATE(r10, r11)
1119 addi r3,r1,STACK_FRAME_OVERHEAD
1120 bl program_check_exception
1121 b ret_from_except
1123 .align 7
1124 .globl fp_unavailable_common
1125 fp_unavailable_common:
1126 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1127 bne 1f /* if from user, just load it up */
1128 bl save_nvgprs
1129 RECONCILE_IRQ_STATE(r10, r11)
1130 addi r3,r1,STACK_FRAME_OVERHEAD
1131 bl kernel_fp_unavailable_exception
1132 BUG_OPCODE
1133 1:
1134 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1135 BEGIN_FTR_SECTION
1136 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1137 * transaction), go do TM stuff
1138 */
1139 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1140 bne- 2f
1141 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1142 #endif
1143 bl load_up_fpu
1144 b fast_exception_return
1145 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1146 2: /* User process was in a transaction */
1147 bl save_nvgprs
1148 RECONCILE_IRQ_STATE(r10, r11)
1149 addi r3,r1,STACK_FRAME_OVERHEAD
1150 bl fp_unavailable_tm
1151 b ret_from_except
1152 #endif
1153 .align 7
1154 .globl altivec_unavailable_common
1155 altivec_unavailable_common:
1156 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1157 #ifdef CONFIG_ALTIVEC
1158 BEGIN_FTR_SECTION
1159 beq 1f
1160 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1161 BEGIN_FTR_SECTION_NESTED(69)
1162 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1163 * transaction), go do TM stuff
1164 */
1165 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1166 bne- 2f
1167 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1168 #endif
1169 bl load_up_altivec
1170 b fast_exception_return
1171 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1172 2: /* User process was in a transaction */
1173 bl save_nvgprs
1174 RECONCILE_IRQ_STATE(r10, r11)
1175 addi r3,r1,STACK_FRAME_OVERHEAD
1176 bl altivec_unavailable_tm
1177 b ret_from_except
1178 #endif
1179 1:
1180 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1181 #endif
1182 bl save_nvgprs
1183 RECONCILE_IRQ_STATE(r10, r11)
1184 addi r3,r1,STACK_FRAME_OVERHEAD
1185 bl altivec_unavailable_exception
1186 b ret_from_except
1188 .align 7
1189 .globl vsx_unavailable_common
1190 vsx_unavailable_common:
1191 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1192 #ifdef CONFIG_VSX
1193 BEGIN_FTR_SECTION
1194 beq 1f
1195 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1196 BEGIN_FTR_SECTION_NESTED(69)
1197 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1198 * transaction), go do TM stuff
1199 */
1200 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1201 bne- 2f
1202 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1203 #endif
1204 b load_up_vsx
1205 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1206 2: /* User process was in a transaction */
1207 bl save_nvgprs
1208 RECONCILE_IRQ_STATE(r10, r11)
1209 addi r3,r1,STACK_FRAME_OVERHEAD
1210 bl vsx_unavailable_tm
1211 b ret_from_except
1212 #endif
1213 1:
1214 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1215 #endif
1216 bl save_nvgprs
1217 RECONCILE_IRQ_STATE(r10, r11)
1218 addi r3,r1,STACK_FRAME_OVERHEAD
1219 bl vsx_unavailable_exception
1220 b ret_from_except
1222 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1223 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1225 .align 7
1226 .globl __end_handlers
1227 __end_handlers:
1229 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1230 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1231 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1233 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1234 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1235 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1236 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1237 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1239 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1240 /*
1241 * Data area reserved for FWNMI option.
1242 * This address (0x7000) is fixed by the RPA.
1243 */
1244 .= 0x7000
1245 .globl fwnmi_data_area
1246 fwnmi_data_area:
1248 /* pseries and powernv need to keep the whole page from
1249 * 0x7000 to 0x8000 free for use by the firmware
1250 */
1251 . = 0x8000
1252 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1254 .globl hmi_exception_early
1255 hmi_exception_early:
1256 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60)
1257 mr r10,r1 /* Save r1 */
1258 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1259 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1260 std r9,_CCR(r1) /* save CR in stackframe */
1261 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1262 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1263 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1264 std r12,_MSR(r1) /* save SRR1 in stackframe */
1265 std r10,0(r1) /* make stack chain pointer */
1266 std r0,GPR0(r1) /* save r0 in stackframe */
1267 std r10,GPR1(r1) /* save r1 in stackframe */
1268 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1269 EXCEPTION_PROLOG_COMMON_3(0xe60)
1270 addi r3,r1,STACK_FRAME_OVERHEAD
1271 bl hmi_exception_realmode
1272 /* Windup the stack. */
1273 /* Clear MSR_RI before setting SRR0 and SRR1. */
1274 li r0,MSR_RI
1275 mfmsr r9 /* get MSR value */
1276 andc r9,r9,r0
1277 mtmsrd r9,1 /* Clear MSR_RI */
1278 /* Move original HSRR0 and HSRR1 into the respective regs */
1279 ld r9,_MSR(r1)
1280 mtspr SPRN_HSRR1,r9
1281 ld r3,_NIP(r1)
1282 mtspr SPRN_HSRR0,r3
1283 ld r9,_CTR(r1)
1284 mtctr r9
1285 ld r9,_XER(r1)
1286 mtxer r9
1287 ld r9,_LINK(r1)
1288 mtlr r9
1289 REST_GPR(0, r1)
1290 REST_8GPRS(2, r1)
1291 REST_GPR(10, r1)
1292 ld r11,_CCR(r1)
1293 mtcr r11
1294 REST_GPR(11, r1)
1295 REST_2GPRS(12, r1)
1296 /* restore original r1. */
1297 ld r1,GPR1(r1)
1299 /*
1300 * Go to virtual mode and pull the HMI event information from
1301 * firmware.
1302 */
1303 .globl hmi_exception_after_realmode
1304 hmi_exception_after_realmode:
1305 SET_SCRATCH0(r13)
1306 EXCEPTION_PROLOG_0(PACA_EXGEN)
1307 b hmi_exception_hv
1309 #ifdef CONFIG_PPC_POWERNV
1310 _GLOBAL(opal_mc_secondary_handler)
1311 HMT_MEDIUM_PPR_DISCARD
1312 SET_SCRATCH0(r13)
1313 GET_PACA(r13)
1314 clrldi r3,r3,2
1315 tovirt(r3,r3)
1316 std r3,PACA_OPAL_MC_EVT(r13)
1317 ld r13,OPAL_MC_SRR0(r3)
1318 mtspr SPRN_SRR0,r13
1319 ld r13,OPAL_MC_SRR1(r3)
1320 mtspr SPRN_SRR1,r13
1321 ld r3,OPAL_MC_GPR3(r3)
1322 GET_SCRATCH0(r13)
1323 b machine_check_pSeries
1324 #endif /* CONFIG_PPC_POWERNV */
1327 #define MACHINE_CHECK_HANDLER_WINDUP \
1328 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1329 li r0,MSR_RI; \
1330 mfmsr r9; /* get MSR value */ \
1331 andc r9,r9,r0; \
1332 mtmsrd r9,1; /* Clear MSR_RI */ \
1333 /* Move original SRR0 and SRR1 into the respective regs */ \
1334 ld r9,_MSR(r1); \
1335 mtspr SPRN_SRR1,r9; \
1336 ld r3,_NIP(r1); \
1337 mtspr SPRN_SRR0,r3; \
1338 ld r9,_CTR(r1); \
1339 mtctr r9; \
1340 ld r9,_XER(r1); \
1341 mtxer r9; \
1342 ld r9,_LINK(r1); \
1343 mtlr r9; \
1344 REST_GPR(0, r1); \
1345 REST_8GPRS(2, r1); \
1346 REST_GPR(10, r1); \
1347 ld r11,_CCR(r1); \
1348 mtcr r11; \
1349 /* Decrement paca->in_mce. */ \
1350 lhz r12,PACA_IN_MCE(r13); \
1351 subi r12,r12,1; \
1352 sth r12,PACA_IN_MCE(r13); \
1353 REST_GPR(11, r1); \
1354 REST_2GPRS(12, r1); \
1355 /* restore original r1. */ \
1356 ld r1,GPR1(r1)
1358 /*
1359 * Handle machine check early in real mode. We come here with
1360 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1361 */
1362 .align 7
1363 .globl machine_check_handle_early
1364 machine_check_handle_early:
1365 std r0,GPR0(r1) /* Save r0 */
1366 EXCEPTION_PROLOG_COMMON_3(0x200)
1367 bl save_nvgprs
1368 addi r3,r1,STACK_FRAME_OVERHEAD
1369 bl machine_check_early
1370 std r3,RESULT(r1) /* Save result */
1371 ld r12,_MSR(r1)
1372 #ifdef CONFIG_PPC_P7_NAP
1373 /*
1374 * Check if thread was in power saving mode. We come here when any
1375 * of the following is true:
1376 * a. thread wasn't in power saving mode
1377 * b. thread was in power saving mode with no state loss or
1378 * supervisor state loss
1379 *
1380 * Go back to nap again if (b) is true.
1381 */
1382 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1383 beq 4f /* No, it wasn;t */
1384 /* Thread was in power saving mode. Go back to nap again. */
1385 cmpwi r11,2
1386 bne 3f
1387 /* Supervisor state loss */
1388 li r0,1
1389 stb r0,PACA_NAPSTATELOST(r13)
1390 3: bl machine_check_queue_event
1391 MACHINE_CHECK_HANDLER_WINDUP
1392 GET_PACA(r13)
1393 ld r1,PACAR1(r13)
1394 b power7_enter_nap_mode
1395 4:
1396 #endif
1397 /*
1398 * Check if we are coming from hypervisor userspace. If yes then we
1399 * continue in host kernel in V mode to deliver the MC event.
1400 */
1401 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1402 beq 5f
1403 andi. r11,r12,MSR_PR /* See if coming from user. */
1404 bne 9f /* continue in V mode if we are. */
1406 5:
1407 #ifdef CONFIG_KVM_BOOK3S_64_HV
1408 /*
1409 * We are coming from kernel context. Check if we are coming from
1410 * guest. if yes, then we can continue. We will fall through
1411 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1412 */
1413 lbz r11,HSTATE_IN_GUEST(r13)
1414 cmpwi r11,0 /* Check if coming from guest */
1415 bne 9f /* continue if we are. */
1416 #endif
1417 /*
1418 * At this point we are not sure about what context we come from.
1419 * Queue up the MCE event and return from the interrupt.
1420 * But before that, check if this is an un-recoverable exception.
1421 * If yes, then stay on emergency stack and panic.
1422 */
1423 andi. r11,r12,MSR_RI
1424 bne 2f
1425 1: mfspr r11,SPRN_SRR0
1426 ld r10,PACAKBASE(r13)
1427 LOAD_HANDLER(r10,unrecover_mce)
1428 mtspr SPRN_SRR0,r10
1429 ld r10,PACAKMSR(r13)
1430 /*
1431 * We are going down. But there are chances that we might get hit by
1432 * another MCE during panic path and we may run into unstable state
1433 * with no way out. Hence, turn ME bit off while going down, so that
1434 * when another MCE is hit during panic path, system will checkstop
1435 * and hypervisor will get restarted cleanly by SP.
1436 */
1437 li r3,MSR_ME
1438 andc r10,r10,r3 /* Turn off MSR_ME */
1439 mtspr SPRN_SRR1,r10
1440 rfid
1441 b .
1442 2:
1443 /*
1444 * Check if we have successfully handled/recovered from error, if not
1445 * then stay on emergency stack and panic.
1446 */
1447 ld r3,RESULT(r1) /* Load result */
1448 cmpdi r3,0 /* see if we handled MCE successfully */
1450 beq 1b /* if !handled then panic */
1451 /*
1452 * Return from MC interrupt.
1453 * Queue up the MCE event so that we can log it later, while
1454 * returning from kernel or opal call.
1455 */
1456 bl machine_check_queue_event
1457 MACHINE_CHECK_HANDLER_WINDUP
1458 rfid
1459 9:
1460 /* Deliver the machine check to host kernel in V mode. */
1461 MACHINE_CHECK_HANDLER_WINDUP
1462 b machine_check_pSeries
1464 unrecover_mce:
1465 /* Invoke machine_check_exception to print MCE event and panic. */
1466 addi r3,r1,STACK_FRAME_OVERHEAD
1467 bl machine_check_exception
1468 /*
1469 * We will not reach here. Even if we did, there is no way out. Call
1470 * unrecoverable_exception and die.
1471 */
1472 1: addi r3,r1,STACK_FRAME_OVERHEAD
1473 bl unrecoverable_exception
1474 b 1b
1475 /*
1476 * r13 points to the PACA, r9 contains the saved CR,
1477 * r12 contain the saved SRR1, SRR0 is still ready for return
1478 * r3 has the faulting address
1479 * r9 - r13 are saved in paca->exslb.
1480 * r3 is saved in paca->slb_r3
1481 * We assume we aren't going to take any exceptions during this procedure.
1482 */
1483 slb_miss_realmode:
1484 mflr r10
1485 #ifdef CONFIG_RELOCATABLE
1486 mtctr r11
1487 #endif
1489 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1490 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1492 bl slb_allocate_realmode
1494 /* All done -- return from exception. */
1496 ld r10,PACA_EXSLB+EX_LR(r13)
1497 ld r3,PACA_EXSLB+EX_R3(r13)
1498 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1500 mtlr r10
1502 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1503 beq- 2f
1505 .machine push
1506 .machine "power4"
1507 mtcrf 0x80,r9
1508 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1509 .machine pop
1511 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1512 ld r9,PACA_EXSLB+EX_R9(r13)
1513 ld r10,PACA_EXSLB+EX_R10(r13)
1514 ld r11,PACA_EXSLB+EX_R11(r13)
1515 ld r12,PACA_EXSLB+EX_R12(r13)
1516 ld r13,PACA_EXSLB+EX_R13(r13)
1517 rfid
1518 b . /* prevent speculative execution */
1520 2: mfspr r11,SPRN_SRR0
1521 ld r10,PACAKBASE(r13)
1522 LOAD_HANDLER(r10,unrecov_slb)
1523 mtspr SPRN_SRR0,r10
1524 ld r10,PACAKMSR(r13)
1525 mtspr SPRN_SRR1,r10
1526 rfid
1527 b .
1529 unrecov_slb:
1530 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1531 RECONCILE_IRQ_STATE(r10, r11)
1532 bl save_nvgprs
1533 1: addi r3,r1,STACK_FRAME_OVERHEAD
1534 bl unrecoverable_exception
1535 b 1b
1538 #ifdef CONFIG_PPC_970_NAP
1539 power4_fixup_nap:
1540 andc r9,r9,r10
1541 std r9,TI_LOCAL_FLAGS(r11)
1542 ld r10,_LINK(r1) /* make idle task do the */
1543 std r10,_NIP(r1) /* equivalent of a blr */
1544 blr
1545 #endif
1547 /*
1548 * Hash table stuff
1549 */
1550 .align 7
1551 do_hash_page:
1552 std r3,_DAR(r1)
1553 std r4,_DSISR(r1)
1555 andis. r0,r4,0xa410 /* weird error? */
1556 bne- handle_page_fault /* if not, try to insert a HPTE */
1557 andis. r0,r4,DSISR_DABRMATCH@h
1558 bne- handle_dabr_fault
1559 CURRENT_THREAD_INFO(r11, r1)
1560 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1561 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1562 bne 77f /* then don't call hash_page now */
1563 /*
1564 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1565 * accessing a userspace segment (even from the kernel). We assume
1566 * kernel addresses always have the high bit set.
1567 */
1568 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1569 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1570 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1571 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1572 ori r4,r4,1 /* add _PAGE_PRESENT */
1573 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1575 /*
1576 * r3 contains the faulting address
1577 * r4 contains the required access permissions
1578 * r5 contains the trap number
1579 *
1580 * at return r3 = 0 for success, 1 for page fault, negative for error
1581 */
1582 bl hash_page /* build HPTE if possible */
1583 cmpdi r3,0 /* see if hash_page succeeded */
1585 /* Success */
1586 beq fast_exc_return_irq /* Return from exception on success */
1588 /* Error */
1589 blt- 13f
1591 /* Here we have a page fault that hash_page can't handle. */
1592 handle_page_fault:
1593 11: ld r4,_DAR(r1)
1594 ld r5,_DSISR(r1)
1595 addi r3,r1,STACK_FRAME_OVERHEAD
1596 bl do_page_fault
1597 cmpdi r3,0
1598 beq+ 12f
1599 bl save_nvgprs
1600 mr r5,r3
1601 addi r3,r1,STACK_FRAME_OVERHEAD
1602 lwz r4,_DAR(r1)
1603 bl bad_page_fault
1604 b ret_from_except
1606 /* We have a data breakpoint exception - handle it */
1607 handle_dabr_fault:
1608 bl save_nvgprs
1609 ld r4,_DAR(r1)
1610 ld r5,_DSISR(r1)
1611 addi r3,r1,STACK_FRAME_OVERHEAD
1612 bl do_break
1613 12: b ret_from_except_lite
1616 /* We have a page fault that hash_page could handle but HV refused
1617 * the PTE insertion
1618 */
1619 13: bl save_nvgprs
1620 mr r5,r3
1621 addi r3,r1,STACK_FRAME_OVERHEAD
1622 ld r4,_DAR(r1)
1623 bl low_hash_fault
1624 b ret_from_except
1626 /*
1627 * We come here as a result of a DSI at a point where we don't want
1628 * to call hash_page, such as when we are accessing memory (possibly
1629 * user memory) inside a PMU interrupt that occurred while interrupts
1630 * were soft-disabled. We want to invoke the exception handler for
1631 * the access, or panic if there isn't a handler.
1632 */
1633 77: bl save_nvgprs
1634 mr r4,r3
1635 addi r3,r1,STACK_FRAME_OVERHEAD
1636 li r5,SIGSEGV
1637 bl bad_page_fault
1638 b ret_from_except
1640 /*
1641 * Here we have detected that the kernel stack pointer is bad.
1642 * R9 contains the saved CR, r13 points to the paca,
1643 * r10 contains the (bad) kernel stack pointer,
1644 * r11 and r12 contain the saved SRR0 and SRR1.
1645 * We switch to using an emergency stack, save the registers there,
1646 * and call kernel_bad_stack(), which panics.
1647 */
1648 bad_stack:
1649 ld r1,PACAEMERGSP(r13)
1650 subi r1,r1,64+INT_FRAME_SIZE
1651 std r9,_CCR(r1)
1652 std r10,GPR1(r1)
1653 std r11,_NIP(r1)
1654 std r12,_MSR(r1)
1655 mfspr r11,SPRN_DAR
1656 mfspr r12,SPRN_DSISR
1657 std r11,_DAR(r1)
1658 std r12,_DSISR(r1)
1659 mflr r10
1660 mfctr r11
1661 mfxer r12
1662 std r10,_LINK(r1)
1663 std r11,_CTR(r1)
1664 std r12,_XER(r1)
1665 SAVE_GPR(0,r1)
1666 SAVE_GPR(2,r1)
1667 ld r10,EX_R3(r3)
1668 std r10,GPR3(r1)
1669 SAVE_GPR(4,r1)
1670 SAVE_4GPRS(5,r1)
1671 ld r9,EX_R9(r3)
1672 ld r10,EX_R10(r3)
1673 SAVE_2GPRS(9,r1)
1674 ld r9,EX_R11(r3)
1675 ld r10,EX_R12(r3)
1676 ld r11,EX_R13(r3)
1677 std r9,GPR11(r1)
1678 std r10,GPR12(r1)
1679 std r11,GPR13(r1)
1680 BEGIN_FTR_SECTION
1681 ld r10,EX_CFAR(r3)
1682 std r10,ORIG_GPR3(r1)
1683 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1684 SAVE_8GPRS(14,r1)
1685 SAVE_10GPRS(22,r1)
1686 lhz r12,PACA_TRAP_SAVE(r13)
1687 std r12,_TRAP(r1)
1688 addi r11,r1,INT_FRAME_SIZE
1689 std r11,0(r1)
1690 li r12,0
1691 std r12,0(r11)
1692 ld r2,PACATOC(r13)
1693 ld r11,exception_marker@toc(r2)
1694 std r12,RESULT(r1)
1695 std r11,STACK_FRAME_OVERHEAD-16(r1)
1696 1: addi r3,r1,STACK_FRAME_OVERHEAD
1697 bl kernel_bad_stack
1698 b 1b