2 * Copyright IBM Corporation, 2013
3 * Author Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2.1 of the GNU Lesser General Public License
7 * as published by the Free Software Foundation.
9 * This program is distributed in the hope that it would be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 * PPC64 THP Support for hash based MMUs
19 #include <asm/machdep.h>
21 static void invalidate_old_hpte(unsigned long vsid
, unsigned long addr
,
22 pmd_t
*pmdp
, unsigned int psize
, int ssize
)
24 int i
, max_hpte_count
, valid
;
26 unsigned char *hpte_slot_array
;
27 unsigned long hidx
, shift
, vpn
, hash
, slot
;
29 s_addr
= addr
& HPAGE_PMD_MASK
;
30 hpte_slot_array
= get_hpte_slot_array(pmdp
);
32 * IF we try to do a HUGE PTE update after a withdraw is done.
33 * we will find the below NULL. This happens when we do
39 if (ppc_md
.hugepage_invalidate
)
40 return ppc_md
.hugepage_invalidate(vsid
, s_addr
, hpte_slot_array
,
43 * No bluk hpte removal support, invalidate each entry
45 shift
= mmu_psize_defs
[psize
].shift
;
46 max_hpte_count
= HPAGE_PMD_SIZE
>> shift
;
47 for (i
= 0; i
< max_hpte_count
; i
++) {
49 * 8 bits per each hpte entries
50 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
52 valid
= hpte_valid(hpte_slot_array
, i
);
55 hidx
= hpte_hash_index(hpte_slot_array
, i
);
58 addr
= s_addr
+ (i
* (1ul << shift
));
59 vpn
= hpt_vpn(addr
, vsid
, ssize
);
60 hash
= hpt_hash(vpn
, shift
, ssize
);
61 if (hidx
& _PTEIDX_SECONDARY
)
64 slot
= (hash
& htab_hash_mask
) * HPTES_PER_GROUP
;
65 slot
+= hidx
& _PTEIDX_GROUP_IX
;
66 ppc_md
.hpte_invalidate(slot
, vpn
, psize
,
67 MMU_PAGE_16M
, ssize
, 0);
72 int __hash_page_thp(unsigned long ea
, unsigned long access
, unsigned long vsid
,
73 pmd_t
*pmdp
, unsigned long trap
, int local
, int ssize
,
76 unsigned int index
, valid
;
77 unsigned char *hpte_slot_array
;
78 unsigned long rflags
, pa
, hidx
;
79 unsigned long old_pmd
, new_pmd
;
80 int ret
, lpsize
= MMU_PAGE_16M
;
81 unsigned long vpn
, hash
, shift
, slot
;
84 * atomically mark the linux large page PMD busy and dirty
87 pmd_t pmd
= ACCESS_ONCE(*pmdp
);
89 old_pmd
= pmd_val(pmd
);
90 /* If PMD busy, retry the access */
91 if (unlikely(old_pmd
& _PAGE_BUSY
))
93 /* If PMD is trans splitting retry the access */
94 if (unlikely(old_pmd
& _PAGE_SPLITTING
))
96 /* If PMD permissions don't match, take page fault */
97 if (unlikely(access
& ~old_pmd
))
100 * Try to lock the PTE, add ACCESSED and DIRTY if it was
103 new_pmd
= old_pmd
| _PAGE_BUSY
| _PAGE_ACCESSED
;
104 if (access
& _PAGE_RW
)
105 new_pmd
|= _PAGE_DIRTY
;
106 } while (old_pmd
!= __cmpxchg_u64((unsigned long *)pmdp
,
109 * PP bits. _PAGE_USER is already PP bit 0x2, so we only
110 * need to add in 0x1 if it's a read-only user page
112 rflags
= new_pmd
& _PAGE_USER
;
113 if ((new_pmd
& _PAGE_USER
) && !((new_pmd
& _PAGE_RW
) &&
114 (new_pmd
& _PAGE_DIRTY
)))
117 * _PAGE_EXEC -> HW_NO_EXEC since it's inverted
119 rflags
|= ((new_pmd
& _PAGE_EXEC
) ? 0 : HPTE_R_N
);
122 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE
)) {
125 * No CPU has hugepages but lacks no execute, so we
126 * don't need to worry about that case
128 rflags
= hash_page_do_lazy_icache(rflags
, __pte(old_pte
), trap
);
132 * Find the slot index details for this ea, using base page size.
134 shift
= mmu_psize_defs
[psize
].shift
;
135 index
= (ea
& ~HPAGE_PMD_MASK
) >> shift
;
136 BUG_ON(index
>= 4096);
138 vpn
= hpt_vpn(ea
, vsid
, ssize
);
139 hash
= hpt_hash(vpn
, shift
, ssize
);
140 hpte_slot_array
= get_hpte_slot_array(pmdp
);
141 if (psize
== MMU_PAGE_4K
) {
143 * invalidate the old hpte entry if we have that mapped via 64K
144 * base page size. This is because demote_segment won't flush
145 * hash page table entries.
147 if ((old_pmd
& _PAGE_HASHPTE
) && !(old_pmd
& _PAGE_COMBO
))
148 invalidate_old_hpte(vsid
, ea
, pmdp
, MMU_PAGE_64K
, ssize
);
151 valid
= hpte_valid(hpte_slot_array
, index
);
153 /* update the hpte bits */
154 hidx
= hpte_hash_index(hpte_slot_array
, index
);
155 if (hidx
& _PTEIDX_SECONDARY
)
157 slot
= (hash
& htab_hash_mask
) * HPTES_PER_GROUP
;
158 slot
+= hidx
& _PTEIDX_GROUP_IX
;
160 ret
= ppc_md
.hpte_updatepp(slot
, rflags
, vpn
,
161 psize
, lpsize
, ssize
, local
);
163 * We failed to update, try to insert a new entry.
167 * large pte is marked busy, so we can be sure
168 * nobody is looking at hpte_slot_array. hence we can
169 * safely update this here.
172 hpte_slot_array
[index
] = 0;
177 unsigned long hpte_group
;
179 /* insert new entry */
180 pa
= pmd_pfn(__pmd(old_pmd
)) << PAGE_SHIFT
;
181 new_pmd
|= _PAGE_HASHPTE
;
183 /* Add in WIMG bits */
184 rflags
|= (new_pmd
& (_PAGE_WRITETHRU
| _PAGE_NO_CACHE
|
187 * enable the memory coherence always
191 hpte_group
= ((hash
& htab_hash_mask
) * HPTES_PER_GROUP
) & ~0x7UL
;
193 /* Insert into the hash table, primary slot */
194 slot
= ppc_md
.hpte_insert(hpte_group
, vpn
, pa
, rflags
, 0,
195 psize
, lpsize
, ssize
);
197 * Primary is full, try the secondary
199 if (unlikely(slot
== -1)) {
200 hpte_group
= ((~hash
& htab_hash_mask
) *
201 HPTES_PER_GROUP
) & ~0x7UL
;
202 slot
= ppc_md
.hpte_insert(hpte_group
, vpn
, pa
,
203 rflags
, HPTE_V_SECONDARY
,
204 psize
, lpsize
, ssize
);
207 hpte_group
= ((hash
& htab_hash_mask
) *
208 HPTES_PER_GROUP
) & ~0x7UL
;
210 ppc_md
.hpte_remove(hpte_group
);
215 * Hypervisor failure. Restore old pmd and return -1
216 * similar to __hash_page_*
218 if (unlikely(slot
== -2)) {
219 *pmdp
= __pmd(old_pmd
);
220 hash_failure_debug(ea
, access
, vsid
, trap
, ssize
,
221 psize
, lpsize
, old_pmd
);
225 * large pte is marked busy, so we can be sure
226 * nobody is looking at hpte_slot_array. hence we can
227 * safely update this here.
229 mark_hpte_slot_valid(hpte_slot_array
, index
, slot
);
232 * Mark the pte with _PAGE_COMBO, if we are trying to hash it with
235 if (psize
== MMU_PAGE_4K
)
236 new_pmd
|= _PAGE_COMBO
;
238 * The hpte valid is stored in the pgtable whose address is in the
239 * second half of the PMD. Order this against clearing of the busy bit in
243 *pmdp
= __pmd(new_pmd
& ~_PAGE_BUSY
);