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perf tools: Don't clone maps from parent when synthesizing forks
[linux/fpc-iii.git] / drivers / block / mtip32xx / mtip32xx.c
blobdfc8de6ce5254872a8b96ec364d7cd3136f4f7d7
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/blk-mq.h>
35 #include <linux/bio.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/idr.h>
38 #include <linux/kthread.h>
39 #include <../drivers/ata/ahci.h>
40 #include <linux/export.h>
41 #include <linux/debugfs.h>
42 #include <linux/prefetch.h>
43 #include "mtip32xx.h"
44
45 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
46
47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48 #define AHCI_RX_FIS_SZ 0x100
49 #define AHCI_RX_FIS_OFFSET 0x0
50 #define AHCI_IDFY_SZ ATA_SECT_SIZE
51 #define AHCI_IDFY_OFFSET 0x400
52 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53 #define AHCI_SECTBUF_OFFSET 0x800
54 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55 #define AHCI_SMARTBUF_OFFSET 0xC00
56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57 #define BLOCK_DMA_ALLOC_SZ 4096
58
59 /* DMA region containing command table (should be 8192 bytes) */
60 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62 #define AHCI_CMD_TBL_OFFSET 0x0
63
64 /* DMA region per command (contains header and SGL) */
65 #define AHCI_CMD_TBL_HDR_SZ 0x80
66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
67 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
71
72 #define HOST_CAP_NZDMA (1 << 19)
73 #define HOST_HSORG 0xFC
74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76 #define HSORG_HWREV 0xFF00
77 #define HSORG_STYLE 0x8
78 #define HSORG_SLOTGROUPS 0x7
79
80 #define PORT_COMMAND_ISSUE 0x38
81 #define PORT_SDBV 0x7C
82
83 #define PORT_OFFSET 0x100
84 #define PORT_MEM_SIZE 0x80
85
86 #define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91 #define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93 #define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97 #define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100 /* product numbers */
101 #define MTIP_PRODUCT_UNKNOWN 0x00
102 #define MTIP_PRODUCT_ASICFPGA 0x11
103
104 /* Device instance number, incremented each time a device is probed. */
105 static int instance;
106
107 static struct list_head online_list;
108 static struct list_head removing_list;
109 static spinlock_t dev_lock;
110
111 /*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
115 static int mtip_major;
116 static struct dentry *dfs_parent;
117 static struct dentry *dfs_device_status;
118
119 static u32 cpu_use[NR_CPUS];
120
121 static DEFINE_IDA(rssd_index_ida);
122
123 static int mtip_block_initialize(struct driver_data *dd);
124
125 #ifdef CONFIG_COMPAT
126 struct mtip_compat_ide_task_request_s {
127 __u8 io_ports[8];
128 __u8 hob_ports[8];
129 ide_reg_valid_t out_flags;
130 ide_reg_valid_t in_flags;
131 int data_phase;
132 int req_cmd;
133 compat_ulong_t out_size;
134 compat_ulong_t in_size;
135 };
136 #endif
137
138 /*
139 * This function check_for_surprise_removal is called
140 * while card is removed from the system and it will
141 * read the vendor id from the configration space
142 *
143 * @pdev Pointer to the pci_dev structure.
144 *
145 * return value
146 * true if device removed, else false
147 */
148 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
149 {
150 u16 vendor_id = 0;
151 struct driver_data *dd = pci_get_drvdata(pdev);
152
153 if (dd->sr)
154 return true;
155
156 /* Read the vendorID from the configuration space */
157 pci_read_config_word(pdev, 0x00, &vendor_id);
158 if (vendor_id == 0xFFFF) {
159 dd->sr = true;
160 if (dd->queue)
161 blk_queue_flag_set(QUEUE_FLAG_DEAD, dd->queue);
162 else
163 dev_warn(&dd->pdev->dev,
164 "%s: dd->queue is NULL\n", __func__);
165 return true; /* device removed */
166 }
167
168 return false; /* device present */
169 }
170
171 /* we have to use runtime tag to setup command header */
172 static void mtip_init_cmd_header(struct request *rq)
173 {
174 struct driver_data *dd = rq->q->queuedata;
175 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
176
177 /* Point the command headers at the command tables. */
178 cmd->command_header = dd->port->command_list +
179 (sizeof(struct mtip_cmd_hdr) * rq->tag);
180 cmd->command_header_dma = dd->port->command_list_dma +
181 (sizeof(struct mtip_cmd_hdr) * rq->tag);
182
183 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
184 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
185
186 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
187 }
188
189 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
190 {
191 struct request *rq;
192
193 if (mtip_check_surprise_removal(dd->pdev))
194 return NULL;
195
196 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
197 if (IS_ERR(rq))
198 return NULL;
199
200 /* Internal cmd isn't submitted via .queue_rq */
201 mtip_init_cmd_header(rq);
202
203 return blk_mq_rq_to_pdu(rq);
204 }
205
206 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
207 unsigned int tag)
208 {
209 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
210
211 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag));
212 }
213
214 /*
215 * Reset the HBA (without sleeping)
216 *
217 * @dd Pointer to the driver data structure.
218 *
219 * return value
220 * 0 The reset was successful.
221 * -1 The HBA Reset bit did not clear.
222 */
223 static int mtip_hba_reset(struct driver_data *dd)
224 {
225 unsigned long timeout;
226
227 /* Set the reset bit */
228 writel(HOST_RESET, dd->mmio + HOST_CTL);
229
230 /* Flush */
231 readl(dd->mmio + HOST_CTL);
232
233 /*
234 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
235 * is 1 sec but in LUN failure conditions, up to 10 secs are required
236 */
237 timeout = jiffies + msecs_to_jiffies(10000);
238 do {
239 mdelay(10);
240 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
241 return -1;
242
243 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
244 && time_before(jiffies, timeout));
245
246 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
247 return -1;
248
249 return 0;
250 }
251
252 /*
253 * Issue a command to the hardware.
254 *
255 * Set the appropriate bit in the s_active and Command Issue hardware
256 * registers, causing hardware command processing to begin.
257 *
258 * @port Pointer to the port structure.
259 * @tag The tag of the command to be issued.
260 *
261 * return value
262 * None
263 */
264 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
265 {
266 int group = tag >> 5;
267
268 /* guard SACT and CI registers */
269 spin_lock(&port->cmd_issue_lock[group]);
270 writel((1 << MTIP_TAG_BIT(tag)),
271 port->s_active[MTIP_TAG_INDEX(tag)]);
272 writel((1 << MTIP_TAG_BIT(tag)),
273 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
274 spin_unlock(&port->cmd_issue_lock[group]);
275 }
276
277 /*
278 * Enable/disable the reception of FIS
279 *
280 * @port Pointer to the port data structure
281 * @enable 1 to enable, 0 to disable
282 *
283 * return value
284 * Previous state: 1 enabled, 0 disabled
285 */
286 static int mtip_enable_fis(struct mtip_port *port, int enable)
287 {
288 u32 tmp;
289
290 /* enable FIS reception */
291 tmp = readl(port->mmio + PORT_CMD);
292 if (enable)
293 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
294 else
295 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
296
297 /* Flush */
298 readl(port->mmio + PORT_CMD);
299
300 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
301 }
302
303 /*
304 * Enable/disable the DMA engine
305 *
306 * @port Pointer to the port data structure
307 * @enable 1 to enable, 0 to disable
308 *
309 * return value
310 * Previous state: 1 enabled, 0 disabled.
311 */
312 static int mtip_enable_engine(struct mtip_port *port, int enable)
313 {
314 u32 tmp;
315
316 /* enable FIS reception */
317 tmp = readl(port->mmio + PORT_CMD);
318 if (enable)
319 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
320 else
321 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
322
323 readl(port->mmio + PORT_CMD);
324 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
325 }
326
327 /*
328 * Enables the port DMA engine and FIS reception.
329 *
330 * return value
331 * None
332 */
333 static inline void mtip_start_port(struct mtip_port *port)
334 {
335 /* Enable FIS reception */
336 mtip_enable_fis(port, 1);
337
338 /* Enable the DMA engine */
339 mtip_enable_engine(port, 1);
340 }
341
342 /*
343 * Deinitialize a port by disabling port interrupts, the DMA engine,
344 * and FIS reception.
345 *
346 * @port Pointer to the port structure
347 *
348 * return value
349 * None
350 */
351 static inline void mtip_deinit_port(struct mtip_port *port)
352 {
353 /* Disable interrupts on this port */
354 writel(0, port->mmio + PORT_IRQ_MASK);
355
356 /* Disable the DMA engine */
357 mtip_enable_engine(port, 0);
358
359 /* Disable FIS reception */
360 mtip_enable_fis(port, 0);
361 }
362
363 /*
364 * Initialize a port.
365 *
366 * This function deinitializes the port by calling mtip_deinit_port() and
367 * then initializes it by setting the command header and RX FIS addresses,
368 * clearing the SError register and any pending port interrupts before
369 * re-enabling the default set of port interrupts.
370 *
371 * @port Pointer to the port structure.
372 *
373 * return value
374 * None
375 */
376 static void mtip_init_port(struct mtip_port *port)
377 {
378 int i;
379 mtip_deinit_port(port);
380
381 /* Program the command list base and FIS base addresses */
382 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
383 writel((port->command_list_dma >> 16) >> 16,
384 port->mmio + PORT_LST_ADDR_HI);
385 writel((port->rxfis_dma >> 16) >> 16,
386 port->mmio + PORT_FIS_ADDR_HI);
387 set_bit(MTIP_PF_HOST_CAP_64, &port->flags);
388 }
389
390 writel(port->command_list_dma & 0xFFFFFFFF,
391 port->mmio + PORT_LST_ADDR);
392 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
393
394 /* Clear SError */
395 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
396
397 /* reset the completed registers.*/
398 for (i = 0; i < port->dd->slot_groups; i++)
399 writel(0xFFFFFFFF, port->completed[i]);
400
401 /* Clear any pending interrupts for this port */
402 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
403
404 /* Clear any pending interrupts on the HBA. */
405 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
406 port->dd->mmio + HOST_IRQ_STAT);
407
408 /* Enable port interrupts */
409 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
410 }
411
412 /*
413 * Restart a port
414 *
415 * @port Pointer to the port data structure.
416 *
417 * return value
418 * None
419 */
420 static void mtip_restart_port(struct mtip_port *port)
421 {
422 unsigned long timeout;
423
424 /* Disable the DMA engine */
425 mtip_enable_engine(port, 0);
426
427 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
428 timeout = jiffies + msecs_to_jiffies(500);
429 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
430 && time_before(jiffies, timeout))
431 ;
432
433 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
434 return;
435
436 /*
437 * Chip quirk: escalate to hba reset if
438 * PxCMD.CR not clear after 500 ms
439 */
440 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
441 dev_warn(&port->dd->pdev->dev,
442 "PxCMD.CR not clear, escalating reset\n");
443
444 if (mtip_hba_reset(port->dd))
445 dev_err(&port->dd->pdev->dev,
446 "HBA reset escalation failed.\n");
447
448 /* 30 ms delay before com reset to quiesce chip */
449 mdelay(30);
450 }
451
452 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
453
454 /* Set PxSCTL.DET */
455 writel(readl(port->mmio + PORT_SCR_CTL) |
456 1, port->mmio + PORT_SCR_CTL);
457 readl(port->mmio + PORT_SCR_CTL);
458
459 /* Wait 1 ms to quiesce chip function */
460 timeout = jiffies + msecs_to_jiffies(1);
461 while (time_before(jiffies, timeout))
462 ;
463
464 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
465 return;
466
467 /* Clear PxSCTL.DET */
468 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
469 port->mmio + PORT_SCR_CTL);
470 readl(port->mmio + PORT_SCR_CTL);
471
472 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
473 timeout = jiffies + msecs_to_jiffies(500);
474 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
475 && time_before(jiffies, timeout))
476 ;
477
478 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
479 return;
480
481 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
482 dev_warn(&port->dd->pdev->dev,
483 "COM reset failed\n");
484
485 mtip_init_port(port);
486 mtip_start_port(port);
487
488 }
489
490 static int mtip_device_reset(struct driver_data *dd)
491 {
492 int rv = 0;
493
494 if (mtip_check_surprise_removal(dd->pdev))
495 return 0;
496
497 if (mtip_hba_reset(dd) < 0)
498 rv = -EFAULT;
499
500 mdelay(1);
501 mtip_init_port(dd->port);
502 mtip_start_port(dd->port);
503
504 /* Enable interrupts on the HBA. */
505 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
506 dd->mmio + HOST_CTL);
507 return rv;
508 }
509
510 /*
511 * Helper function for tag logging
512 */
513 static void print_tags(struct driver_data *dd,
514 char *msg,
515 unsigned long *tagbits,
516 int cnt)
517 {
518 unsigned char tagmap[128];
519 int group, tagmap_len = 0;
520
521 memset(tagmap, 0, sizeof(tagmap));
522 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
523 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
524 tagbits[group-1]);
525 dev_warn(&dd->pdev->dev,
526 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
527 }
528
529 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
530 dma_addr_t buffer_dma, unsigned int sectors);
531 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
532 struct smart_attr *attrib);
533
534 static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status)
535 {
536 struct request *req = blk_mq_rq_from_pdu(cmd);
537
538 cmd->status = status;
539 blk_mq_complete_request(req);
540 }
541
542 /*
543 * Handle an error.
544 *
545 * @dd Pointer to the DRIVER_DATA structure.
546 *
547 * return value
548 * None
549 */
550 static void mtip_handle_tfe(struct driver_data *dd)
551 {
552 int group, tag, bit, reissue, rv;
553 struct mtip_port *port;
554 struct mtip_cmd *cmd;
555 u32 completed;
556 struct host_to_dev_fis *fis;
557 unsigned long tagaccum[SLOTBITS_IN_LONGS];
558 unsigned int cmd_cnt = 0;
559 unsigned char *buf;
560 char *fail_reason = NULL;
561 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
562
563 dev_warn(&dd->pdev->dev, "Taskfile error\n");
564
565 port = dd->port;
566
567 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
568 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
569 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
570 mtip_complete_command(cmd, BLK_STS_IOERR);
571 return;
572 }
573
574 /* clear the tag accumulator */
575 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
576
577 /* Loop through all the groups */
578 for (group = 0; group < dd->slot_groups; group++) {
579 completed = readl(port->completed[group]);
580
581 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
582
583 /* clear completed status register in the hardware.*/
584 writel(completed, port->completed[group]);
585
586 /* Process successfully completed commands */
587 for (bit = 0; bit < 32 && completed; bit++) {
588 if (!(completed & (1<<bit)))
589 continue;
590 tag = (group << 5) + bit;
591
592 /* Skip the internal command slot */
593 if (tag == MTIP_TAG_INTERNAL)
594 continue;
595
596 cmd = mtip_cmd_from_tag(dd, tag);
597 mtip_complete_command(cmd, 0);
598 set_bit(tag, tagaccum);
599 cmd_cnt++;
600 }
601 }
602
603 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
604
605 /* Restart the port */
606 mdelay(20);
607 mtip_restart_port(port);
608
609 /* Trying to determine the cause of the error */
610 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
611 dd->port->log_buf,
612 dd->port->log_buf_dma, 1);
613 if (rv) {
614 dev_warn(&dd->pdev->dev,
615 "Error in READ LOG EXT (10h) command\n");
616 /* non-critical error, don't fail the load */
617 } else {
618 buf = (unsigned char *)dd->port->log_buf;
619 if (buf[259] & 0x1) {
620 dev_info(&dd->pdev->dev,
621 "Write protect bit is set.\n");
622 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
623 fail_all_ncq_write = 1;
624 fail_reason = "write protect";
625 }
626 if (buf[288] == 0xF7) {
627 dev_info(&dd->pdev->dev,
628 "Exceeded Tmax, drive in thermal shutdown.\n");
629 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
630 fail_all_ncq_cmds = 1;
631 fail_reason = "thermal shutdown";
632 }
633 if (buf[288] == 0xBF) {
634 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
635 dev_info(&dd->pdev->dev,
636 "Drive indicates rebuild has failed. Secure erase required.\n");
637 fail_all_ncq_cmds = 1;
638 fail_reason = "rebuild failed";
639 }
640 }
641
642 /* clear the tag accumulator */
643 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
644
645 /* Loop through all the groups */
646 for (group = 0; group < dd->slot_groups; group++) {
647 for (bit = 0; bit < 32; bit++) {
648 reissue = 1;
649 tag = (group << 5) + bit;
650 cmd = mtip_cmd_from_tag(dd, tag);
651
652 fis = (struct host_to_dev_fis *)cmd->command;
653
654 /* Should re-issue? */
655 if (tag == MTIP_TAG_INTERNAL ||
656 fis->command == ATA_CMD_SET_FEATURES)
657 reissue = 0;
658 else {
659 if (fail_all_ncq_cmds ||
660 (fail_all_ncq_write &&
661 fis->command == ATA_CMD_FPDMA_WRITE)) {
662 dev_warn(&dd->pdev->dev,
663 " Fail: %s w/tag %d [%s].\n",
664 fis->command == ATA_CMD_FPDMA_WRITE ?
665 "write" : "read",
666 tag,
667 fail_reason != NULL ?
668 fail_reason : "unknown");
669 mtip_complete_command(cmd, BLK_STS_MEDIUM);
670 continue;
671 }
672 }
673
674 /*
675 * First check if this command has
676 * exceeded its retries.
677 */
678 if (reissue && (cmd->retries-- > 0)) {
679
680 set_bit(tag, tagaccum);
681
682 /* Re-issue the command. */
683 mtip_issue_ncq_command(port, tag);
684
685 continue;
686 }
687
688 /* Retire a command that will not be reissued */
689 dev_warn(&port->dd->pdev->dev,
690 "retiring tag %d\n", tag);
691
692 mtip_complete_command(cmd, BLK_STS_IOERR);
693 }
694 }
695 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
696 }
697
698 /*
699 * Handle a set device bits interrupt
700 */
701 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
702 u32 completed)
703 {
704 struct driver_data *dd = port->dd;
705 int tag, bit;
706 struct mtip_cmd *command;
707
708 if (!completed) {
709 WARN_ON_ONCE(!completed);
710 return;
711 }
712 /* clear completed status register in the hardware.*/
713 writel(completed, port->completed[group]);
714
715 /* Process completed commands. */
716 for (bit = 0; (bit < 32) && completed; bit++) {
717 if (completed & 0x01) {
718 tag = (group << 5) | bit;
719
720 /* skip internal command slot. */
721 if (unlikely(tag == MTIP_TAG_INTERNAL))
722 continue;
723
724 command = mtip_cmd_from_tag(dd, tag);
725 mtip_complete_command(command, 0);
726 }
727 completed >>= 1;
728 }
729
730 /* If last, re-enable interrupts */
731 if (atomic_dec_return(&dd->irq_workers_active) == 0)
732 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
733 }
734
735 /*
736 * Process legacy pio and d2h interrupts
737 */
738 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
739 {
740 struct mtip_port *port = dd->port;
741 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
742
743 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) {
744 int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL);
745 int status = readl(port->cmd_issue[group]);
746
747 if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))))
748 mtip_complete_command(cmd, 0);
749 }
750 }
751
752 /*
753 * Demux and handle errors
754 */
755 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
756 {
757 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
758 dev_warn(&dd->pdev->dev,
759 "Clearing PxSERR.DIAG.x\n");
760 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
761 }
762
763 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
764 dev_warn(&dd->pdev->dev,
765 "Clearing PxSERR.DIAG.n\n");
766 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
767 }
768
769 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
770 dev_warn(&dd->pdev->dev,
771 "Port stat errors %x unhandled\n",
772 (port_stat & ~PORT_IRQ_HANDLED));
773 if (mtip_check_surprise_removal(dd->pdev))
774 return;
775 }
776 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
777 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
778 wake_up_interruptible(&dd->port->svc_wait);
779 }
780 }
781
782 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
783 {
784 struct driver_data *dd = (struct driver_data *) data;
785 struct mtip_port *port = dd->port;
786 u32 hba_stat, port_stat;
787 int rv = IRQ_NONE;
788 int do_irq_enable = 1, i, workers;
789 struct mtip_work *twork;
790
791 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
792 if (hba_stat) {
793 rv = IRQ_HANDLED;
794
795 /* Acknowledge the interrupt status on the port.*/
796 port_stat = readl(port->mmio + PORT_IRQ_STAT);
797 if (unlikely(port_stat == 0xFFFFFFFF)) {
798 mtip_check_surprise_removal(dd->pdev);
799 return IRQ_HANDLED;
800 }
801 writel(port_stat, port->mmio + PORT_IRQ_STAT);
802
803 /* Demux port status */
804 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
805 do_irq_enable = 0;
806 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
807
808 /* Start at 1: group zero is always local? */
809 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
810 i++) {
811 twork = &dd->work[i];
812 twork->completed = readl(port->completed[i]);
813 if (twork->completed)
814 workers++;
815 }
816
817 atomic_set(&dd->irq_workers_active, workers);
818 if (workers) {
819 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
820 twork = &dd->work[i];
821 if (twork->completed)
822 queue_work_on(
823 twork->cpu_binding,
824 dd->isr_workq,
825 &twork->work);
826 }
827
828 if (likely(dd->work[0].completed))
829 mtip_workq_sdbfx(port, 0,
830 dd->work[0].completed);
831
832 } else {
833 /*
834 * Chip quirk: SDB interrupt but nothing
835 * to complete
836 */
837 do_irq_enable = 1;
838 }
839 }
840
841 if (unlikely(port_stat & PORT_IRQ_ERR)) {
842 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
843 /* don't proceed further */
844 return IRQ_HANDLED;
845 }
846 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
847 &dd->dd_flag))
848 return rv;
849
850 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
851 }
852
853 if (unlikely(port_stat & PORT_IRQ_LEGACY))
854 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
855 }
856
857 /* acknowledge interrupt */
858 if (unlikely(do_irq_enable))
859 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
860
861 return rv;
862 }
863
864 /*
865 * HBA interrupt subroutine.
866 *
867 * @irq IRQ number.
868 * @instance Pointer to the driver data structure.
869 *
870 * return value
871 * IRQ_HANDLED A HBA interrupt was pending and handled.
872 * IRQ_NONE This interrupt was not for the HBA.
873 */
874 static irqreturn_t mtip_irq_handler(int irq, void *instance)
875 {
876 struct driver_data *dd = instance;
877
878 return mtip_handle_irq(dd);
879 }
880
881 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
882 {
883 writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
884 }
885
886 static bool mtip_pause_ncq(struct mtip_port *port,
887 struct host_to_dev_fis *fis)
888 {
889 unsigned long task_file_data;
890
891 task_file_data = readl(port->mmio+PORT_TFDATA);
892 if ((task_file_data & 1))
893 return false;
894
895 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
896 port->ic_pause_timer = jiffies;
897 return true;
898 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
899 (fis->features == 0x03)) {
900 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
901 port->ic_pause_timer = jiffies;
902 return true;
903 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
904 ((fis->command == 0xFC) &&
905 (fis->features == 0x27 || fis->features == 0x72 ||
906 fis->features == 0x62 || fis->features == 0x26))) {
907 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
908 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
909 /* Com reset after secure erase or lowlevel format */
910 mtip_restart_port(port);
911 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
912 return false;
913 }
914
915 return false;
916 }
917
918 static bool mtip_commands_active(struct mtip_port *port)
919 {
920 unsigned int active;
921 unsigned int n;
922
923 /*
924 * Ignore s_active bit 0 of array element 0.
925 * This bit will always be set
926 */
927 active = readl(port->s_active[0]) & 0xFFFFFFFE;
928 for (n = 1; n < port->dd->slot_groups; n++)
929 active |= readl(port->s_active[n]);
930
931 return active != 0;
932 }
933
934 /*
935 * Wait for port to quiesce
936 *
937 * @port Pointer to port data structure
938 * @timeout Max duration to wait (ms)
939 *
940 * return value
941 * 0 Success
942 * -EBUSY Commands still active
943 */
944 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
945 {
946 unsigned long to;
947 bool active = true;
948
949 blk_mq_quiesce_queue(port->dd->queue);
950
951 to = jiffies + msecs_to_jiffies(timeout);
952 do {
953 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
954 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
955 msleep(20);
956 continue; /* svc thd is actively issuing commands */
957 }
958
959 msleep(100);
960
961 if (mtip_check_surprise_removal(port->dd->pdev))
962 goto err_fault;
963
964 active = mtip_commands_active(port);
965 if (!active)
966 break;
967 } while (time_before(jiffies, to));
968
969 blk_mq_unquiesce_queue(port->dd->queue);
970 return active ? -EBUSY : 0;
971 err_fault:
972 blk_mq_unquiesce_queue(port->dd->queue);
973 return -EFAULT;
974 }
975
976 struct mtip_int_cmd {
977 int fis_len;
978 dma_addr_t buffer;
979 int buf_len;
980 u32 opts;
981 };
982
983 /*
984 * Execute an internal command and wait for the completion.
985 *
986 * @port Pointer to the port data structure.
987 * @fis Pointer to the FIS that describes the command.
988 * @fis_len Length in WORDS of the FIS.
989 * @buffer DMA accessible for command data.
990 * @buf_len Length, in bytes, of the data buffer.
991 * @opts Command header options, excluding the FIS length
992 * and the number of PRD entries.
993 * @timeout Time in ms to wait for the command to complete.
994 *
995 * return value
996 * 0 Command completed successfully.
997 * -EFAULT The buffer address is not correctly aligned.
998 * -EBUSY Internal command or other IO in progress.
999 * -EAGAIN Time out waiting for command to complete.
1000 */
1001 static int mtip_exec_internal_command(struct mtip_port *port,
1002 struct host_to_dev_fis *fis,
1003 int fis_len,
1004 dma_addr_t buffer,
1005 int buf_len,
1006 u32 opts,
1007 unsigned long timeout)
1008 {
1009 struct mtip_cmd *int_cmd;
1010 struct driver_data *dd = port->dd;
1011 struct request *rq;
1012 struct mtip_int_cmd icmd = {
1013 .fis_len = fis_len,
1014 .buffer = buffer,
1015 .buf_len = buf_len,
1016 .opts = opts
1017 };
1018 int rv = 0;
1019
1020 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1021 if (buffer & 0x00000007) {
1022 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1023 return -EFAULT;
1024 }
1025
1026 int_cmd = mtip_get_int_command(dd);
1027 if (!int_cmd) {
1028 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
1029 return -EFAULT;
1030 }
1031 rq = blk_mq_rq_from_pdu(int_cmd);
1032 rq->special = &icmd;
1033
1034 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1035
1036 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1037 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1038
1039 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1040
1041 if (fis->command != ATA_CMD_STANDBYNOW1) {
1042 /* wait for io to complete if non atomic */
1043 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1044 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
1045 blk_mq_free_request(rq);
1046 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1047 wake_up_interruptible(&port->svc_wait);
1048 return -EBUSY;
1049 }
1050 }
1051
1052 /* Copy the command to the command table */
1053 memcpy(int_cmd->command, fis, fis_len*4);
1054
1055 rq->timeout = timeout;
1056
1057 /* insert request and run queue */
1058 blk_execute_rq(rq->q, NULL, rq, true);
1059
1060 if (int_cmd->status) {
1061 dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n",
1062 fis->command, int_cmd->status);
1063 rv = -EIO;
1064
1065 if (mtip_check_surprise_removal(dd->pdev) ||
1066 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1067 &dd->dd_flag)) {
1068 dev_err(&dd->pdev->dev,
1069 "Internal command [%02X] wait returned due to SR\n",
1070 fis->command);
1071 rv = -ENXIO;
1072 goto exec_ic_exit;
1073 }
1074 mtip_device_reset(dd); /* recover from timeout issue */
1075 rv = -EAGAIN;
1076 goto exec_ic_exit;
1077 }
1078
1079 if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
1080 & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) {
1081 rv = -ENXIO;
1082 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1083 mtip_device_reset(dd);
1084 rv = -EAGAIN;
1085 }
1086 }
1087 exec_ic_exit:
1088 /* Clear the allocated and active bits for the internal command. */
1089 blk_mq_free_request(rq);
1090 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1091 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1092 /* NCQ paused */
1093 return rv;
1094 }
1095 wake_up_interruptible(&port->svc_wait);
1096
1097 return rv;
1098 }
1099
1100 /*
1101 * Byte-swap ATA ID strings.
1102 *
1103 * ATA identify data contains strings in byte-swapped 16-bit words.
1104 * They must be swapped (on all architectures) to be usable as C strings.
1105 * This function swaps bytes in-place.
1106 *
1107 * @buf The buffer location of the string
1108 * @len The number of bytes to swap
1109 *
1110 * return value
1111 * None
1112 */
1113 static inline void ata_swap_string(u16 *buf, unsigned int len)
1114 {
1115 int i;
1116 for (i = 0; i < (len/2); i++)
1117 be16_to_cpus(&buf[i]);
1118 }
1119
1120 static void mtip_set_timeout(struct driver_data *dd,
1121 struct host_to_dev_fis *fis,
1122 unsigned int *timeout, u8 erasemode)
1123 {
1124 switch (fis->command) {
1125 case ATA_CMD_DOWNLOAD_MICRO:
1126 *timeout = 120000; /* 2 minutes */
1127 break;
1128 case ATA_CMD_SEC_ERASE_UNIT:
1129 case 0xFC:
1130 if (erasemode)
1131 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1132 else
1133 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1134 break;
1135 case ATA_CMD_STANDBYNOW1:
1136 *timeout = 120000; /* 2 minutes */
1137 break;
1138 case 0xF7:
1139 case 0xFA:
1140 *timeout = 60000; /* 60 seconds */
1141 break;
1142 case ATA_CMD_SMART:
1143 *timeout = 15000; /* 15 seconds */
1144 break;
1145 default:
1146 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1147 break;
1148 }
1149 }
1150
1151 /*
1152 * Request the device identity information.
1153 *
1154 * If a user space buffer is not specified, i.e. is NULL, the
1155 * identify information is still read from the drive and placed
1156 * into the identify data buffer (@e port->identify) in the
1157 * port data structure.
1158 * When the identify buffer contains valid identify information @e
1159 * port->identify_valid is non-zero.
1160 *
1161 * @port Pointer to the port structure.
1162 * @user_buffer A user space buffer where the identify data should be
1163 * copied.
1164 *
1165 * return value
1166 * 0 Command completed successfully.
1167 * -EFAULT An error occurred while coping data to the user buffer.
1168 * -1 Command failed.
1169 */
1170 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1171 {
1172 int rv = 0;
1173 struct host_to_dev_fis fis;
1174
1175 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1176 return -EFAULT;
1177
1178 /* Build the FIS. */
1179 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1180 fis.type = 0x27;
1181 fis.opts = 1 << 7;
1182 fis.command = ATA_CMD_ID_ATA;
1183
1184 /* Set the identify information as invalid. */
1185 port->identify_valid = 0;
1186
1187 /* Clear the identify information. */
1188 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1189
1190 /* Execute the command. */
1191 if (mtip_exec_internal_command(port,
1192 &fis,
1193 5,
1194 port->identify_dma,
1195 sizeof(u16) * ATA_ID_WORDS,
1196 0,
1197 MTIP_INT_CMD_TIMEOUT_MS)
1198 < 0) {
1199 rv = -1;
1200 goto out;
1201 }
1202
1203 /*
1204 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1205 * perform field-sensitive swapping on the string fields.
1206 * See the kernel use of ata_id_string() for proof of this.
1207 */
1208 #ifdef __LITTLE_ENDIAN
1209 ata_swap_string(port->identify + 27, 40); /* model string*/
1210 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1211 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1212 #else
1213 {
1214 int i;
1215 for (i = 0; i < ATA_ID_WORDS; i++)
1216 port->identify[i] = le16_to_cpu(port->identify[i]);
1217 }
1218 #endif
1219
1220 /* Check security locked state */
1221 if (port->identify[128] & 0x4)
1222 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1223 else
1224 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1225
1226 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1227 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1228 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1229 port->dd->trim_supp = true;
1230 else
1231 #endif
1232 port->dd->trim_supp = false;
1233
1234 /* Set the identify buffer as valid. */
1235 port->identify_valid = 1;
1236
1237 if (user_buffer) {
1238 if (copy_to_user(
1239 user_buffer,
1240 port->identify,
1241 ATA_ID_WORDS * sizeof(u16))) {
1242 rv = -EFAULT;
1243 goto out;
1244 }
1245 }
1246
1247 out:
1248 return rv;
1249 }
1250
1251 /*
1252 * Issue a standby immediate command to the device.
1253 *
1254 * @port Pointer to the port structure.
1255 *
1256 * return value
1257 * 0 Command was executed successfully.
1258 * -1 An error occurred while executing the command.
1259 */
1260 static int mtip_standby_immediate(struct mtip_port *port)
1261 {
1262 int rv;
1263 struct host_to_dev_fis fis;
1264 unsigned long start;
1265 unsigned int timeout;
1266
1267 /* Build the FIS. */
1268 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1269 fis.type = 0x27;
1270 fis.opts = 1 << 7;
1271 fis.command = ATA_CMD_STANDBYNOW1;
1272
1273 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1274
1275 start = jiffies;
1276 rv = mtip_exec_internal_command(port,
1277 &fis,
1278 5,
1279 0,
1280 0,
1281 0,
1282 timeout);
1283 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1284 jiffies_to_msecs(jiffies - start));
1285 if (rv)
1286 dev_warn(&port->dd->pdev->dev,
1287 "STANDBY IMMEDIATE command failed.\n");
1288
1289 return rv;
1290 }
1291
1292 /*
1293 * Issue a READ LOG EXT command to the device.
1294 *
1295 * @port pointer to the port structure.
1296 * @page page number to fetch
1297 * @buffer pointer to buffer
1298 * @buffer_dma dma address corresponding to @buffer
1299 * @sectors page length to fetch, in sectors
1300 *
1301 * return value
1302 * @rv return value from mtip_exec_internal_command()
1303 */
1304 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1305 dma_addr_t buffer_dma, unsigned int sectors)
1306 {
1307 struct host_to_dev_fis fis;
1308
1309 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1310 fis.type = 0x27;
1311 fis.opts = 1 << 7;
1312 fis.command = ATA_CMD_READ_LOG_EXT;
1313 fis.sect_count = sectors & 0xFF;
1314 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1315 fis.lba_low = page;
1316 fis.lba_mid = 0;
1317 fis.device = ATA_DEVICE_OBS;
1318
1319 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1320
1321 return mtip_exec_internal_command(port,
1322 &fis,
1323 5,
1324 buffer_dma,
1325 sectors * ATA_SECT_SIZE,
1326 0,
1327 MTIP_INT_CMD_TIMEOUT_MS);
1328 }
1329
1330 /*
1331 * Issue a SMART READ DATA command to the device.
1332 *
1333 * @port pointer to the port structure.
1334 * @buffer pointer to buffer
1335 * @buffer_dma dma address corresponding to @buffer
1336 *
1337 * return value
1338 * @rv return value from mtip_exec_internal_command()
1339 */
1340 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1341 dma_addr_t buffer_dma)
1342 {
1343 struct host_to_dev_fis fis;
1344
1345 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1346 fis.type = 0x27;
1347 fis.opts = 1 << 7;
1348 fis.command = ATA_CMD_SMART;
1349 fis.features = 0xD0;
1350 fis.sect_count = 1;
1351 fis.lba_mid = 0x4F;
1352 fis.lba_hi = 0xC2;
1353 fis.device = ATA_DEVICE_OBS;
1354
1355 return mtip_exec_internal_command(port,
1356 &fis,
1357 5,
1358 buffer_dma,
1359 ATA_SECT_SIZE,
1360 0,
1361 15000);
1362 }
1363
1364 /*
1365 * Get the value of a smart attribute
1366 *
1367 * @port pointer to the port structure
1368 * @id attribute number
1369 * @attrib pointer to return attrib information corresponding to @id
1370 *
1371 * return value
1372 * -EINVAL NULL buffer passed or unsupported attribute @id.
1373 * -EPERM Identify data not valid, SMART not supported or not enabled
1374 */
1375 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1376 struct smart_attr *attrib)
1377 {
1378 int rv, i;
1379 struct smart_attr *pattr;
1380
1381 if (!attrib)
1382 return -EINVAL;
1383
1384 if (!port->identify_valid) {
1385 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1386 return -EPERM;
1387 }
1388 if (!(port->identify[82] & 0x1)) {
1389 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1390 return -EPERM;
1391 }
1392 if (!(port->identify[85] & 0x1)) {
1393 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1394 return -EPERM;
1395 }
1396
1397 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1398 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1399 if (rv) {
1400 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1401 return rv;
1402 }
1403
1404 pattr = (struct smart_attr *)(port->smart_buf + 2);
1405 for (i = 0; i < 29; i++, pattr++)
1406 if (pattr->attr_id == id) {
1407 memcpy(attrib, pattr, sizeof(struct smart_attr));
1408 break;
1409 }
1410
1411 if (i == 29) {
1412 dev_warn(&port->dd->pdev->dev,
1413 "Query for invalid SMART attribute ID\n");
1414 rv = -EINVAL;
1415 }
1416
1417 return rv;
1418 }
1419
1420 /*
1421 * Trim unused sectors
1422 *
1423 * @dd pointer to driver_data structure
1424 * @lba starting lba
1425 * @len # of 512b sectors to trim
1426 *
1427 * return value
1428 * -ENOMEM Out of dma memory
1429 * -EINVAL Invalid parameters passed in, trim not supported
1430 * -EIO Error submitting trim request to hw
1431 */
1432 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1433 unsigned int len)
1434 {
1435 int i, rv = 0;
1436 u64 tlba, tlen, sect_left;
1437 struct mtip_trim_entry *buf;
1438 dma_addr_t dma_addr;
1439 struct host_to_dev_fis fis;
1440
1441 if (!len || dd->trim_supp == false)
1442 return -EINVAL;
1443
1444 /* Trim request too big */
1445 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1446
1447 /* Trim request not aligned on 4k boundary */
1448 WARN_ON(len % 8 != 0);
1449
1450 /* Warn if vu_trim structure is too big */
1451 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1452
1453 /* Allocate a DMA buffer for the trim structure */
1454 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1455 GFP_KERNEL);
1456 if (!buf)
1457 return -ENOMEM;
1458 memset(buf, 0, ATA_SECT_SIZE);
1459
1460 for (i = 0, sect_left = len, tlba = lba;
1461 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1462 i++) {
1463 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1464 MTIP_MAX_TRIM_ENTRY_LEN :
1465 sect_left);
1466 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1467 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1468 tlba += tlen;
1469 sect_left -= tlen;
1470 }
1471 WARN_ON(sect_left != 0);
1472
1473 /* Build the fis */
1474 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1475 fis.type = 0x27;
1476 fis.opts = 1 << 7;
1477 fis.command = 0xfb;
1478 fis.features = 0x60;
1479 fis.sect_count = 1;
1480 fis.device = ATA_DEVICE_OBS;
1481
1482 if (mtip_exec_internal_command(dd->port,
1483 &fis,
1484 5,
1485 dma_addr,
1486 ATA_SECT_SIZE,
1487 0,
1488 MTIP_TRIM_TIMEOUT_MS) < 0)
1489 rv = -EIO;
1490
1491 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1492 return rv;
1493 }
1494
1495 /*
1496 * Get the drive capacity.
1497 *
1498 * @dd Pointer to the device data structure.
1499 * @sectors Pointer to the variable that will receive the sector count.
1500 *
1501 * return value
1502 * 1 Capacity was returned successfully.
1503 * 0 The identify information is invalid.
1504 */
1505 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1506 {
1507 struct mtip_port *port = dd->port;
1508 u64 total, raw0, raw1, raw2, raw3;
1509 raw0 = port->identify[100];
1510 raw1 = port->identify[101];
1511 raw2 = port->identify[102];
1512 raw3 = port->identify[103];
1513 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1514 *sectors = total;
1515 return (bool) !!port->identify_valid;
1516 }
1517
1518 /*
1519 * Display the identify command data.
1520 *
1521 * @port Pointer to the port data structure.
1522 *
1523 * return value
1524 * None
1525 */
1526 static void mtip_dump_identify(struct mtip_port *port)
1527 {
1528 sector_t sectors;
1529 unsigned short revid;
1530 char cbuf[42];
1531
1532 if (!port->identify_valid)
1533 return;
1534
1535 strlcpy(cbuf, (char *)(port->identify+10), 21);
1536 dev_info(&port->dd->pdev->dev,
1537 "Serial No.: %s\n", cbuf);
1538
1539 strlcpy(cbuf, (char *)(port->identify+23), 9);
1540 dev_info(&port->dd->pdev->dev,
1541 "Firmware Ver.: %s\n", cbuf);
1542
1543 strlcpy(cbuf, (char *)(port->identify+27), 41);
1544 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1545
1546 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1547 port->identify[128],
1548 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1549
1550 if (mtip_hw_get_capacity(port->dd, &sectors))
1551 dev_info(&port->dd->pdev->dev,
1552 "Capacity: %llu sectors (%llu MB)\n",
1553 (u64)sectors,
1554 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1555
1556 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1557 switch (revid & 0xFF) {
1558 case 0x1:
1559 strlcpy(cbuf, "A0", 3);
1560 break;
1561 case 0x3:
1562 strlcpy(cbuf, "A2", 3);
1563 break;
1564 default:
1565 strlcpy(cbuf, "?", 2);
1566 break;
1567 }
1568 dev_info(&port->dd->pdev->dev,
1569 "Card Type: %s\n", cbuf);
1570 }
1571
1572 /*
1573 * Map the commands scatter list into the command table.
1574 *
1575 * @command Pointer to the command.
1576 * @nents Number of scatter list entries.
1577 *
1578 * return value
1579 * None
1580 */
1581 static inline void fill_command_sg(struct driver_data *dd,
1582 struct mtip_cmd *command,
1583 int nents)
1584 {
1585 int n;
1586 unsigned int dma_len;
1587 struct mtip_cmd_sg *command_sg;
1588 struct scatterlist *sg = command->sg;
1589
1590 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1591
1592 for (n = 0; n < nents; n++) {
1593 dma_len = sg_dma_len(sg);
1594 if (dma_len > 0x400000)
1595 dev_err(&dd->pdev->dev,
1596 "DMA segment length truncated\n");
1597 command_sg->info = __force_bit2int
1598 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1599 command_sg->dba = __force_bit2int
1600 cpu_to_le32(sg_dma_address(sg));
1601 command_sg->dba_upper = __force_bit2int
1602 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1603 command_sg++;
1604 sg++;
1605 }
1606 }
1607
1608 /*
1609 * @brief Execute a drive command.
1610 *
1611 * return value 0 The command completed successfully.
1612 * return value -1 An error occurred while executing the command.
1613 */
1614 static int exec_drive_task(struct mtip_port *port, u8 *command)
1615 {
1616 struct host_to_dev_fis fis;
1617 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1618 unsigned int to;
1619
1620 /* Build the FIS. */
1621 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1622 fis.type = 0x27;
1623 fis.opts = 1 << 7;
1624 fis.command = command[0];
1625 fis.features = command[1];
1626 fis.sect_count = command[2];
1627 fis.sector = command[3];
1628 fis.cyl_low = command[4];
1629 fis.cyl_hi = command[5];
1630 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1631
1632 mtip_set_timeout(port->dd, &fis, &to, 0);
1633
1634 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1635 __func__,
1636 command[0],
1637 command[1],
1638 command[2],
1639 command[3],
1640 command[4],
1641 command[5],
1642 command[6]);
1643
1644 /* Execute the command. */
1645 if (mtip_exec_internal_command(port,
1646 &fis,
1647 5,
1648 0,
1649 0,
1650 0,
1651 to) < 0) {
1652 return -1;
1653 }
1654
1655 command[0] = reply->command; /* Status*/
1656 command[1] = reply->features; /* Error*/
1657 command[4] = reply->cyl_low;
1658 command[5] = reply->cyl_hi;
1659
1660 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1661 __func__,
1662 command[0],
1663 command[1],
1664 command[4],
1665 command[5]);
1666
1667 return 0;
1668 }
1669
1670 /*
1671 * @brief Execute a drive command.
1672 *
1673 * @param port Pointer to the port data structure.
1674 * @param command Pointer to the user specified command parameters.
1675 * @param user_buffer Pointer to the user space buffer where read sector
1676 * data should be copied.
1677 *
1678 * return value 0 The command completed successfully.
1679 * return value -EFAULT An error occurred while copying the completion
1680 * data to the user space buffer.
1681 * return value -1 An error occurred while executing the command.
1682 */
1683 static int exec_drive_command(struct mtip_port *port, u8 *command,
1684 void __user *user_buffer)
1685 {
1686 struct host_to_dev_fis fis;
1687 struct host_to_dev_fis *reply;
1688 u8 *buf = NULL;
1689 dma_addr_t dma_addr = 0;
1690 int rv = 0, xfer_sz = command[3];
1691 unsigned int to;
1692
1693 if (xfer_sz) {
1694 if (!user_buffer)
1695 return -EFAULT;
1696
1697 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1698 ATA_SECT_SIZE * xfer_sz,
1699 &dma_addr,
1700 GFP_KERNEL);
1701 if (!buf) {
1702 dev_err(&port->dd->pdev->dev,
1703 "Memory allocation failed (%d bytes)\n",
1704 ATA_SECT_SIZE * xfer_sz);
1705 return -ENOMEM;
1706 }
1707 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1708 }
1709
1710 /* Build the FIS. */
1711 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1712 fis.type = 0x27;
1713 fis.opts = 1 << 7;
1714 fis.command = command[0];
1715 fis.features = command[2];
1716 fis.sect_count = command[3];
1717 if (fis.command == ATA_CMD_SMART) {
1718 fis.sector = command[1];
1719 fis.cyl_low = 0x4F;
1720 fis.cyl_hi = 0xC2;
1721 }
1722
1723 mtip_set_timeout(port->dd, &fis, &to, 0);
1724
1725 if (xfer_sz)
1726 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1727 else
1728 reply = (port->rxfis + RX_FIS_D2H_REG);
1729
1730 dbg_printk(MTIP_DRV_NAME
1731 " %s: User Command: cmd %x, sect %x, "
1732 "feat %x, sectcnt %x\n",
1733 __func__,
1734 command[0],
1735 command[1],
1736 command[2],
1737 command[3]);
1738
1739 /* Execute the command. */
1740 if (mtip_exec_internal_command(port,
1741 &fis,
1742 5,
1743 (xfer_sz ? dma_addr : 0),
1744 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1745 0,
1746 to)
1747 < 0) {
1748 rv = -EFAULT;
1749 goto exit_drive_command;
1750 }
1751
1752 /* Collect the completion status. */
1753 command[0] = reply->command; /* Status*/
1754 command[1] = reply->features; /* Error*/
1755 command[2] = reply->sect_count;
1756
1757 dbg_printk(MTIP_DRV_NAME
1758 " %s: Completion Status: stat %x, "
1759 "err %x, nsect %x\n",
1760 __func__,
1761 command[0],
1762 command[1],
1763 command[2]);
1764
1765 if (xfer_sz) {
1766 if (copy_to_user(user_buffer,
1767 buf,
1768 ATA_SECT_SIZE * command[3])) {
1769 rv = -EFAULT;
1770 goto exit_drive_command;
1771 }
1772 }
1773 exit_drive_command:
1774 if (buf)
1775 dmam_free_coherent(&port->dd->pdev->dev,
1776 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1777 return rv;
1778 }
1779
1780 /*
1781 * Indicates whether a command has a single sector payload.
1782 *
1783 * @command passed to the device to perform the certain event.
1784 * @features passed to the device to perform the certain event.
1785 *
1786 * return value
1787 * 1 command is one that always has a single sector payload,
1788 * regardless of the value in the Sector Count field.
1789 * 0 otherwise
1790 *
1791 */
1792 static unsigned int implicit_sector(unsigned char command,
1793 unsigned char features)
1794 {
1795 unsigned int rv = 0;
1796
1797 /* list of commands that have an implicit sector count of 1 */
1798 switch (command) {
1799 case ATA_CMD_SEC_SET_PASS:
1800 case ATA_CMD_SEC_UNLOCK:
1801 case ATA_CMD_SEC_ERASE_PREP:
1802 case ATA_CMD_SEC_ERASE_UNIT:
1803 case ATA_CMD_SEC_FREEZE_LOCK:
1804 case ATA_CMD_SEC_DISABLE_PASS:
1805 case ATA_CMD_PMP_READ:
1806 case ATA_CMD_PMP_WRITE:
1807 rv = 1;
1808 break;
1809 case ATA_CMD_SET_MAX:
1810 if (features == ATA_SET_MAX_UNLOCK)
1811 rv = 1;
1812 break;
1813 case ATA_CMD_SMART:
1814 if ((features == ATA_SMART_READ_VALUES) ||
1815 (features == ATA_SMART_READ_THRESHOLDS))
1816 rv = 1;
1817 break;
1818 case ATA_CMD_CONF_OVERLAY:
1819 if ((features == ATA_DCO_IDENTIFY) ||
1820 (features == ATA_DCO_SET))
1821 rv = 1;
1822 break;
1823 }
1824 return rv;
1825 }
1826
1827 /*
1828 * Executes a taskfile
1829 * See ide_taskfile_ioctl() for derivation
1830 */
1831 static int exec_drive_taskfile(struct driver_data *dd,
1832 void __user *buf,
1833 ide_task_request_t *req_task,
1834 int outtotal)
1835 {
1836 struct host_to_dev_fis fis;
1837 struct host_to_dev_fis *reply;
1838 u8 *outbuf = NULL;
1839 u8 *inbuf = NULL;
1840 dma_addr_t outbuf_dma = 0;
1841 dma_addr_t inbuf_dma = 0;
1842 dma_addr_t dma_buffer = 0;
1843 int err = 0;
1844 unsigned int taskin = 0;
1845 unsigned int taskout = 0;
1846 u8 nsect = 0;
1847 unsigned int timeout;
1848 unsigned int force_single_sector;
1849 unsigned int transfer_size;
1850 unsigned long task_file_data;
1851 int intotal = outtotal + req_task->out_size;
1852 int erasemode = 0;
1853
1854 taskout = req_task->out_size;
1855 taskin = req_task->in_size;
1856 /* 130560 = 512 * 0xFF*/
1857 if (taskin > 130560 || taskout > 130560)
1858 return -EINVAL;
1859
1860 if (taskout) {
1861 outbuf = memdup_user(buf + outtotal, taskout);
1862 if (IS_ERR(outbuf))
1863 return PTR_ERR(outbuf);
1864
1865 outbuf_dma = dma_map_single(&dd->pdev->dev, outbuf,
1866 taskout, DMA_TO_DEVICE);
1867 if (dma_mapping_error(&dd->pdev->dev, outbuf_dma)) {
1868 err = -ENOMEM;
1869 goto abort;
1870 }
1871 dma_buffer = outbuf_dma;
1872 }
1873
1874 if (taskin) {
1875 inbuf = memdup_user(buf + intotal, taskin);
1876 if (IS_ERR(inbuf)) {
1877 err = PTR_ERR(inbuf);
1878 inbuf = NULL;
1879 goto abort;
1880 }
1881 inbuf_dma = dma_map_single(&dd->pdev->dev, inbuf,
1882 taskin, DMA_FROM_DEVICE);
1883 if (dma_mapping_error(&dd->pdev->dev, inbuf_dma)) {
1884 err = -ENOMEM;
1885 goto abort;
1886 }
1887 dma_buffer = inbuf_dma;
1888 }
1889
1890 /* only supports PIO and non-data commands from this ioctl. */
1891 switch (req_task->data_phase) {
1892 case TASKFILE_OUT:
1893 nsect = taskout / ATA_SECT_SIZE;
1894 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1895 break;
1896 case TASKFILE_IN:
1897 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1898 break;
1899 case TASKFILE_NO_DATA:
1900 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
1901 break;
1902 default:
1903 err = -EINVAL;
1904 goto abort;
1905 }
1906
1907 /* Build the FIS. */
1908 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1909
1910 fis.type = 0x27;
1911 fis.opts = 1 << 7;
1912 fis.command = req_task->io_ports[7];
1913 fis.features = req_task->io_ports[1];
1914 fis.sect_count = req_task->io_ports[2];
1915 fis.lba_low = req_task->io_ports[3];
1916 fis.lba_mid = req_task->io_ports[4];
1917 fis.lba_hi = req_task->io_ports[5];
1918 /* Clear the dev bit*/
1919 fis.device = req_task->io_ports[6] & ~0x10;
1920
1921 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
1922 req_task->in_flags.all =
1923 IDE_TASKFILE_STD_IN_FLAGS |
1924 (IDE_HOB_STD_IN_FLAGS << 8);
1925 fis.lba_low_ex = req_task->hob_ports[3];
1926 fis.lba_mid_ex = req_task->hob_ports[4];
1927 fis.lba_hi_ex = req_task->hob_ports[5];
1928 fis.features_ex = req_task->hob_ports[1];
1929 fis.sect_cnt_ex = req_task->hob_ports[2];
1930
1931 } else {
1932 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
1933 }
1934
1935 force_single_sector = implicit_sector(fis.command, fis.features);
1936
1937 if ((taskin || taskout) && (!fis.sect_count)) {
1938 if (nsect)
1939 fis.sect_count = nsect;
1940 else {
1941 if (!force_single_sector) {
1942 dev_warn(&dd->pdev->dev,
1943 "data movement but "
1944 "sect_count is 0\n");
1945 err = -EINVAL;
1946 goto abort;
1947 }
1948 }
1949 }
1950
1951 dbg_printk(MTIP_DRV_NAME
1952 " %s: cmd %x, feat %x, nsect %x,"
1953 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
1954 " head/dev %x\n",
1955 __func__,
1956 fis.command,
1957 fis.features,
1958 fis.sect_count,
1959 fis.lba_low,
1960 fis.lba_mid,
1961 fis.lba_hi,
1962 fis.device);
1963
1964 /* check for erase mode support during secure erase.*/
1965 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
1966 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
1967 erasemode = 1;
1968 }
1969
1970 mtip_set_timeout(dd, &fis, &timeout, erasemode);
1971
1972 /* Determine the correct transfer size.*/
1973 if (force_single_sector)
1974 transfer_size = ATA_SECT_SIZE;
1975 else
1976 transfer_size = ATA_SECT_SIZE * fis.sect_count;
1977
1978 /* Execute the command.*/
1979 if (mtip_exec_internal_command(dd->port,
1980 &fis,
1981 5,
1982 dma_buffer,
1983 transfer_size,
1984 0,
1985 timeout) < 0) {
1986 err = -EIO;
1987 goto abort;
1988 }
1989
1990 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
1991
1992 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
1993 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
1994 req_task->io_ports[7] = reply->control;
1995 } else {
1996 reply = dd->port->rxfis + RX_FIS_D2H_REG;
1997 req_task->io_ports[7] = reply->command;
1998 }
1999
2000 /* reclaim the DMA buffers.*/
2001 if (inbuf_dma)
2002 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
2003 DMA_FROM_DEVICE);
2004 if (outbuf_dma)
2005 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
2006 DMA_TO_DEVICE);
2007 inbuf_dma = 0;
2008 outbuf_dma = 0;
2009
2010 /* return the ATA registers to the caller.*/
2011 req_task->io_ports[1] = reply->features;
2012 req_task->io_ports[2] = reply->sect_count;
2013 req_task->io_ports[3] = reply->lba_low;
2014 req_task->io_ports[4] = reply->lba_mid;
2015 req_task->io_ports[5] = reply->lba_hi;
2016 req_task->io_ports[6] = reply->device;
2017
2018 if (req_task->out_flags.all & 1) {
2019
2020 req_task->hob_ports[3] = reply->lba_low_ex;
2021 req_task->hob_ports[4] = reply->lba_mid_ex;
2022 req_task->hob_ports[5] = reply->lba_hi_ex;
2023 req_task->hob_ports[1] = reply->features_ex;
2024 req_task->hob_ports[2] = reply->sect_cnt_ex;
2025 }
2026 dbg_printk(MTIP_DRV_NAME
2027 " %s: Completion: stat %x,"
2028 "err %x, sect_cnt %x, lbalo %x,"
2029 "lbamid %x, lbahi %x, dev %x\n",
2030 __func__,
2031 req_task->io_ports[7],
2032 req_task->io_ports[1],
2033 req_task->io_ports[2],
2034 req_task->io_ports[3],
2035 req_task->io_ports[4],
2036 req_task->io_ports[5],
2037 req_task->io_ports[6]);
2038
2039 if (taskout) {
2040 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2041 err = -EFAULT;
2042 goto abort;
2043 }
2044 }
2045 if (taskin) {
2046 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2047 err = -EFAULT;
2048 goto abort;
2049 }
2050 }
2051 abort:
2052 if (inbuf_dma)
2053 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
2054 DMA_FROM_DEVICE);
2055 if (outbuf_dma)
2056 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
2057 DMA_TO_DEVICE);
2058 kfree(outbuf);
2059 kfree(inbuf);
2060
2061 return err;
2062 }
2063
2064 /*
2065 * Handle IOCTL calls from the Block Layer.
2066 *
2067 * This function is called by the Block Layer when it receives an IOCTL
2068 * command that it does not understand. If the IOCTL command is not supported
2069 * this function returns -ENOTTY.
2070 *
2071 * @dd Pointer to the driver data structure.
2072 * @cmd IOCTL command passed from the Block Layer.
2073 * @arg IOCTL argument passed from the Block Layer.
2074 *
2075 * return value
2076 * 0 The IOCTL completed successfully.
2077 * -ENOTTY The specified command is not supported.
2078 * -EFAULT An error occurred copying data to a user space buffer.
2079 * -EIO An error occurred while executing the command.
2080 */
2081 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2082 unsigned long arg)
2083 {
2084 switch (cmd) {
2085 case HDIO_GET_IDENTITY:
2086 {
2087 if (copy_to_user((void __user *)arg, dd->port->identify,
2088 sizeof(u16) * ATA_ID_WORDS))
2089 return -EFAULT;
2090 break;
2091 }
2092 case HDIO_DRIVE_CMD:
2093 {
2094 u8 drive_command[4];
2095
2096 /* Copy the user command info to our buffer. */
2097 if (copy_from_user(drive_command,
2098 (void __user *) arg,
2099 sizeof(drive_command)))
2100 return -EFAULT;
2101
2102 /* Execute the drive command. */
2103 if (exec_drive_command(dd->port,
2104 drive_command,
2105 (void __user *) (arg+4)))
2106 return -EIO;
2107
2108 /* Copy the status back to the users buffer. */
2109 if (copy_to_user((void __user *) arg,
2110 drive_command,
2111 sizeof(drive_command)))
2112 return -EFAULT;
2113
2114 break;
2115 }
2116 case HDIO_DRIVE_TASK:
2117 {
2118 u8 drive_command[7];
2119
2120 /* Copy the user command info to our buffer. */
2121 if (copy_from_user(drive_command,
2122 (void __user *) arg,
2123 sizeof(drive_command)))
2124 return -EFAULT;
2125
2126 /* Execute the drive command. */
2127 if (exec_drive_task(dd->port, drive_command))
2128 return -EIO;
2129
2130 /* Copy the status back to the users buffer. */
2131 if (copy_to_user((void __user *) arg,
2132 drive_command,
2133 sizeof(drive_command)))
2134 return -EFAULT;
2135
2136 break;
2137 }
2138 case HDIO_DRIVE_TASKFILE: {
2139 ide_task_request_t req_task;
2140 int ret, outtotal;
2141
2142 if (copy_from_user(&req_task, (void __user *) arg,
2143 sizeof(req_task)))
2144 return -EFAULT;
2145
2146 outtotal = sizeof(req_task);
2147
2148 ret = exec_drive_taskfile(dd, (void __user *) arg,
2149 &req_task, outtotal);
2150
2151 if (copy_to_user((void __user *) arg, &req_task,
2152 sizeof(req_task)))
2153 return -EFAULT;
2154
2155 return ret;
2156 }
2157
2158 default:
2159 return -EINVAL;
2160 }
2161 return 0;
2162 }
2163
2164 /*
2165 * Submit an IO to the hw
2166 *
2167 * This function is called by the block layer to issue an io
2168 * to the device. Upon completion, the callback function will
2169 * be called with the data parameter passed as the callback data.
2170 *
2171 * @dd Pointer to the driver data structure.
2172 * @start First sector to read.
2173 * @nsect Number of sectors to read.
2174 * @nents Number of entries in scatter list for the read command.
2175 * @tag The tag of this read command.
2176 * @callback Pointer to the function that should be called
2177 * when the read completes.
2178 * @data Callback data passed to the callback function
2179 * when the read completes.
2180 * @dir Direction (read or write)
2181 *
2182 * return value
2183 * None
2184 */
2185 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2186 struct mtip_cmd *command, int nents,
2187 struct blk_mq_hw_ctx *hctx)
2188 {
2189 struct host_to_dev_fis *fis;
2190 struct mtip_port *port = dd->port;
2191 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2192 u64 start = blk_rq_pos(rq);
2193 unsigned int nsect = blk_rq_sectors(rq);
2194
2195 /* Map the scatter list for DMA access */
2196 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2197
2198 prefetch(&port->flags);
2199
2200 command->scatter_ents = nents;
2201
2202 /*
2203 * The number of retries for this command before it is
2204 * reported as a failure to the upper layers.
2205 */
2206 command->retries = MTIP_MAX_RETRIES;
2207
2208 /* Fill out fis */
2209 fis = command->command;
2210 fis->type = 0x27;
2211 fis->opts = 1 << 7;
2212 if (dma_dir == DMA_FROM_DEVICE)
2213 fis->command = ATA_CMD_FPDMA_READ;
2214 else
2215 fis->command = ATA_CMD_FPDMA_WRITE;
2216 fis->lba_low = start & 0xFF;
2217 fis->lba_mid = (start >> 8) & 0xFF;
2218 fis->lba_hi = (start >> 16) & 0xFF;
2219 fis->lba_low_ex = (start >> 24) & 0xFF;
2220 fis->lba_mid_ex = (start >> 32) & 0xFF;
2221 fis->lba_hi_ex = (start >> 40) & 0xFF;
2222 fis->device = 1 << 6;
2223 fis->features = nsect & 0xFF;
2224 fis->features_ex = (nsect >> 8) & 0xFF;
2225 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
2226 fis->sect_cnt_ex = 0;
2227 fis->control = 0;
2228 fis->res2 = 0;
2229 fis->res3 = 0;
2230 fill_command_sg(dd, command, nents);
2231
2232 if (unlikely(command->unaligned))
2233 fis->device |= 1 << 7;
2234
2235 /* Populate the command header */
2236 command->command_header->opts =
2237 __force_bit2int cpu_to_le32(
2238 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2239 command->command_header->byte_count = 0;
2240
2241 command->direction = dma_dir;
2242
2243 /*
2244 * To prevent this command from being issued
2245 * if an internal command is in progress or error handling is active.
2246 */
2247 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2248 set_bit(rq->tag, port->cmds_to_issue);
2249 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2250 return;
2251 }
2252
2253 /* Issue the command to the hardware */
2254 mtip_issue_ncq_command(port, rq->tag);
2255 }
2256
2257 /*
2258 * Sysfs status dump.
2259 *
2260 * @dev Pointer to the device structure, passed by the kernrel.
2261 * @attr Pointer to the device_attribute structure passed by the kernel.
2262 * @buf Pointer to the char buffer that will receive the stats info.
2263 *
2264 * return value
2265 * The size, in bytes, of the data copied into buf.
2266 */
2267 static ssize_t mtip_hw_show_status(struct device *dev,
2268 struct device_attribute *attr,
2269 char *buf)
2270 {
2271 struct driver_data *dd = dev_to_disk(dev)->private_data;
2272 int size = 0;
2273
2274 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2275 size += sprintf(buf, "%s", "thermal_shutdown\n");
2276 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2277 size += sprintf(buf, "%s", "write_protect\n");
2278 else
2279 size += sprintf(buf, "%s", "online\n");
2280
2281 return size;
2282 }
2283
2284 static DEVICE_ATTR(status, 0444, mtip_hw_show_status, NULL);
2285
2286 /* debugsfs entries */
2287
2288 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2289 {
2290 int size = 0;
2291 struct driver_data *dd, *tmp;
2292 unsigned long flags;
2293 char id_buf[42];
2294 u16 status = 0;
2295
2296 spin_lock_irqsave(&dev_lock, flags);
2297 size += sprintf(&buf[size], "Devices Present:\n");
2298 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2299 if (dd->pdev) {
2300 if (dd->port &&
2301 dd->port->identify &&
2302 dd->port->identify_valid) {
2303 strlcpy(id_buf,
2304 (char *) (dd->port->identify + 10), 21);
2305 status = *(dd->port->identify + 141);
2306 } else {
2307 memset(id_buf, 0, 42);
2308 status = 0;
2309 }
2310
2311 if (dd->port &&
2312 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2313 size += sprintf(&buf[size],
2314 " device %s %s (ftl rebuild %d %%)\n",
2315 dev_name(&dd->pdev->dev),
2316 id_buf,
2317 status);
2318 } else {
2319 size += sprintf(&buf[size],
2320 " device %s %s\n",
2321 dev_name(&dd->pdev->dev),
2322 id_buf);
2323 }
2324 }
2325 }
2326
2327 size += sprintf(&buf[size], "Devices Being Removed:\n");
2328 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2329 if (dd->pdev) {
2330 if (dd->port &&
2331 dd->port->identify &&
2332 dd->port->identify_valid) {
2333 strlcpy(id_buf,
2334 (char *) (dd->port->identify+10), 21);
2335 status = *(dd->port->identify + 141);
2336 } else {
2337 memset(id_buf, 0, 42);
2338 status = 0;
2339 }
2340
2341 if (dd->port &&
2342 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2343 size += sprintf(&buf[size],
2344 " device %s %s (ftl rebuild %d %%)\n",
2345 dev_name(&dd->pdev->dev),
2346 id_buf,
2347 status);
2348 } else {
2349 size += sprintf(&buf[size],
2350 " device %s %s\n",
2351 dev_name(&dd->pdev->dev),
2352 id_buf);
2353 }
2354 }
2355 }
2356 spin_unlock_irqrestore(&dev_lock, flags);
2357
2358 return size;
2359 }
2360
2361 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2362 size_t len, loff_t *offset)
2363 {
2364 struct driver_data *dd = (struct driver_data *)f->private_data;
2365 int size = *offset;
2366 char *buf;
2367 int rv = 0;
2368
2369 if (!len || *offset)
2370 return 0;
2371
2372 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2373 if (!buf) {
2374 dev_err(&dd->pdev->dev,
2375 "Memory allocation: status buffer\n");
2376 return -ENOMEM;
2377 }
2378
2379 size += show_device_status(NULL, buf);
2380
2381 *offset = size <= len ? size : len;
2382 size = copy_to_user(ubuf, buf, *offset);
2383 if (size)
2384 rv = -EFAULT;
2385
2386 kfree(buf);
2387 return rv ? rv : *offset;
2388 }
2389
2390 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2391 size_t len, loff_t *offset)
2392 {
2393 struct driver_data *dd = (struct driver_data *)f->private_data;
2394 char *buf;
2395 u32 group_allocated;
2396 int size = *offset;
2397 int n, rv = 0;
2398
2399 if (!len || size)
2400 return 0;
2401
2402 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2403 if (!buf) {
2404 dev_err(&dd->pdev->dev,
2405 "Memory allocation: register buffer\n");
2406 return -ENOMEM;
2407 }
2408
2409 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2410
2411 for (n = dd->slot_groups-1; n >= 0; n--)
2412 size += sprintf(&buf[size], "%08X ",
2413 readl(dd->port->s_active[n]));
2414
2415 size += sprintf(&buf[size], "]\n");
2416 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2417
2418 for (n = dd->slot_groups-1; n >= 0; n--)
2419 size += sprintf(&buf[size], "%08X ",
2420 readl(dd->port->cmd_issue[n]));
2421
2422 size += sprintf(&buf[size], "]\n");
2423 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2424
2425 for (n = dd->slot_groups-1; n >= 0; n--)
2426 size += sprintf(&buf[size], "%08X ",
2427 readl(dd->port->completed[n]));
2428
2429 size += sprintf(&buf[size], "]\n");
2430 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2431 readl(dd->port->mmio + PORT_IRQ_STAT));
2432 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2433 readl(dd->mmio + HOST_IRQ_STAT));
2434 size += sprintf(&buf[size], "\n");
2435
2436 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2437
2438 for (n = dd->slot_groups-1; n >= 0; n--) {
2439 if (sizeof(long) > sizeof(u32))
2440 group_allocated =
2441 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2442 else
2443 group_allocated = dd->port->cmds_to_issue[n];
2444 size += sprintf(&buf[size], "%08X ", group_allocated);
2445 }
2446 size += sprintf(&buf[size], "]\n");
2447
2448 *offset = size <= len ? size : len;
2449 size = copy_to_user(ubuf, buf, *offset);
2450 if (size)
2451 rv = -EFAULT;
2452
2453 kfree(buf);
2454 return rv ? rv : *offset;
2455 }
2456
2457 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2458 size_t len, loff_t *offset)
2459 {
2460 struct driver_data *dd = (struct driver_data *)f->private_data;
2461 char *buf;
2462 int size = *offset;
2463 int rv = 0;
2464
2465 if (!len || size)
2466 return 0;
2467
2468 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2469 if (!buf) {
2470 dev_err(&dd->pdev->dev,
2471 "Memory allocation: flag buffer\n");
2472 return -ENOMEM;
2473 }
2474
2475 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2476 dd->port->flags);
2477 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2478 dd->dd_flag);
2479
2480 *offset = size <= len ? size : len;
2481 size = copy_to_user(ubuf, buf, *offset);
2482 if (size)
2483 rv = -EFAULT;
2484
2485 kfree(buf);
2486 return rv ? rv : *offset;
2487 }
2488
2489 static const struct file_operations mtip_device_status_fops = {
2490 .owner = THIS_MODULE,
2491 .open = simple_open,
2492 .read = mtip_hw_read_device_status,
2493 .llseek = no_llseek,
2494 };
2495
2496 static const struct file_operations mtip_regs_fops = {
2497 .owner = THIS_MODULE,
2498 .open = simple_open,
2499 .read = mtip_hw_read_registers,
2500 .llseek = no_llseek,
2501 };
2502
2503 static const struct file_operations mtip_flags_fops = {
2504 .owner = THIS_MODULE,
2505 .open = simple_open,
2506 .read = mtip_hw_read_flags,
2507 .llseek = no_llseek,
2508 };
2509
2510 /*
2511 * Create the sysfs related attributes.
2512 *
2513 * @dd Pointer to the driver data structure.
2514 * @kobj Pointer to the kobj for the block device.
2515 *
2516 * return value
2517 * 0 Operation completed successfully.
2518 * -EINVAL Invalid parameter.
2519 */
2520 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2521 {
2522 if (!kobj || !dd)
2523 return -EINVAL;
2524
2525 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2526 dev_warn(&dd->pdev->dev,
2527 "Error creating 'status' sysfs entry\n");
2528 return 0;
2529 }
2530
2531 /*
2532 * Remove the sysfs related attributes.
2533 *
2534 * @dd Pointer to the driver data structure.
2535 * @kobj Pointer to the kobj for the block device.
2536 *
2537 * return value
2538 * 0 Operation completed successfully.
2539 * -EINVAL Invalid parameter.
2540 */
2541 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2542 {
2543 if (!kobj || !dd)
2544 return -EINVAL;
2545
2546 sysfs_remove_file(kobj, &dev_attr_status.attr);
2547
2548 return 0;
2549 }
2550
2551 static int mtip_hw_debugfs_init(struct driver_data *dd)
2552 {
2553 if (!dfs_parent)
2554 return -1;
2555
2556 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2557 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2558 dev_warn(&dd->pdev->dev,
2559 "Error creating node %s under debugfs\n",
2560 dd->disk->disk_name);
2561 dd->dfs_node = NULL;
2562 return -1;
2563 }
2564
2565 debugfs_create_file("flags", 0444, dd->dfs_node, dd, &mtip_flags_fops);
2566 debugfs_create_file("registers", 0444, dd->dfs_node, dd,
2567 &mtip_regs_fops);
2568
2569 return 0;
2570 }
2571
2572 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2573 {
2574 debugfs_remove_recursive(dd->dfs_node);
2575 }
2576
2577 /*
2578 * Perform any init/resume time hardware setup
2579 *
2580 * @dd Pointer to the driver data structure.
2581 *
2582 * return value
2583 * None
2584 */
2585 static inline void hba_setup(struct driver_data *dd)
2586 {
2587 u32 hwdata;
2588 hwdata = readl(dd->mmio + HOST_HSORG);
2589
2590 /* interrupt bug workaround: use only 1 IS bit.*/
2591 writel(hwdata |
2592 HSORG_DISABLE_SLOTGRP_INTR |
2593 HSORG_DISABLE_SLOTGRP_PXIS,
2594 dd->mmio + HOST_HSORG);
2595 }
2596
2597 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2598 {
2599 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2600 }
2601
2602 /*
2603 * Detect the details of the product, and store anything needed
2604 * into the driver data structure. This includes product type and
2605 * version and number of slot groups.
2606 *
2607 * @dd Pointer to the driver data structure.
2608 *
2609 * return value
2610 * None
2611 */
2612 static void mtip_detect_product(struct driver_data *dd)
2613 {
2614 u32 hwdata;
2615 unsigned int rev, slotgroups;
2616
2617 /*
2618 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2619 * info register:
2620 * [15:8] hardware/software interface rev#
2621 * [ 3] asic-style interface
2622 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2623 */
2624 hwdata = readl(dd->mmio + HOST_HSORG);
2625
2626 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2627 dd->slot_groups = 1;
2628
2629 if (hwdata & 0x8) {
2630 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2631 rev = (hwdata & HSORG_HWREV) >> 8;
2632 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2633 dev_info(&dd->pdev->dev,
2634 "ASIC-FPGA design, HS rev 0x%x, "
2635 "%i slot groups [%i slots]\n",
2636 rev,
2637 slotgroups,
2638 slotgroups * 32);
2639
2640 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2641 dev_warn(&dd->pdev->dev,
2642 "Warning: driver only supports "
2643 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2644 slotgroups = MTIP_MAX_SLOT_GROUPS;
2645 }
2646 dd->slot_groups = slotgroups;
2647 return;
2648 }
2649
2650 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2651 }
2652
2653 /*
2654 * Blocking wait for FTL rebuild to complete
2655 *
2656 * @dd Pointer to the DRIVER_DATA structure.
2657 *
2658 * return value
2659 * 0 FTL rebuild completed successfully
2660 * -EFAULT FTL rebuild error/timeout/interruption
2661 */
2662 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2663 {
2664 unsigned long timeout, cnt = 0, start;
2665
2666 dev_warn(&dd->pdev->dev,
2667 "FTL rebuild in progress. Polling for completion.\n");
2668
2669 start = jiffies;
2670 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2671
2672 do {
2673 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2674 &dd->dd_flag)))
2675 return -EFAULT;
2676 if (mtip_check_surprise_removal(dd->pdev))
2677 return -EFAULT;
2678
2679 if (mtip_get_identify(dd->port, NULL) < 0)
2680 return -EFAULT;
2681
2682 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2683 MTIP_FTL_REBUILD_MAGIC) {
2684 ssleep(1);
2685 /* Print message every 3 minutes */
2686 if (cnt++ >= 180) {
2687 dev_warn(&dd->pdev->dev,
2688 "FTL rebuild in progress (%d secs).\n",
2689 jiffies_to_msecs(jiffies - start) / 1000);
2690 cnt = 0;
2691 }
2692 } else {
2693 dev_warn(&dd->pdev->dev,
2694 "FTL rebuild complete (%d secs).\n",
2695 jiffies_to_msecs(jiffies - start) / 1000);
2696 mtip_block_initialize(dd);
2697 return 0;
2698 }
2699 } while (time_before(jiffies, timeout));
2700
2701 /* Check for timeout */
2702 dev_err(&dd->pdev->dev,
2703 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2704 jiffies_to_msecs(jiffies - start) / 1000);
2705 return -EFAULT;
2706 }
2707
2708 static void mtip_softirq_done_fn(struct request *rq)
2709 {
2710 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2711 struct driver_data *dd = rq->q->queuedata;
2712
2713 /* Unmap the DMA scatter list entries */
2714 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2715 cmd->direction);
2716
2717 if (unlikely(cmd->unaligned))
2718 up(&dd->port->cmd_slot_unal);
2719
2720 blk_mq_end_request(rq, cmd->status);
2721 }
2722
2723 static void mtip_abort_cmd(struct request *req, void *data, bool reserved)
2724 {
2725 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
2726 struct driver_data *dd = data;
2727
2728 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2729
2730 clear_bit(req->tag, dd->port->cmds_to_issue);
2731 cmd->status = BLK_STS_IOERR;
2732 mtip_softirq_done_fn(req);
2733 }
2734
2735 static void mtip_queue_cmd(struct request *req, void *data, bool reserved)
2736 {
2737 struct driver_data *dd = data;
2738
2739 set_bit(req->tag, dd->port->cmds_to_issue);
2740 blk_abort_request(req);
2741 }
2742
2743 /*
2744 * service thread to issue queued commands
2745 *
2746 * @data Pointer to the driver data structure.
2747 *
2748 * return value
2749 * 0
2750 */
2751
2752 static int mtip_service_thread(void *data)
2753 {
2754 struct driver_data *dd = (struct driver_data *)data;
2755 unsigned long slot, slot_start, slot_wrap, to;
2756 unsigned int num_cmd_slots = dd->slot_groups * 32;
2757 struct mtip_port *port = dd->port;
2758
2759 while (1) {
2760 if (kthread_should_stop() ||
2761 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2762 goto st_out;
2763 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2764
2765 /*
2766 * the condition is to check neither an internal command is
2767 * is in progress nor error handling is active
2768 */
2769 wait_event_interruptible(port->svc_wait, (port->flags) &&
2770 (port->flags & MTIP_PF_SVC_THD_WORK));
2771
2772 if (kthread_should_stop() ||
2773 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2774 goto st_out;
2775
2776 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2777 &dd->dd_flag)))
2778 goto st_out;
2779
2780 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2781
2782 restart_eh:
2783 /* Demux bits: start with error handling */
2784 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2785 mtip_handle_tfe(dd);
2786 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2787 }
2788
2789 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2790 goto restart_eh;
2791
2792 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2793 to = jiffies + msecs_to_jiffies(5000);
2794
2795 do {
2796 mdelay(100);
2797 } while (atomic_read(&dd->irq_workers_active) != 0 &&
2798 time_before(jiffies, to));
2799
2800 if (atomic_read(&dd->irq_workers_active) != 0)
2801 dev_warn(&dd->pdev->dev,
2802 "Completion workers still active!");
2803
2804 blk_mq_quiesce_queue(dd->queue);
2805
2806 spin_lock(dd->queue->queue_lock);
2807 blk_mq_tagset_busy_iter(&dd->tags,
2808 mtip_queue_cmd, dd);
2809 spin_unlock(dd->queue->queue_lock);
2810
2811 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2812
2813 if (mtip_device_reset(dd))
2814 blk_mq_tagset_busy_iter(&dd->tags,
2815 mtip_abort_cmd, dd);
2816
2817 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
2818
2819 blk_mq_unquiesce_queue(dd->queue);
2820 }
2821
2822 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2823 slot = 1;
2824 /* used to restrict the loop to one iteration */
2825 slot_start = num_cmd_slots;
2826 slot_wrap = 0;
2827 while (1) {
2828 slot = find_next_bit(port->cmds_to_issue,
2829 num_cmd_slots, slot);
2830 if (slot_wrap == 1) {
2831 if ((slot_start >= slot) ||
2832 (slot >= num_cmd_slots))
2833 break;
2834 }
2835 if (unlikely(slot_start == num_cmd_slots))
2836 slot_start = slot;
2837
2838 if (unlikely(slot == num_cmd_slots)) {
2839 slot = 1;
2840 slot_wrap = 1;
2841 continue;
2842 }
2843
2844 /* Issue the command to the hardware */
2845 mtip_issue_ncq_command(port, slot);
2846
2847 clear_bit(slot, port->cmds_to_issue);
2848 }
2849
2850 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2851 }
2852
2853 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2854 if (mtip_ftl_rebuild_poll(dd) == 0)
2855 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2856 }
2857 }
2858
2859 st_out:
2860 return 0;
2861 }
2862
2863 /*
2864 * DMA region teardown
2865 *
2866 * @dd Pointer to driver_data structure
2867 *
2868 * return value
2869 * None
2870 */
2871 static void mtip_dma_free(struct driver_data *dd)
2872 {
2873 struct mtip_port *port = dd->port;
2874
2875 if (port->block1)
2876 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2877 port->block1, port->block1_dma);
2878
2879 if (port->command_list) {
2880 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2881 port->command_list, port->command_list_dma);
2882 }
2883 }
2884
2885 /*
2886 * DMA region setup
2887 *
2888 * @dd Pointer to driver_data structure
2889 *
2890 * return value
2891 * -ENOMEM Not enough free DMA region space to initialize driver
2892 */
2893 static int mtip_dma_alloc(struct driver_data *dd)
2894 {
2895 struct mtip_port *port = dd->port;
2896
2897 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
2898 port->block1 =
2899 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2900 &port->block1_dma, GFP_KERNEL);
2901 if (!port->block1)
2902 return -ENOMEM;
2903 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
2904
2905 /* Allocate dma memory for command list */
2906 port->command_list =
2907 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2908 &port->command_list_dma, GFP_KERNEL);
2909 if (!port->command_list) {
2910 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2911 port->block1, port->block1_dma);
2912 port->block1 = NULL;
2913 port->block1_dma = 0;
2914 return -ENOMEM;
2915 }
2916 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
2917
2918 /* Setup all pointers into first DMA region */
2919 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
2920 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
2921 port->identify = port->block1 + AHCI_IDFY_OFFSET;
2922 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
2923 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
2924 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
2925 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
2926 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
2927
2928 return 0;
2929 }
2930
2931 static int mtip_hw_get_identify(struct driver_data *dd)
2932 {
2933 struct smart_attr attr242;
2934 unsigned char *buf;
2935 int rv;
2936
2937 if (mtip_get_identify(dd->port, NULL) < 0)
2938 return -EFAULT;
2939
2940 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2941 MTIP_FTL_REBUILD_MAGIC) {
2942 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
2943 return MTIP_FTL_REBUILD_MAGIC;
2944 }
2945 mtip_dump_identify(dd->port);
2946
2947 /* check write protect, over temp and rebuild statuses */
2948 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
2949 dd->port->log_buf,
2950 dd->port->log_buf_dma, 1);
2951 if (rv) {
2952 dev_warn(&dd->pdev->dev,
2953 "Error in READ LOG EXT (10h) command\n");
2954 /* non-critical error, don't fail the load */
2955 } else {
2956 buf = (unsigned char *)dd->port->log_buf;
2957 if (buf[259] & 0x1) {
2958 dev_info(&dd->pdev->dev,
2959 "Write protect bit is set.\n");
2960 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
2961 }
2962 if (buf[288] == 0xF7) {
2963 dev_info(&dd->pdev->dev,
2964 "Exceeded Tmax, drive in thermal shutdown.\n");
2965 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
2966 }
2967 if (buf[288] == 0xBF) {
2968 dev_info(&dd->pdev->dev,
2969 "Drive indicates rebuild has failed.\n");
2970 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
2971 }
2972 }
2973
2974 /* get write protect progess */
2975 memset(&attr242, 0, sizeof(struct smart_attr));
2976 if (mtip_get_smart_attr(dd->port, 242, &attr242))
2977 dev_warn(&dd->pdev->dev,
2978 "Unable to check write protect progress\n");
2979 else
2980 dev_info(&dd->pdev->dev,
2981 "Write protect progress: %u%% (%u blocks)\n",
2982 attr242.cur, le32_to_cpu(attr242.data));
2983
2984 return rv;
2985 }
2986
2987 /*
2988 * Called once for each card.
2989 *
2990 * @dd Pointer to the driver data structure.
2991 *
2992 * return value
2993 * 0 on success, else an error code.
2994 */
2995 static int mtip_hw_init(struct driver_data *dd)
2996 {
2997 int i;
2998 int rv;
2999 unsigned long timeout, timetaken;
3000
3001 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3002
3003 mtip_detect_product(dd);
3004 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3005 rv = -EIO;
3006 goto out1;
3007 }
3008
3009 hba_setup(dd);
3010
3011 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3012 dd->numa_node);
3013 if (!dd->port) {
3014 dev_err(&dd->pdev->dev,
3015 "Memory allocation: port structure\n");
3016 return -ENOMEM;
3017 }
3018
3019 /* Continue workqueue setup */
3020 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3021 dd->work[i].port = dd->port;
3022
3023 /* Enable unaligned IO constraints for some devices */
3024 if (mtip_device_unaligned_constrained(dd))
3025 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3026 else
3027 dd->unal_qdepth = 0;
3028
3029 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3030
3031 /* Spinlock to prevent concurrent issue */
3032 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3033 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3034
3035 /* Set the port mmio base address. */
3036 dd->port->mmio = dd->mmio + PORT_OFFSET;
3037 dd->port->dd = dd;
3038
3039 /* DMA allocations */
3040 rv = mtip_dma_alloc(dd);
3041 if (rv < 0)
3042 goto out1;
3043
3044 /* Setup the pointers to the extended s_active and CI registers. */
3045 for (i = 0; i < dd->slot_groups; i++) {
3046 dd->port->s_active[i] =
3047 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3048 dd->port->cmd_issue[i] =
3049 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3050 dd->port->completed[i] =
3051 dd->port->mmio + i*0x80 + PORT_SDBV;
3052 }
3053
3054 timetaken = jiffies;
3055 timeout = jiffies + msecs_to_jiffies(30000);
3056 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3057 time_before(jiffies, timeout)) {
3058 mdelay(100);
3059 }
3060 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3061 timetaken = jiffies - timetaken;
3062 dev_warn(&dd->pdev->dev,
3063 "Surprise removal detected at %u ms\n",
3064 jiffies_to_msecs(timetaken));
3065 rv = -ENODEV;
3066 goto out2 ;
3067 }
3068 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3069 timetaken = jiffies - timetaken;
3070 dev_warn(&dd->pdev->dev,
3071 "Removal detected at %u ms\n",
3072 jiffies_to_msecs(timetaken));
3073 rv = -EFAULT;
3074 goto out2;
3075 }
3076
3077 /* Conditionally reset the HBA. */
3078 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3079 if (mtip_hba_reset(dd) < 0) {
3080 dev_err(&dd->pdev->dev,
3081 "Card did not reset within timeout\n");
3082 rv = -EIO;
3083 goto out2;
3084 }
3085 } else {
3086 /* Clear any pending interrupts on the HBA */
3087 writel(readl(dd->mmio + HOST_IRQ_STAT),
3088 dd->mmio + HOST_IRQ_STAT);
3089 }
3090
3091 mtip_init_port(dd->port);
3092 mtip_start_port(dd->port);
3093
3094 /* Setup the ISR and enable interrupts. */
3095 rv = devm_request_irq(&dd->pdev->dev,
3096 dd->pdev->irq,
3097 mtip_irq_handler,
3098 IRQF_SHARED,
3099 dev_driver_string(&dd->pdev->dev),
3100 dd);
3101
3102 if (rv) {
3103 dev_err(&dd->pdev->dev,
3104 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3105 goto out2;
3106 }
3107 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3108
3109 /* Enable interrupts on the HBA. */
3110 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3111 dd->mmio + HOST_CTL);
3112
3113 init_waitqueue_head(&dd->port->svc_wait);
3114
3115 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3116 rv = -EFAULT;
3117 goto out3;
3118 }
3119
3120 return rv;
3121
3122 out3:
3123 /* Disable interrupts on the HBA. */
3124 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3125 dd->mmio + HOST_CTL);
3126
3127 /* Release the IRQ. */
3128 irq_set_affinity_hint(dd->pdev->irq, NULL);
3129 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3130
3131 out2:
3132 mtip_deinit_port(dd->port);
3133 mtip_dma_free(dd);
3134
3135 out1:
3136 /* Free the memory allocated for the for structure. */
3137 kfree(dd->port);
3138
3139 return rv;
3140 }
3141
3142 static int mtip_standby_drive(struct driver_data *dd)
3143 {
3144 int rv = 0;
3145
3146 if (dd->sr || !dd->port)
3147 return -ENODEV;
3148 /*
3149 * Send standby immediate (E0h) to the drive so that it
3150 * saves its state.
3151 */
3152 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3153 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3154 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3155 rv = mtip_standby_immediate(dd->port);
3156 if (rv)
3157 dev_warn(&dd->pdev->dev,
3158 "STANDBY IMMEDIATE failed\n");
3159 }
3160 return rv;
3161 }
3162
3163 /*
3164 * Called to deinitialize an interface.
3165 *
3166 * @dd Pointer to the driver data structure.
3167 *
3168 * return value
3169 * 0
3170 */
3171 static int mtip_hw_exit(struct driver_data *dd)
3172 {
3173 if (!dd->sr) {
3174 /* de-initialize the port. */
3175 mtip_deinit_port(dd->port);
3176
3177 /* Disable interrupts on the HBA. */
3178 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3179 dd->mmio + HOST_CTL);
3180 }
3181
3182 /* Release the IRQ. */
3183 irq_set_affinity_hint(dd->pdev->irq, NULL);
3184 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3185 msleep(1000);
3186
3187 /* Free dma regions */
3188 mtip_dma_free(dd);
3189
3190 /* Free the memory allocated for the for structure. */
3191 kfree(dd->port);
3192 dd->port = NULL;
3193
3194 return 0;
3195 }
3196
3197 /*
3198 * Issue a Standby Immediate command to the device.
3199 *
3200 * This function is called by the Block Layer just before the
3201 * system powers off during a shutdown.
3202 *
3203 * @dd Pointer to the driver data structure.
3204 *
3205 * return value
3206 * 0
3207 */
3208 static int mtip_hw_shutdown(struct driver_data *dd)
3209 {
3210 /*
3211 * Send standby immediate (E0h) to the drive so that it
3212 * saves its state.
3213 */
3214 mtip_standby_drive(dd);
3215
3216 return 0;
3217 }
3218
3219 /*
3220 * Suspend function
3221 *
3222 * This function is called by the Block Layer just before the
3223 * system hibernates.
3224 *
3225 * @dd Pointer to the driver data structure.
3226 *
3227 * return value
3228 * 0 Suspend was successful
3229 * -EFAULT Suspend was not successful
3230 */
3231 static int mtip_hw_suspend(struct driver_data *dd)
3232 {
3233 /*
3234 * Send standby immediate (E0h) to the drive
3235 * so that it saves its state.
3236 */
3237 if (mtip_standby_drive(dd) != 0) {
3238 dev_err(&dd->pdev->dev,
3239 "Failed standby-immediate command\n");
3240 return -EFAULT;
3241 }
3242
3243 /* Disable interrupts on the HBA.*/
3244 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3245 dd->mmio + HOST_CTL);
3246 mtip_deinit_port(dd->port);
3247
3248 return 0;
3249 }
3250
3251 /*
3252 * Resume function
3253 *
3254 * This function is called by the Block Layer as the
3255 * system resumes.
3256 *
3257 * @dd Pointer to the driver data structure.
3258 *
3259 * return value
3260 * 0 Resume was successful
3261 * -EFAULT Resume was not successful
3262 */
3263 static int mtip_hw_resume(struct driver_data *dd)
3264 {
3265 /* Perform any needed hardware setup steps */
3266 hba_setup(dd);
3267
3268 /* Reset the HBA */
3269 if (mtip_hba_reset(dd) != 0) {
3270 dev_err(&dd->pdev->dev,
3271 "Unable to reset the HBA\n");
3272 return -EFAULT;
3273 }
3274
3275 /*
3276 * Enable the port, DMA engine, and FIS reception specific
3277 * h/w in controller.
3278 */
3279 mtip_init_port(dd->port);
3280 mtip_start_port(dd->port);
3281
3282 /* Enable interrupts on the HBA.*/
3283 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3284 dd->mmio + HOST_CTL);
3285
3286 return 0;
3287 }
3288
3289 /*
3290 * Helper function for reusing disk name
3291 * upon hot insertion.
3292 */
3293 static int rssd_disk_name_format(char *prefix,
3294 int index,
3295 char *buf,
3296 int buflen)
3297 {
3298 const int base = 'z' - 'a' + 1;
3299 char *begin = buf + strlen(prefix);
3300 char *end = buf + buflen;
3301 char *p;
3302 int unit;
3303
3304 p = end - 1;
3305 *p = '\0';
3306 unit = base;
3307 do {
3308 if (p == begin)
3309 return -EINVAL;
3310 *--p = 'a' + (index % unit);
3311 index = (index / unit) - 1;
3312 } while (index >= 0);
3313
3314 memmove(begin, p, end - p);
3315 memcpy(buf, prefix, strlen(prefix));
3316
3317 return 0;
3318 }
3319
3320 /*
3321 * Block layer IOCTL handler.
3322 *
3323 * @dev Pointer to the block_device structure.
3324 * @mode ignored
3325 * @cmd IOCTL command passed from the user application.
3326 * @arg Argument passed from the user application.
3327 *
3328 * return value
3329 * 0 IOCTL completed successfully.
3330 * -ENOTTY IOCTL not supported or invalid driver data
3331 * structure pointer.
3332 */
3333 static int mtip_block_ioctl(struct block_device *dev,
3334 fmode_t mode,
3335 unsigned cmd,
3336 unsigned long arg)
3337 {
3338 struct driver_data *dd = dev->bd_disk->private_data;
3339
3340 if (!capable(CAP_SYS_ADMIN))
3341 return -EACCES;
3342
3343 if (!dd)
3344 return -ENOTTY;
3345
3346 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3347 return -ENOTTY;
3348
3349 switch (cmd) {
3350 case BLKFLSBUF:
3351 return -ENOTTY;
3352 default:
3353 return mtip_hw_ioctl(dd, cmd, arg);
3354 }
3355 }
3356
3357 #ifdef CONFIG_COMPAT
3358 /*
3359 * Block layer compat IOCTL handler.
3360 *
3361 * @dev Pointer to the block_device structure.
3362 * @mode ignored
3363 * @cmd IOCTL command passed from the user application.
3364 * @arg Argument passed from the user application.
3365 *
3366 * return value
3367 * 0 IOCTL completed successfully.
3368 * -ENOTTY IOCTL not supported or invalid driver data
3369 * structure pointer.
3370 */
3371 static int mtip_block_compat_ioctl(struct block_device *dev,
3372 fmode_t mode,
3373 unsigned cmd,
3374 unsigned long arg)
3375 {
3376 struct driver_data *dd = dev->bd_disk->private_data;
3377
3378 if (!capable(CAP_SYS_ADMIN))
3379 return -EACCES;
3380
3381 if (!dd)
3382 return -ENOTTY;
3383
3384 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3385 return -ENOTTY;
3386
3387 switch (cmd) {
3388 case BLKFLSBUF:
3389 return -ENOTTY;
3390 case HDIO_DRIVE_TASKFILE: {
3391 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3392 ide_task_request_t req_task;
3393 int compat_tasksize, outtotal, ret;
3394
3395 compat_tasksize =
3396 sizeof(struct mtip_compat_ide_task_request_s);
3397
3398 compat_req_task =
3399 (struct mtip_compat_ide_task_request_s __user *) arg;
3400
3401 if (copy_from_user(&req_task, (void __user *) arg,
3402 compat_tasksize - (2 * sizeof(compat_long_t))))
3403 return -EFAULT;
3404
3405 if (get_user(req_task.out_size, &compat_req_task->out_size))
3406 return -EFAULT;
3407
3408 if (get_user(req_task.in_size, &compat_req_task->in_size))
3409 return -EFAULT;
3410
3411 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3412
3413 ret = exec_drive_taskfile(dd, (void __user *) arg,
3414 &req_task, outtotal);
3415
3416 if (copy_to_user((void __user *) arg, &req_task,
3417 compat_tasksize -
3418 (2 * sizeof(compat_long_t))))
3419 return -EFAULT;
3420
3421 if (put_user(req_task.out_size, &compat_req_task->out_size))
3422 return -EFAULT;
3423
3424 if (put_user(req_task.in_size, &compat_req_task->in_size))
3425 return -EFAULT;
3426
3427 return ret;
3428 }
3429 default:
3430 return mtip_hw_ioctl(dd, cmd, arg);
3431 }
3432 }
3433 #endif
3434
3435 /*
3436 * Obtain the geometry of the device.
3437 *
3438 * You may think that this function is obsolete, but some applications,
3439 * fdisk for example still used CHS values. This function describes the
3440 * device as having 224 heads and 56 sectors per cylinder. These values are
3441 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3442 * partition is described in terms of a start and end cylinder this means
3443 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3444 * affects performance.
3445 *
3446 * @dev Pointer to the block_device strucutre.
3447 * @geo Pointer to a hd_geometry structure.
3448 *
3449 * return value
3450 * 0 Operation completed successfully.
3451 * -ENOTTY An error occurred while reading the drive capacity.
3452 */
3453 static int mtip_block_getgeo(struct block_device *dev,
3454 struct hd_geometry *geo)
3455 {
3456 struct driver_data *dd = dev->bd_disk->private_data;
3457 sector_t capacity;
3458
3459 if (!dd)
3460 return -ENOTTY;
3461
3462 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3463 dev_warn(&dd->pdev->dev,
3464 "Could not get drive capacity.\n");
3465 return -ENOTTY;
3466 }
3467
3468 geo->heads = 224;
3469 geo->sectors = 56;
3470 sector_div(capacity, (geo->heads * geo->sectors));
3471 geo->cylinders = capacity;
3472 return 0;
3473 }
3474
3475 static int mtip_block_open(struct block_device *dev, fmode_t mode)
3476 {
3477 struct driver_data *dd;
3478
3479 if (dev && dev->bd_disk) {
3480 dd = (struct driver_data *) dev->bd_disk->private_data;
3481
3482 if (dd) {
3483 if (test_bit(MTIP_DDF_REMOVAL_BIT,
3484 &dd->dd_flag)) {
3485 return -ENODEV;
3486 }
3487 return 0;
3488 }
3489 }
3490 return -ENODEV;
3491 }
3492
3493 static void mtip_block_release(struct gendisk *disk, fmode_t mode)
3494 {
3495 }
3496
3497 /*
3498 * Block device operation function.
3499 *
3500 * This structure contains pointers to the functions required by the block
3501 * layer.
3502 */
3503 static const struct block_device_operations mtip_block_ops = {
3504 .open = mtip_block_open,
3505 .release = mtip_block_release,
3506 .ioctl = mtip_block_ioctl,
3507 #ifdef CONFIG_COMPAT
3508 .compat_ioctl = mtip_block_compat_ioctl,
3509 #endif
3510 .getgeo = mtip_block_getgeo,
3511 .owner = THIS_MODULE
3512 };
3513
3514 static inline bool is_se_active(struct driver_data *dd)
3515 {
3516 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3517 if (dd->port->ic_pause_timer) {
3518 unsigned long to = dd->port->ic_pause_timer +
3519 msecs_to_jiffies(1000);
3520 if (time_after(jiffies, to)) {
3521 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3522 &dd->port->flags);
3523 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3524 dd->port->ic_pause_timer = 0;
3525 wake_up_interruptible(&dd->port->svc_wait);
3526 return false;
3527 }
3528 }
3529 return true;
3530 }
3531 return false;
3532 }
3533
3534 /*
3535 * Block layer make request function.
3536 *
3537 * This function is called by the kernel to process a BIO for
3538 * the P320 device.
3539 *
3540 * @queue Pointer to the request queue. Unused other than to obtain
3541 * the driver data structure.
3542 * @rq Pointer to the request.
3543 *
3544 */
3545 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
3546 {
3547 struct driver_data *dd = hctx->queue->queuedata;
3548 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3549 unsigned int nents;
3550
3551 if (is_se_active(dd))
3552 return -ENODATA;
3553
3554 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3555 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3556 &dd->dd_flag))) {
3557 return -ENXIO;
3558 }
3559 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3560 return -ENODATA;
3561 }
3562 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3563 &dd->dd_flag) &&
3564 rq_data_dir(rq))) {
3565 return -ENODATA;
3566 }
3567 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) ||
3568 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)))
3569 return -ENODATA;
3570 }
3571
3572 if (req_op(rq) == REQ_OP_DISCARD) {
3573 int err;
3574
3575 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
3576 blk_mq_end_request(rq, err ? BLK_STS_IOERR : BLK_STS_OK);
3577 return 0;
3578 }
3579
3580 /* Create the scatter list for this request. */
3581 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3582
3583 /* Issue the read/write. */
3584 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3585 return 0;
3586 }
3587
3588 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3589 struct request *rq)
3590 {
3591 struct driver_data *dd = hctx->queue->queuedata;
3592 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3593
3594 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3595 return false;
3596
3597 /*
3598 * If unaligned depth must be limited on this controller, mark it
3599 * as unaligned if the IO isn't on a 4k boundary (start of length).
3600 */
3601 if (blk_rq_sectors(rq) <= 64) {
3602 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3603 cmd->unaligned = 1;
3604 }
3605
3606 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3607 return true;
3608
3609 return false;
3610 }
3611
3612 static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3613 struct request *rq)
3614 {
3615 struct driver_data *dd = hctx->queue->queuedata;
3616 struct mtip_int_cmd *icmd = rq->special;
3617 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3618 struct mtip_cmd_sg *command_sg;
3619
3620 if (mtip_commands_active(dd->port))
3621 return BLK_STS_RESOURCE;
3622
3623 /* Populate the SG list */
3624 cmd->command_header->opts =
3625 __force_bit2int cpu_to_le32(icmd->opts | icmd->fis_len);
3626 if (icmd->buf_len) {
3627 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3628
3629 command_sg->info =
3630 __force_bit2int cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3631 command_sg->dba =
3632 __force_bit2int cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3633 command_sg->dba_upper =
3634 __force_bit2int cpu_to_le32((icmd->buffer >> 16) >> 16);
3635
3636 cmd->command_header->opts |=
3637 __force_bit2int cpu_to_le32((1 << 16));
3638 }
3639
3640 /* Populate the command header */
3641 cmd->command_header->byte_count = 0;
3642
3643 blk_mq_start_request(rq);
3644 mtip_issue_non_ncq_command(dd->port, rq->tag);
3645 return 0;
3646 }
3647
3648 static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3649 const struct blk_mq_queue_data *bd)
3650 {
3651 struct request *rq = bd->rq;
3652 int ret;
3653
3654 mtip_init_cmd_header(rq);
3655
3656 if (blk_rq_is_passthrough(rq))
3657 return mtip_issue_reserved_cmd(hctx, rq);
3658
3659 if (unlikely(mtip_check_unal_depth(hctx, rq)))
3660 return BLK_STS_RESOURCE;
3661
3662 blk_mq_start_request(rq);
3663
3664 ret = mtip_submit_request(hctx, rq);
3665 if (likely(!ret))
3666 return BLK_STS_OK;
3667 return BLK_STS_IOERR;
3668 }
3669
3670 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq,
3671 unsigned int hctx_idx)
3672 {
3673 struct driver_data *dd = set->driver_data;
3674 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3675
3676 if (!cmd->command)
3677 return;
3678
3679 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3680 cmd->command, cmd->command_dma);
3681 }
3682
3683 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq,
3684 unsigned int hctx_idx, unsigned int numa_node)
3685 {
3686 struct driver_data *dd = set->driver_data;
3687 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3688
3689 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3690 &cmd->command_dma, GFP_KERNEL);
3691 if (!cmd->command)
3692 return -ENOMEM;
3693
3694 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3695
3696 sg_init_table(cmd->sg, MTIP_MAX_SG);
3697 return 0;
3698 }
3699
3700 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3701 bool reserved)
3702 {
3703 struct driver_data *dd = req->q->queuedata;
3704
3705 if (reserved) {
3706 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3707
3708 cmd->status = BLK_STS_TIMEOUT;
3709 blk_mq_complete_request(req);
3710 return BLK_EH_DONE;
3711 }
3712
3713 if (test_bit(req->tag, dd->port->cmds_to_issue))
3714 goto exit_handler;
3715
3716 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3717 goto exit_handler;
3718
3719 wake_up_interruptible(&dd->port->svc_wait);
3720 exit_handler:
3721 return BLK_EH_RESET_TIMER;
3722 }
3723
3724 static const struct blk_mq_ops mtip_mq_ops = {
3725 .queue_rq = mtip_queue_rq,
3726 .init_request = mtip_init_cmd,
3727 .exit_request = mtip_free_cmd,
3728 .complete = mtip_softirq_done_fn,
3729 .timeout = mtip_cmd_timeout,
3730 };
3731
3732 /*
3733 * Block layer initialization function.
3734 *
3735 * This function is called once by the PCI layer for each P320
3736 * device that is connected to the system.
3737 *
3738 * @dd Pointer to the driver data structure.
3739 *
3740 * return value
3741 * 0 on success else an error code.
3742 */
3743 static int mtip_block_initialize(struct driver_data *dd)
3744 {
3745 int rv = 0, wait_for_rebuild = 0;
3746 sector_t capacity;
3747 unsigned int index = 0;
3748 struct kobject *kobj;
3749
3750 if (dd->disk)
3751 goto skip_create_disk; /* hw init done, before rebuild */
3752
3753 if (mtip_hw_init(dd)) {
3754 rv = -EINVAL;
3755 goto protocol_init_error;
3756 }
3757
3758 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3759 if (dd->disk == NULL) {
3760 dev_err(&dd->pdev->dev,
3761 "Unable to allocate gendisk structure\n");
3762 rv = -EINVAL;
3763 goto alloc_disk_error;
3764 }
3765
3766 rv = ida_alloc(&rssd_index_ida, GFP_KERNEL);
3767 if (rv < 0)
3768 goto ida_get_error;
3769 index = rv;
3770
3771 rv = rssd_disk_name_format("rssd",
3772 index,
3773 dd->disk->disk_name,
3774 DISK_NAME_LEN);
3775 if (rv)
3776 goto disk_index_error;
3777
3778 dd->disk->major = dd->major;
3779 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3780 dd->disk->minors = MTIP_MAX_MINORS;
3781 dd->disk->fops = &mtip_block_ops;
3782 dd->disk->private_data = dd;
3783 dd->index = index;
3784
3785 mtip_hw_debugfs_init(dd);
3786
3787 memset(&dd->tags, 0, sizeof(dd->tags));
3788 dd->tags.ops = &mtip_mq_ops;
3789 dd->tags.nr_hw_queues = 1;
3790 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3791 dd->tags.reserved_tags = 1;
3792 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3793 dd->tags.numa_node = dd->numa_node;
3794 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3795 dd->tags.driver_data = dd;
3796 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
3797
3798 rv = blk_mq_alloc_tag_set(&dd->tags);
3799 if (rv) {
3800 dev_err(&dd->pdev->dev,
3801 "Unable to allocate request queue\n");
3802 goto block_queue_alloc_tag_error;
3803 }
3804
3805 /* Allocate the request queue. */
3806 dd->queue = blk_mq_init_queue(&dd->tags);
3807 if (IS_ERR(dd->queue)) {
3808 dev_err(&dd->pdev->dev,
3809 "Unable to allocate request queue\n");
3810 rv = -ENOMEM;
3811 goto block_queue_alloc_init_error;
3812 }
3813
3814 dd->disk->queue = dd->queue;
3815 dd->queue->queuedata = dd;
3816
3817 skip_create_disk:
3818 /* Initialize the protocol layer. */
3819 wait_for_rebuild = mtip_hw_get_identify(dd);
3820 if (wait_for_rebuild < 0) {
3821 dev_err(&dd->pdev->dev,
3822 "Protocol layer initialization failed\n");
3823 rv = -EINVAL;
3824 goto init_hw_cmds_error;
3825 }
3826
3827 /*
3828 * if rebuild pending, start the service thread, and delay the block
3829 * queue creation and device_add_disk()
3830 */
3831 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3832 goto start_service_thread;
3833
3834 /* Set device limits. */
3835 blk_queue_flag_set(QUEUE_FLAG_NONROT, dd->queue);
3836 blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, dd->queue);
3837 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3838 blk_queue_physical_block_size(dd->queue, 4096);
3839 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3840 blk_queue_max_segment_size(dd->queue, 0x400000);
3841 blk_queue_io_min(dd->queue, 4096);
3842
3843 /* Signal trim support */
3844 if (dd->trim_supp == true) {
3845 blk_queue_flag_set(QUEUE_FLAG_DISCARD, dd->queue);
3846 dd->queue->limits.discard_granularity = 4096;
3847 blk_queue_max_discard_sectors(dd->queue,
3848 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
3849 }
3850
3851 /* Set the capacity of the device in 512 byte sectors. */
3852 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3853 dev_warn(&dd->pdev->dev,
3854 "Could not read drive capacity\n");
3855 rv = -EIO;
3856 goto read_capacity_error;
3857 }
3858 set_capacity(dd->disk, capacity);
3859
3860 /* Enable the block device and add it to /dev */
3861 device_add_disk(&dd->pdev->dev, dd->disk, NULL);
3862
3863 dd->bdev = bdget_disk(dd->disk, 0);
3864 /*
3865 * Now that the disk is active, initialize any sysfs attributes
3866 * managed by the protocol layer.
3867 */
3868 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3869 if (kobj) {
3870 mtip_hw_sysfs_init(dd, kobj);
3871 kobject_put(kobj);
3872 }
3873
3874 if (dd->mtip_svc_handler) {
3875 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3876 return rv; /* service thread created for handling rebuild */
3877 }
3878
3879 start_service_thread:
3880 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3881 dd, dd->numa_node,
3882 "mtip_svc_thd_%02d", index);
3883
3884 if (IS_ERR(dd->mtip_svc_handler)) {
3885 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3886 dd->mtip_svc_handler = NULL;
3887 rv = -EFAULT;
3888 goto kthread_run_error;
3889 }
3890 wake_up_process(dd->mtip_svc_handler);
3891 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3892 rv = wait_for_rebuild;
3893
3894 return rv;
3895
3896 kthread_run_error:
3897 bdput(dd->bdev);
3898 dd->bdev = NULL;
3899
3900 /* Delete our gendisk. This also removes the device from /dev */
3901 del_gendisk(dd->disk);
3902
3903 read_capacity_error:
3904 init_hw_cmds_error:
3905 blk_cleanup_queue(dd->queue);
3906 block_queue_alloc_init_error:
3907 blk_mq_free_tag_set(&dd->tags);
3908 block_queue_alloc_tag_error:
3909 mtip_hw_debugfs_exit(dd);
3910 disk_index_error:
3911 ida_free(&rssd_index_ida, index);
3912
3913 ida_get_error:
3914 put_disk(dd->disk);
3915
3916 alloc_disk_error:
3917 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3918
3919 protocol_init_error:
3920 return rv;
3921 }
3922
3923 static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
3924 {
3925 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3926
3927 cmd->status = BLK_STS_IOERR;
3928 blk_mq_complete_request(rq);
3929 }
3930
3931 /*
3932 * Block layer deinitialization function.
3933 *
3934 * Called by the PCI layer as each P320 device is removed.
3935 *
3936 * @dd Pointer to the driver data structure.
3937 *
3938 * return value
3939 * 0
3940 */
3941 static int mtip_block_remove(struct driver_data *dd)
3942 {
3943 struct kobject *kobj;
3944
3945 mtip_hw_debugfs_exit(dd);
3946
3947 if (dd->mtip_svc_handler) {
3948 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3949 wake_up_interruptible(&dd->port->svc_wait);
3950 kthread_stop(dd->mtip_svc_handler);
3951 }
3952
3953 /* Clean up the sysfs attributes, if created */
3954 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3955 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3956 if (kobj) {
3957 mtip_hw_sysfs_exit(dd, kobj);
3958 kobject_put(kobj);
3959 }
3960 }
3961
3962 if (!dd->sr) {
3963 /*
3964 * Explicitly wait here for IOs to quiesce,
3965 * as mtip_standby_drive usually won't wait for IOs.
3966 */
3967 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
3968 mtip_standby_drive(dd);
3969 }
3970 else
3971 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
3972 dd->disk->disk_name);
3973
3974 blk_freeze_queue_start(dd->queue);
3975 blk_mq_quiesce_queue(dd->queue);
3976 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
3977 blk_mq_unquiesce_queue(dd->queue);
3978
3979 /*
3980 * Delete our gendisk structure. This also removes the device
3981 * from /dev
3982 */
3983 if (dd->bdev) {
3984 bdput(dd->bdev);
3985 dd->bdev = NULL;
3986 }
3987 if (dd->disk) {
3988 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3989 del_gendisk(dd->disk);
3990 if (dd->disk->queue) {
3991 blk_cleanup_queue(dd->queue);
3992 blk_mq_free_tag_set(&dd->tags);
3993 dd->queue = NULL;
3994 }
3995 put_disk(dd->disk);
3996 }
3997 dd->disk = NULL;
3998
3999 ida_free(&rssd_index_ida, dd->index);
4000
4001 /* De-initialize the protocol layer. */
4002 mtip_hw_exit(dd);
4003
4004 return 0;
4005 }
4006
4007 /*
4008 * Function called by the PCI layer when just before the
4009 * machine shuts down.
4010 *
4011 * If a protocol layer shutdown function is present it will be called
4012 * by this function.
4013 *
4014 * @dd Pointer to the driver data structure.
4015 *
4016 * return value
4017 * 0
4018 */
4019 static int mtip_block_shutdown(struct driver_data *dd)
4020 {
4021 mtip_hw_shutdown(dd);
4022
4023 /* Delete our gendisk structure, and cleanup the blk queue. */
4024 if (dd->disk) {
4025 dev_info(&dd->pdev->dev,
4026 "Shutting down %s ...\n", dd->disk->disk_name);
4027
4028 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4029 del_gendisk(dd->disk);
4030 if (dd->disk->queue) {
4031 blk_cleanup_queue(dd->queue);
4032 blk_mq_free_tag_set(&dd->tags);
4033 }
4034 put_disk(dd->disk);
4035 dd->disk = NULL;
4036 dd->queue = NULL;
4037 }
4038
4039 ida_free(&rssd_index_ida, dd->index);
4040 return 0;
4041 }
4042
4043 static int mtip_block_suspend(struct driver_data *dd)
4044 {
4045 dev_info(&dd->pdev->dev,
4046 "Suspending %s ...\n", dd->disk->disk_name);
4047 mtip_hw_suspend(dd);
4048 return 0;
4049 }
4050
4051 static int mtip_block_resume(struct driver_data *dd)
4052 {
4053 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4054 dd->disk->disk_name);
4055 mtip_hw_resume(dd);
4056 return 0;
4057 }
4058
4059 static void drop_cpu(int cpu)
4060 {
4061 cpu_use[cpu]--;
4062 }
4063
4064 static int get_least_used_cpu_on_node(int node)
4065 {
4066 int cpu, least_used_cpu, least_cnt;
4067 const struct cpumask *node_mask;
4068
4069 node_mask = cpumask_of_node(node);
4070 least_used_cpu = cpumask_first(node_mask);
4071 least_cnt = cpu_use[least_used_cpu];
4072 cpu = least_used_cpu;
4073
4074 for_each_cpu(cpu, node_mask) {
4075 if (cpu_use[cpu] < least_cnt) {
4076 least_used_cpu = cpu;
4077 least_cnt = cpu_use[cpu];
4078 }
4079 }
4080 cpu_use[least_used_cpu]++;
4081 return least_used_cpu;
4082 }
4083
4084 /* Helper for selecting a node in round robin mode */
4085 static inline int mtip_get_next_rr_node(void)
4086 {
4087 static int next_node = -1;
4088
4089 if (next_node == -1) {
4090 next_node = first_online_node;
4091 return next_node;
4092 }
4093
4094 next_node = next_online_node(next_node);
4095 if (next_node == MAX_NUMNODES)
4096 next_node = first_online_node;
4097 return next_node;
4098 }
4099
4100 static DEFINE_HANDLER(0);
4101 static DEFINE_HANDLER(1);
4102 static DEFINE_HANDLER(2);
4103 static DEFINE_HANDLER(3);
4104 static DEFINE_HANDLER(4);
4105 static DEFINE_HANDLER(5);
4106 static DEFINE_HANDLER(6);
4107 static DEFINE_HANDLER(7);
4108
4109 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4110 {
4111 int pos;
4112 unsigned short pcie_dev_ctrl;
4113
4114 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4115 if (pos) {
4116 pci_read_config_word(pdev,
4117 pos + PCI_EXP_DEVCTL,
4118 &pcie_dev_ctrl);
4119 if (pcie_dev_ctrl & (1 << 11) ||
4120 pcie_dev_ctrl & (1 << 4)) {
4121 dev_info(&dd->pdev->dev,
4122 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4123 pdev->vendor, pdev->device);
4124 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4125 PCI_EXP_DEVCTL_RELAX_EN);
4126 pci_write_config_word(pdev,
4127 pos + PCI_EXP_DEVCTL,
4128 pcie_dev_ctrl);
4129 }
4130 }
4131 }
4132
4133 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4134 {
4135 /*
4136 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4137 * device with device id 0x5aXX
4138 */
4139 if (pdev->bus && pdev->bus->self) {
4140 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4141 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4142 mtip_disable_link_opts(dd, pdev->bus->self);
4143 } else {
4144 /* Check further up the topology */
4145 struct pci_dev *parent_dev = pdev->bus->self;
4146 if (parent_dev->bus &&
4147 parent_dev->bus->parent &&
4148 parent_dev->bus->parent->self &&
4149 parent_dev->bus->parent->self->vendor ==
4150 PCI_VENDOR_ID_ATI &&
4151 (parent_dev->bus->parent->self->device &
4152 0xff00) == 0x5a00) {
4153 mtip_disable_link_opts(dd,
4154 parent_dev->bus->parent->self);
4155 }
4156 }
4157 }
4158 }
4159
4160 /*
4161 * Called for each supported PCI device detected.
4162 *
4163 * This function allocates the private data structure, enables the
4164 * PCI device and then calls the block layer initialization function.
4165 *
4166 * return value
4167 * 0 on success else an error code.
4168 */
4169 static int mtip_pci_probe(struct pci_dev *pdev,
4170 const struct pci_device_id *ent)
4171 {
4172 int rv = 0;
4173 struct driver_data *dd = NULL;
4174 char cpu_list[256];
4175 const struct cpumask *node_mask;
4176 int cpu, i = 0, j = 0;
4177 int my_node = NUMA_NO_NODE;
4178 unsigned long flags;
4179
4180 /* Allocate memory for this devices private data. */
4181 my_node = pcibus_to_node(pdev->bus);
4182 if (my_node != NUMA_NO_NODE) {
4183 if (!node_online(my_node))
4184 my_node = mtip_get_next_rr_node();
4185 } else {
4186 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4187 my_node = mtip_get_next_rr_node();
4188 }
4189 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4190 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4191 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4192
4193 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4194 if (dd == NULL) {
4195 dev_err(&pdev->dev,
4196 "Unable to allocate memory for driver data\n");
4197 return -ENOMEM;
4198 }
4199
4200 /* Attach the private data to this PCI device. */
4201 pci_set_drvdata(pdev, dd);
4202
4203 rv = pcim_enable_device(pdev);
4204 if (rv < 0) {
4205 dev_err(&pdev->dev, "Unable to enable device\n");
4206 goto iomap_err;
4207 }
4208
4209 /* Map BAR5 to memory. */
4210 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4211 if (rv < 0) {
4212 dev_err(&pdev->dev, "Unable to map regions\n");
4213 goto iomap_err;
4214 }
4215
4216 rv = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
4217 if (rv) {
4218 dev_warn(&pdev->dev, "64-bit DMA enable failed\n");
4219 goto setmask_err;
4220 }
4221
4222 /* Copy the info we may need later into the private data structure. */
4223 dd->major = mtip_major;
4224 dd->instance = instance;
4225 dd->pdev = pdev;
4226 dd->numa_node = my_node;
4227
4228 INIT_LIST_HEAD(&dd->online_list);
4229 INIT_LIST_HEAD(&dd->remove_list);
4230
4231 memset(dd->workq_name, 0, 32);
4232 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4233
4234 dd->isr_workq = create_workqueue(dd->workq_name);
4235 if (!dd->isr_workq) {
4236 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4237 rv = -ENOMEM;
4238 goto setmask_err;
4239 }
4240
4241 memset(cpu_list, 0, sizeof(cpu_list));
4242
4243 node_mask = cpumask_of_node(dd->numa_node);
4244 if (!cpumask_empty(node_mask)) {
4245 for_each_cpu(cpu, node_mask)
4246 {
4247 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4248 j = strlen(cpu_list);
4249 }
4250
4251 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4252 dd->numa_node,
4253 topology_physical_package_id(cpumask_first(node_mask)),
4254 nr_cpus_node(dd->numa_node),
4255 cpu_list);
4256 } else
4257 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4258
4259 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4260 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4261 cpu_to_node(dd->isr_binding), dd->isr_binding);
4262
4263 /* first worker context always runs in ISR */
4264 dd->work[0].cpu_binding = dd->isr_binding;
4265 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4266 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4267 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4268 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4269 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4270 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4271 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4272
4273 /* Log the bindings */
4274 for_each_present_cpu(cpu) {
4275 memset(cpu_list, 0, sizeof(cpu_list));
4276 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4277 if (dd->work[i].cpu_binding == cpu) {
4278 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4279 j = strlen(cpu_list);
4280 }
4281 }
4282 if (j)
4283 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4284 }
4285
4286 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4287 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4288 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4289 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4290 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4291 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4292 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4293 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4294
4295 pci_set_master(pdev);
4296 rv = pci_enable_msi(pdev);
4297 if (rv) {
4298 dev_warn(&pdev->dev,
4299 "Unable to enable MSI interrupt.\n");
4300 goto msi_initialize_err;
4301 }
4302
4303 mtip_fix_ero_nosnoop(dd, pdev);
4304
4305 /* Initialize the block layer. */
4306 rv = mtip_block_initialize(dd);
4307 if (rv < 0) {
4308 dev_err(&pdev->dev,
4309 "Unable to initialize block layer\n");
4310 goto block_initialize_err;
4311 }
4312
4313 /*
4314 * Increment the instance count so that each device has a unique
4315 * instance number.
4316 */
4317 instance++;
4318 if (rv != MTIP_FTL_REBUILD_MAGIC)
4319 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4320 else
4321 rv = 0; /* device in rebuild state, return 0 from probe */
4322
4323 /* Add to online list even if in ftl rebuild */
4324 spin_lock_irqsave(&dev_lock, flags);
4325 list_add(&dd->online_list, &online_list);
4326 spin_unlock_irqrestore(&dev_lock, flags);
4327
4328 goto done;
4329
4330 block_initialize_err:
4331 pci_disable_msi(pdev);
4332
4333 msi_initialize_err:
4334 if (dd->isr_workq) {
4335 flush_workqueue(dd->isr_workq);
4336 destroy_workqueue(dd->isr_workq);
4337 drop_cpu(dd->work[0].cpu_binding);
4338 drop_cpu(dd->work[1].cpu_binding);
4339 drop_cpu(dd->work[2].cpu_binding);
4340 }
4341 setmask_err:
4342 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4343
4344 iomap_err:
4345 kfree(dd);
4346 pci_set_drvdata(pdev, NULL);
4347 return rv;
4348 done:
4349 return rv;
4350 }
4351
4352 /*
4353 * Called for each probed device when the device is removed or the
4354 * driver is unloaded.
4355 *
4356 * return value
4357 * None
4358 */
4359 static void mtip_pci_remove(struct pci_dev *pdev)
4360 {
4361 struct driver_data *dd = pci_get_drvdata(pdev);
4362 unsigned long flags, to;
4363
4364 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
4365
4366 spin_lock_irqsave(&dev_lock, flags);
4367 list_del_init(&dd->online_list);
4368 list_add(&dd->remove_list, &removing_list);
4369 spin_unlock_irqrestore(&dev_lock, flags);
4370
4371 mtip_check_surprise_removal(pdev);
4372 synchronize_irq(dd->pdev->irq);
4373
4374 /* Spin until workers are done */
4375 to = jiffies + msecs_to_jiffies(4000);
4376 do {
4377 msleep(20);
4378 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4379 time_before(jiffies, to));
4380
4381 if (!dd->sr)
4382 fsync_bdev(dd->bdev);
4383
4384 if (atomic_read(&dd->irq_workers_active) != 0) {
4385 dev_warn(&dd->pdev->dev,
4386 "Completion workers still active!\n");
4387 }
4388
4389 blk_set_queue_dying(dd->queue);
4390 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4391
4392 /* Clean up the block layer. */
4393 mtip_block_remove(dd);
4394
4395 if (dd->isr_workq) {
4396 flush_workqueue(dd->isr_workq);
4397 destroy_workqueue(dd->isr_workq);
4398 drop_cpu(dd->work[0].cpu_binding);
4399 drop_cpu(dd->work[1].cpu_binding);
4400 drop_cpu(dd->work[2].cpu_binding);
4401 }
4402
4403 pci_disable_msi(pdev);
4404
4405 spin_lock_irqsave(&dev_lock, flags);
4406 list_del_init(&dd->remove_list);
4407 spin_unlock_irqrestore(&dev_lock, flags);
4408
4409 kfree(dd);
4410
4411 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4412 pci_set_drvdata(pdev, NULL);
4413 }
4414
4415 /*
4416 * Called for each probed device when the device is suspended.
4417 *
4418 * return value
4419 * 0 Success
4420 * <0 Error
4421 */
4422 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4423 {
4424 int rv = 0;
4425 struct driver_data *dd = pci_get_drvdata(pdev);
4426
4427 if (!dd) {
4428 dev_err(&pdev->dev,
4429 "Driver private datastructure is NULL\n");
4430 return -EFAULT;
4431 }
4432
4433 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4434
4435 /* Disable ports & interrupts then send standby immediate */
4436 rv = mtip_block_suspend(dd);
4437 if (rv < 0) {
4438 dev_err(&pdev->dev,
4439 "Failed to suspend controller\n");
4440 return rv;
4441 }
4442
4443 /*
4444 * Save the pci config space to pdev structure &
4445 * disable the device
4446 */
4447 pci_save_state(pdev);
4448 pci_disable_device(pdev);
4449
4450 /* Move to Low power state*/
4451 pci_set_power_state(pdev, PCI_D3hot);
4452
4453 return rv;
4454 }
4455
4456 /*
4457 * Called for each probed device when the device is resumed.
4458 *
4459 * return value
4460 * 0 Success
4461 * <0 Error
4462 */
4463 static int mtip_pci_resume(struct pci_dev *pdev)
4464 {
4465 int rv = 0;
4466 struct driver_data *dd;
4467
4468 dd = pci_get_drvdata(pdev);
4469 if (!dd) {
4470 dev_err(&pdev->dev,
4471 "Driver private datastructure is NULL\n");
4472 return -EFAULT;
4473 }
4474
4475 /* Move the device to active State */
4476 pci_set_power_state(pdev, PCI_D0);
4477
4478 /* Restore PCI configuration space */
4479 pci_restore_state(pdev);
4480
4481 /* Enable the PCI device*/
4482 rv = pcim_enable_device(pdev);
4483 if (rv < 0) {
4484 dev_err(&pdev->dev,
4485 "Failed to enable card during resume\n");
4486 goto err;
4487 }
4488 pci_set_master(pdev);
4489
4490 /*
4491 * Calls hbaReset, initPort, & startPort function
4492 * then enables interrupts
4493 */
4494 rv = mtip_block_resume(dd);
4495 if (rv < 0)
4496 dev_err(&pdev->dev, "Unable to resume\n");
4497
4498 err:
4499 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4500
4501 return rv;
4502 }
4503
4504 /*
4505 * Shutdown routine
4506 *
4507 * return value
4508 * None
4509 */
4510 static void mtip_pci_shutdown(struct pci_dev *pdev)
4511 {
4512 struct driver_data *dd = pci_get_drvdata(pdev);
4513 if (dd)
4514 mtip_block_shutdown(dd);
4515 }
4516
4517 /* Table of device ids supported by this driver. */
4518 static const struct pci_device_id mtip_pci_tbl[] = {
4519 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4520 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4521 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4522 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4523 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4524 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4525 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4526 { 0 }
4527 };
4528
4529 /* Structure that describes the PCI driver functions. */
4530 static struct pci_driver mtip_pci_driver = {
4531 .name = MTIP_DRV_NAME,
4532 .id_table = mtip_pci_tbl,
4533 .probe = mtip_pci_probe,
4534 .remove = mtip_pci_remove,
4535 .suspend = mtip_pci_suspend,
4536 .resume = mtip_pci_resume,
4537 .shutdown = mtip_pci_shutdown,
4538 };
4539
4540 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4541
4542 /*
4543 * Module initialization function.
4544 *
4545 * Called once when the module is loaded. This function allocates a major
4546 * block device number to the Cyclone devices and registers the PCI layer
4547 * of the driver.
4548 *
4549 * Return value
4550 * 0 on success else error code.
4551 */
4552 static int __init mtip_init(void)
4553 {
4554 int error;
4555
4556 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4557
4558 spin_lock_init(&dev_lock);
4559
4560 INIT_LIST_HEAD(&online_list);
4561 INIT_LIST_HEAD(&removing_list);
4562
4563 /* Allocate a major block device number to use with this driver. */
4564 error = register_blkdev(0, MTIP_DRV_NAME);
4565 if (error <= 0) {
4566 pr_err("Unable to register block device (%d)\n",
4567 error);
4568 return -EBUSY;
4569 }
4570 mtip_major = error;
4571
4572 dfs_parent = debugfs_create_dir("rssd", NULL);
4573 if (IS_ERR_OR_NULL(dfs_parent)) {
4574 pr_warn("Error creating debugfs parent\n");
4575 dfs_parent = NULL;
4576 }
4577 if (dfs_parent) {
4578 dfs_device_status = debugfs_create_file("device_status",
4579 0444, dfs_parent, NULL,
4580 &mtip_device_status_fops);
4581 if (IS_ERR_OR_NULL(dfs_device_status)) {
4582 pr_err("Error creating device_status node\n");
4583 dfs_device_status = NULL;
4584 }
4585 }
4586
4587 /* Register our PCI operations. */
4588 error = pci_register_driver(&mtip_pci_driver);
4589 if (error) {
4590 debugfs_remove(dfs_parent);
4591 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4592 }
4593
4594 return error;
4595 }
4596
4597 /*
4598 * Module de-initialization function.
4599 *
4600 * Called once when the module is unloaded. This function deallocates
4601 * the major block device number allocated by mtip_init() and
4602 * unregisters the PCI layer of the driver.
4603 *
4604 * Return value
4605 * none
4606 */
4607 static void __exit mtip_exit(void)
4608 {
4609 /* Release the allocated major block device number. */
4610 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4611
4612 /* Unregister the PCI driver. */
4613 pci_unregister_driver(&mtip_pci_driver);
4614
4615 debugfs_remove_recursive(dfs_parent);
4616 }
4617
4618 MODULE_AUTHOR("Micron Technology, Inc");
4619 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4620 MODULE_LICENSE("GPL");
4621 MODULE_VERSION(MTIP_DRV_VERSION);
4622
4623 module_init(mtip_init);
4624 module_exit(mtip_exit);
Linux with added FPC-III support