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perf tools: Don't clone maps from parent when synthesizing forks
[linux/fpc-iii.git] / drivers / media / pci / cx23885 / cx23885-cards.c
blobed3210dc50bc2cf43685cddd931d79cd6964a5f9
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 */
17
18 #include "cx23885.h"
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/delay.h>
24 #include <media/drv-intf/cx25840.h>
25 #include <linux/firmware.h>
26 #include <misc/altera.h>
27
28 #include "tuner-xc2028.h"
29 #include "netup-eeprom.h"
30 #include "netup-init.h"
31 #include "altera-ci.h"
32 #include "xc4000.h"
33 #include "xc5000.h"
34 #include "cx23888-ir.h"
35
36 static unsigned int netup_card_rev = 4;
37 module_param(netup_card_rev, int, 0644);
38 MODULE_PARM_DESC(netup_card_rev,
39 "NetUP Dual DVB-T/C CI card revision");
40 static unsigned int enable_885_ir;
41 module_param(enable_885_ir, int, 0644);
42 MODULE_PARM_DESC(enable_885_ir,
43 "Enable integrated IR controller for supported\n"
44 "\t\t CX2388[57] boards that are wired for it:\n"
45 "\t\t\tHVR-1250 (reported safe)\n"
46 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
47 "\t\t\tTeVii S470 (reported unsafe)\n"
48 "\t\t This can cause an interrupt storm with some cards.\n"
49 "\t\t Default: 0 [Disabled]");
50
51 /* ------------------------------------------------------------------ */
52 /* board config info */
53
54 struct cx23885_board cx23885_boards[] = {
55 [CX23885_BOARD_UNKNOWN] = {
56 .name = "UNKNOWN/GENERIC",
57 /* Ensure safe default for unknown boards */
58 .clk_freq = 0,
59 .input = {{
60 .type = CX23885_VMUX_COMPOSITE1,
61 .vmux = 0,
62 }, {
63 .type = CX23885_VMUX_COMPOSITE2,
64 .vmux = 1,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE3,
67 .vmux = 2,
68 }, {
69 .type = CX23885_VMUX_COMPOSITE4,
70 .vmux = 3,
71 } },
72 },
73 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
74 .name = "Hauppauge WinTV-HVR1800lp",
75 .portc = CX23885_MPEG_DVB,
76 .input = {{
77 .type = CX23885_VMUX_TELEVISION,
78 .vmux = 0,
79 .gpio0 = 0xff00,
80 }, {
81 .type = CX23885_VMUX_DEBUG,
82 .vmux = 0,
83 .gpio0 = 0xff01,
84 }, {
85 .type = CX23885_VMUX_COMPOSITE1,
86 .vmux = 1,
87 .gpio0 = 0xff02,
88 }, {
89 .type = CX23885_VMUX_SVIDEO,
90 .vmux = 2,
91 .gpio0 = 0xff02,
92 } },
93 },
94 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
95 .name = "Hauppauge WinTV-HVR1800",
96 .porta = CX23885_ANALOG_VIDEO,
97 .portb = CX23885_MPEG_ENCODER,
98 .portc = CX23885_MPEG_DVB,
99 .tuner_type = TUNER_PHILIPS_TDA8290,
100 .tuner_addr = 0x42, /* 0x84 >> 1 */
101 .tuner_bus = 1,
102 .input = {{
103 .type = CX23885_VMUX_TELEVISION,
104 .vmux = CX25840_VIN7_CH3 |
105 CX25840_VIN5_CH2 |
106 CX25840_VIN2_CH1,
107 .amux = CX25840_AUDIO8,
108 .gpio0 = 0,
109 }, {
110 .type = CX23885_VMUX_COMPOSITE1,
111 .vmux = CX25840_VIN7_CH3 |
112 CX25840_VIN4_CH2 |
113 CX25840_VIN6_CH1,
114 .amux = CX25840_AUDIO7,
115 .gpio0 = 0,
116 }, {
117 .type = CX23885_VMUX_SVIDEO,
118 .vmux = CX25840_VIN7_CH3 |
119 CX25840_VIN4_CH2 |
120 CX25840_VIN8_CH1 |
121 CX25840_SVIDEO_ON,
122 .amux = CX25840_AUDIO7,
123 .gpio0 = 0,
124 } },
125 },
126 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
127 .name = "Hauppauge WinTV-HVR1250",
128 .porta = CX23885_ANALOG_VIDEO,
129 .portc = CX23885_MPEG_DVB,
130 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
131 .tuner_type = TUNER_PHILIPS_TDA8290,
132 .tuner_addr = 0x42, /* 0x84 >> 1 */
133 .tuner_bus = 1,
134 #endif
135 .force_bff = 1,
136 .input = {{
137 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
138 .type = CX23885_VMUX_TELEVISION,
139 .vmux = CX25840_VIN7_CH3 |
140 CX25840_VIN5_CH2 |
141 CX25840_VIN2_CH1,
142 .amux = CX25840_AUDIO8,
143 .gpio0 = 0xff00,
144 }, {
145 #endif
146 .type = CX23885_VMUX_COMPOSITE1,
147 .vmux = CX25840_VIN7_CH3 |
148 CX25840_VIN4_CH2 |
149 CX25840_VIN6_CH1,
150 .amux = CX25840_AUDIO7,
151 .gpio0 = 0xff02,
152 }, {
153 .type = CX23885_VMUX_SVIDEO,
154 .vmux = CX25840_VIN7_CH3 |
155 CX25840_VIN4_CH2 |
156 CX25840_VIN8_CH1 |
157 CX25840_SVIDEO_ON,
158 .amux = CX25840_AUDIO7,
159 .gpio0 = 0xff02,
160 } },
161 },
162 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
163 .name = "DViCO FusionHDTV5 Express",
164 .portb = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
167 .name = "Hauppauge WinTV-HVR1500Q",
168 .portc = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
171 .name = "Hauppauge WinTV-HVR1500",
172 .porta = CX23885_ANALOG_VIDEO,
173 .portc = CX23885_MPEG_DVB,
174 .tuner_type = TUNER_XC2028,
175 .tuner_addr = 0x61, /* 0xc2 >> 1 */
176 .input = {{
177 .type = CX23885_VMUX_TELEVISION,
178 .vmux = CX25840_VIN7_CH3 |
179 CX25840_VIN5_CH2 |
180 CX25840_VIN2_CH1,
181 .gpio0 = 0,
182 }, {
183 .type = CX23885_VMUX_COMPOSITE1,
184 .vmux = CX25840_VIN7_CH3 |
185 CX25840_VIN4_CH2 |
186 CX25840_VIN6_CH1,
187 .gpio0 = 0,
188 }, {
189 .type = CX23885_VMUX_SVIDEO,
190 .vmux = CX25840_VIN7_CH3 |
191 CX25840_VIN4_CH2 |
192 CX25840_VIN8_CH1 |
193 CX25840_SVIDEO_ON,
194 .gpio0 = 0,
195 } },
196 },
197 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
198 .name = "Hauppauge WinTV-HVR1200",
199 .portc = CX23885_MPEG_DVB,
200 },
201 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
202 .name = "Hauppauge WinTV-HVR1700",
203 .portc = CX23885_MPEG_DVB,
204 },
205 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
206 .name = "Hauppauge WinTV-HVR1400",
207 .portc = CX23885_MPEG_DVB,
208 },
209 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
210 .name = "DViCO FusionHDTV7 Dual Express",
211 .portb = CX23885_MPEG_DVB,
212 .portc = CX23885_MPEG_DVB,
213 },
214 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
215 .name = "DViCO FusionHDTV DVB-T Dual Express",
216 .portb = CX23885_MPEG_DVB,
217 .portc = CX23885_MPEG_DVB,
218 },
219 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
220 .name = "Leadtek Winfast PxDVR3200 H",
221 .portc = CX23885_MPEG_DVB,
222 },
223 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
224 .name = "Leadtek Winfast PxPVR2200",
225 .porta = CX23885_ANALOG_VIDEO,
226 .tuner_type = TUNER_XC2028,
227 .tuner_addr = 0x61,
228 .tuner_bus = 1,
229 .input = {{
230 .type = CX23885_VMUX_TELEVISION,
231 .vmux = CX25840_VIN2_CH1 |
232 CX25840_VIN5_CH2,
233 .amux = CX25840_AUDIO8,
234 .gpio0 = 0x704040,
235 }, {
236 .type = CX23885_VMUX_COMPOSITE1,
237 .vmux = CX25840_COMPOSITE1,
238 .amux = CX25840_AUDIO7,
239 .gpio0 = 0x704040,
240 }, {
241 .type = CX23885_VMUX_SVIDEO,
242 .vmux = CX25840_SVIDEO_LUMA3 |
243 CX25840_SVIDEO_CHROMA4,
244 .amux = CX25840_AUDIO7,
245 .gpio0 = 0x704040,
246 }, {
247 .type = CX23885_VMUX_COMPONENT,
248 .vmux = CX25840_VIN7_CH1 |
249 CX25840_VIN6_CH2 |
250 CX25840_VIN8_CH3 |
251 CX25840_COMPONENT_ON,
252 .amux = CX25840_AUDIO7,
253 .gpio0 = 0x704040,
254 } },
255 },
256 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
257 .name = "Leadtek Winfast PxDVR3200 H XC4000",
258 .porta = CX23885_ANALOG_VIDEO,
259 .portc = CX23885_MPEG_DVB,
260 .tuner_type = TUNER_XC4000,
261 .tuner_addr = 0x61,
262 .radio_type = UNSET,
263 .radio_addr = ADDR_UNSET,
264 .input = {{
265 .type = CX23885_VMUX_TELEVISION,
266 .vmux = CX25840_VIN2_CH1 |
267 CX25840_VIN5_CH2 |
268 CX25840_NONE0_CH3,
269 }, {
270 .type = CX23885_VMUX_COMPOSITE1,
271 .vmux = CX25840_COMPOSITE1,
272 }, {
273 .type = CX23885_VMUX_SVIDEO,
274 .vmux = CX25840_SVIDEO_LUMA3 |
275 CX25840_SVIDEO_CHROMA4,
276 }, {
277 .type = CX23885_VMUX_COMPONENT,
278 .vmux = CX25840_VIN7_CH1 |
279 CX25840_VIN6_CH2 |
280 CX25840_VIN8_CH3 |
281 CX25840_COMPONENT_ON,
282 } },
283 },
284 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
285 .name = "Compro VideoMate E650F",
286 .portc = CX23885_MPEG_DVB,
287 },
288 [CX23885_BOARD_TBS_6920] = {
289 .name = "TurboSight TBS 6920",
290 .portb = CX23885_MPEG_DVB,
291 },
292 [CX23885_BOARD_TBS_6980] = {
293 .name = "TurboSight TBS 6980",
294 .portb = CX23885_MPEG_DVB,
295 .portc = CX23885_MPEG_DVB,
296 },
297 [CX23885_BOARD_TBS_6981] = {
298 .name = "TurboSight TBS 6981",
299 .portb = CX23885_MPEG_DVB,
300 .portc = CX23885_MPEG_DVB,
301 },
302 [CX23885_BOARD_TEVII_S470] = {
303 .name = "TeVii S470",
304 .portb = CX23885_MPEG_DVB,
305 },
306 [CX23885_BOARD_DVBWORLD_2005] = {
307 .name = "DVBWorld DVB-S2 2005",
308 .portb = CX23885_MPEG_DVB,
309 },
310 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
311 .ci_type = 1,
312 .name = "NetUP Dual DVB-S2 CI",
313 .portb = CX23885_MPEG_DVB,
314 .portc = CX23885_MPEG_DVB,
315 },
316 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
317 .name = "Hauppauge WinTV-HVR1270",
318 .portc = CX23885_MPEG_DVB,
319 },
320 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
321 .name = "Hauppauge WinTV-HVR1275",
322 .portc = CX23885_MPEG_DVB,
323 },
324 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
325 .name = "Hauppauge WinTV-HVR1255",
326 .porta = CX23885_ANALOG_VIDEO,
327 .portc = CX23885_MPEG_DVB,
328 .tuner_type = TUNER_ABSENT,
329 .tuner_addr = 0x42, /* 0x84 >> 1 */
330 .force_bff = 1,
331 .input = {{
332 .type = CX23885_VMUX_TELEVISION,
333 .vmux = CX25840_VIN7_CH3 |
334 CX25840_VIN5_CH2 |
335 CX25840_VIN2_CH1 |
336 CX25840_DIF_ON,
337 .amux = CX25840_AUDIO8,
338 }, {
339 .type = CX23885_VMUX_COMPOSITE1,
340 .vmux = CX25840_VIN7_CH3 |
341 CX25840_VIN4_CH2 |
342 CX25840_VIN6_CH1,
343 .amux = CX25840_AUDIO7,
344 }, {
345 .type = CX23885_VMUX_SVIDEO,
346 .vmux = CX25840_VIN7_CH3 |
347 CX25840_VIN4_CH2 |
348 CX25840_VIN8_CH1 |
349 CX25840_SVIDEO_ON,
350 .amux = CX25840_AUDIO7,
351 } },
352 },
353 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
354 .name = "Hauppauge WinTV-HVR1255",
355 .porta = CX23885_ANALOG_VIDEO,
356 .portc = CX23885_MPEG_DVB,
357 .tuner_type = TUNER_ABSENT,
358 .tuner_addr = 0x42, /* 0x84 >> 1 */
359 .force_bff = 1,
360 .input = {{
361 .type = CX23885_VMUX_TELEVISION,
362 .vmux = CX25840_VIN7_CH3 |
363 CX25840_VIN5_CH2 |
364 CX25840_VIN2_CH1 |
365 CX25840_DIF_ON,
366 .amux = CX25840_AUDIO8,
367 }, {
368 .type = CX23885_VMUX_SVIDEO,
369 .vmux = CX25840_VIN7_CH3 |
370 CX25840_VIN4_CH2 |
371 CX25840_VIN8_CH1 |
372 CX25840_SVIDEO_ON,
373 .amux = CX25840_AUDIO7,
374 } },
375 },
376 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
377 .name = "Hauppauge WinTV-HVR1210",
378 .portc = CX23885_MPEG_DVB,
379 },
380 [CX23885_BOARD_MYGICA_X8506] = {
381 .name = "Mygica X8506 DMB-TH",
382 .tuner_type = TUNER_XC5000,
383 .tuner_addr = 0x61,
384 .tuner_bus = 1,
385 .porta = CX23885_ANALOG_VIDEO,
386 .portb = CX23885_MPEG_DVB,
387 .input = {
388 {
389 .type = CX23885_VMUX_TELEVISION,
390 .vmux = CX25840_COMPOSITE2,
391 },
392 {
393 .type = CX23885_VMUX_COMPOSITE1,
394 .vmux = CX25840_COMPOSITE8,
395 },
396 {
397 .type = CX23885_VMUX_SVIDEO,
398 .vmux = CX25840_SVIDEO_LUMA3 |
399 CX25840_SVIDEO_CHROMA4,
400 },
401 {
402 .type = CX23885_VMUX_COMPONENT,
403 .vmux = CX25840_COMPONENT_ON |
404 CX25840_VIN1_CH1 |
405 CX25840_VIN6_CH2 |
406 CX25840_VIN7_CH3,
407 },
408 },
409 },
410 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
411 .name = "Magic-Pro ProHDTV Extreme 2",
412 .tuner_type = TUNER_XC5000,
413 .tuner_addr = 0x61,
414 .tuner_bus = 1,
415 .porta = CX23885_ANALOG_VIDEO,
416 .portb = CX23885_MPEG_DVB,
417 .input = {
418 {
419 .type = CX23885_VMUX_TELEVISION,
420 .vmux = CX25840_COMPOSITE2,
421 },
422 {
423 .type = CX23885_VMUX_COMPOSITE1,
424 .vmux = CX25840_COMPOSITE8,
425 },
426 {
427 .type = CX23885_VMUX_SVIDEO,
428 .vmux = CX25840_SVIDEO_LUMA3 |
429 CX25840_SVIDEO_CHROMA4,
430 },
431 {
432 .type = CX23885_VMUX_COMPONENT,
433 .vmux = CX25840_COMPONENT_ON |
434 CX25840_VIN1_CH1 |
435 CX25840_VIN6_CH2 |
436 CX25840_VIN7_CH3,
437 },
438 },
439 },
440 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
441 .name = "Hauppauge WinTV-HVR1850",
442 .porta = CX23885_ANALOG_VIDEO,
443 .portb = CX23885_MPEG_ENCODER,
444 .portc = CX23885_MPEG_DVB,
445 .tuner_type = TUNER_ABSENT,
446 .tuner_addr = 0x42, /* 0x84 >> 1 */
447 .force_bff = 1,
448 .input = {{
449 .type = CX23885_VMUX_TELEVISION,
450 .vmux = CX25840_VIN7_CH3 |
451 CX25840_VIN5_CH2 |
452 CX25840_VIN2_CH1 |
453 CX25840_DIF_ON,
454 .amux = CX25840_AUDIO8,
455 }, {
456 .type = CX23885_VMUX_COMPOSITE1,
457 .vmux = CX25840_VIN7_CH3 |
458 CX25840_VIN4_CH2 |
459 CX25840_VIN6_CH1,
460 .amux = CX25840_AUDIO7,
461 }, {
462 .type = CX23885_VMUX_SVIDEO,
463 .vmux = CX25840_VIN7_CH3 |
464 CX25840_VIN4_CH2 |
465 CX25840_VIN8_CH1 |
466 CX25840_SVIDEO_ON,
467 .amux = CX25840_AUDIO7,
468 } },
469 },
470 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
471 .name = "Compro VideoMate E800",
472 .portc = CX23885_MPEG_DVB,
473 },
474 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
475 .name = "Hauppauge WinTV-HVR1290",
476 .portc = CX23885_MPEG_DVB,
477 },
478 [CX23885_BOARD_MYGICA_X8558PRO] = {
479 .name = "Mygica X8558 PRO DMB-TH",
480 .portb = CX23885_MPEG_DVB,
481 .portc = CX23885_MPEG_DVB,
482 },
483 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
484 .name = "LEADTEK WinFast PxTV1200",
485 .porta = CX23885_ANALOG_VIDEO,
486 .tuner_type = TUNER_XC2028,
487 .tuner_addr = 0x61,
488 .tuner_bus = 1,
489 .input = {{
490 .type = CX23885_VMUX_TELEVISION,
491 .vmux = CX25840_VIN2_CH1 |
492 CX25840_VIN5_CH2 |
493 CX25840_NONE0_CH3,
494 }, {
495 .type = CX23885_VMUX_COMPOSITE1,
496 .vmux = CX25840_COMPOSITE1,
497 }, {
498 .type = CX23885_VMUX_SVIDEO,
499 .vmux = CX25840_SVIDEO_LUMA3 |
500 CX25840_SVIDEO_CHROMA4,
501 }, {
502 .type = CX23885_VMUX_COMPONENT,
503 .vmux = CX25840_VIN7_CH1 |
504 CX25840_VIN6_CH2 |
505 CX25840_VIN8_CH3 |
506 CX25840_COMPONENT_ON,
507 } },
508 },
509 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
510 .name = "GoTView X5 3D Hybrid",
511 .tuner_type = TUNER_XC5000,
512 .tuner_addr = 0x64,
513 .tuner_bus = 1,
514 .porta = CX23885_ANALOG_VIDEO,
515 .portb = CX23885_MPEG_DVB,
516 .input = {{
517 .type = CX23885_VMUX_TELEVISION,
518 .vmux = CX25840_VIN2_CH1 |
519 CX25840_VIN5_CH2,
520 .gpio0 = 0x02,
521 }, {
522 .type = CX23885_VMUX_COMPOSITE1,
523 .vmux = CX23885_VMUX_COMPOSITE1,
524 }, {
525 .type = CX23885_VMUX_SVIDEO,
526 .vmux = CX25840_SVIDEO_LUMA3 |
527 CX25840_SVIDEO_CHROMA4,
528 } },
529 },
530 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
531 .ci_type = 2,
532 .name = "NetUP Dual DVB-T/C-CI RF",
533 .porta = CX23885_ANALOG_VIDEO,
534 .portb = CX23885_MPEG_DVB,
535 .portc = CX23885_MPEG_DVB,
536 .num_fds_portb = 2,
537 .num_fds_portc = 2,
538 .tuner_type = TUNER_XC5000,
539 .tuner_addr = 0x64,
540 .input = { {
541 .type = CX23885_VMUX_TELEVISION,
542 .vmux = CX25840_COMPOSITE1,
543 } },
544 },
545 [CX23885_BOARD_MPX885] = {
546 .name = "MPX-885",
547 .porta = CX23885_ANALOG_VIDEO,
548 .input = {{
549 .type = CX23885_VMUX_COMPOSITE1,
550 .vmux = CX25840_COMPOSITE1,
551 .amux = CX25840_AUDIO6,
552 .gpio0 = 0,
553 }, {
554 .type = CX23885_VMUX_COMPOSITE2,
555 .vmux = CX25840_COMPOSITE2,
556 .amux = CX25840_AUDIO6,
557 .gpio0 = 0,
558 }, {
559 .type = CX23885_VMUX_COMPOSITE3,
560 .vmux = CX25840_COMPOSITE3,
561 .amux = CX25840_AUDIO7,
562 .gpio0 = 0,
563 }, {
564 .type = CX23885_VMUX_COMPOSITE4,
565 .vmux = CX25840_COMPOSITE4,
566 .amux = CX25840_AUDIO7,
567 .gpio0 = 0,
568 } },
569 },
570 [CX23885_BOARD_MYGICA_X8507] = {
571 .name = "Mygica X8502/X8507 ISDB-T",
572 .tuner_type = TUNER_XC5000,
573 .tuner_addr = 0x61,
574 .tuner_bus = 1,
575 .porta = CX23885_ANALOG_VIDEO,
576 .portb = CX23885_MPEG_DVB,
577 .input = {
578 {
579 .type = CX23885_VMUX_TELEVISION,
580 .vmux = CX25840_COMPOSITE2,
581 .amux = CX25840_AUDIO8,
582 },
583 {
584 .type = CX23885_VMUX_COMPOSITE1,
585 .vmux = CX25840_COMPOSITE8,
586 .amux = CX25840_AUDIO7,
587 },
588 {
589 .type = CX23885_VMUX_SVIDEO,
590 .vmux = CX25840_SVIDEO_LUMA3 |
591 CX25840_SVIDEO_CHROMA4,
592 .amux = CX25840_AUDIO7,
593 },
594 {
595 .type = CX23885_VMUX_COMPONENT,
596 .vmux = CX25840_COMPONENT_ON |
597 CX25840_VIN1_CH1 |
598 CX25840_VIN6_CH2 |
599 CX25840_VIN7_CH3,
600 .amux = CX25840_AUDIO7,
601 },
602 },
603 },
604 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
605 .name = "TerraTec Cinergy T PCIe Dual",
606 .portb = CX23885_MPEG_DVB,
607 .portc = CX23885_MPEG_DVB,
608 },
609 [CX23885_BOARD_TEVII_S471] = {
610 .name = "TeVii S471",
611 .portb = CX23885_MPEG_DVB,
612 },
613 [CX23885_BOARD_PROF_8000] = {
614 .name = "Prof Revolution DVB-S2 8000",
615 .portb = CX23885_MPEG_DVB,
616 },
617 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
618 .name = "Hauppauge WinTV-HVR4400/HVR5500",
619 .porta = CX23885_ANALOG_VIDEO,
620 .portb = CX23885_MPEG_DVB,
621 .portc = CX23885_MPEG_DVB,
622 .tuner_type = TUNER_NXP_TDA18271,
623 .tuner_addr = 0x60, /* 0xc0 >> 1 */
624 .tuner_bus = 1,
625 },
626 [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
627 .name = "Hauppauge WinTV Starburst",
628 .portb = CX23885_MPEG_DVB,
629 },
630 [CX23885_BOARD_AVERMEDIA_HC81R] = {
631 .name = "AVerTV Hybrid Express Slim HC81R",
632 .tuner_type = TUNER_XC2028,
633 .tuner_addr = 0x61, /* 0xc2 >> 1 */
634 .tuner_bus = 1,
635 .porta = CX23885_ANALOG_VIDEO,
636 .input = {{
637 .type = CX23885_VMUX_TELEVISION,
638 .vmux = CX25840_VIN2_CH1 |
639 CX25840_VIN5_CH2 |
640 CX25840_NONE0_CH3 |
641 CX25840_NONE1_CH3,
642 .amux = CX25840_AUDIO8,
643 }, {
644 .type = CX23885_VMUX_SVIDEO,
645 .vmux = CX25840_VIN8_CH1 |
646 CX25840_NONE_CH2 |
647 CX25840_VIN7_CH3 |
648 CX25840_SVIDEO_ON,
649 .amux = CX25840_AUDIO6,
650 }, {
651 .type = CX23885_VMUX_COMPONENT,
652 .vmux = CX25840_VIN1_CH1 |
653 CX25840_NONE_CH2 |
654 CX25840_NONE0_CH3 |
655 CX25840_NONE1_CH3,
656 .amux = CX25840_AUDIO6,
657 } },
658 },
659 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
660 .name = "DViCO FusionHDTV DVB-T Dual Express2",
661 .portb = CX23885_MPEG_DVB,
662 .portc = CX23885_MPEG_DVB,
663 },
664 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
665 .name = "Hauppauge ImpactVCB-e",
666 .tuner_type = TUNER_ABSENT,
667 .porta = CX23885_ANALOG_VIDEO,
668 .input = {{
669 .type = CX23885_VMUX_COMPOSITE1,
670 .vmux = CX25840_VIN7_CH3 |
671 CX25840_VIN4_CH2 |
672 CX25840_VIN6_CH1,
673 .amux = CX25840_AUDIO7,
674 }, {
675 .type = CX23885_VMUX_SVIDEO,
676 .vmux = CX25840_VIN7_CH3 |
677 CX25840_VIN4_CH2 |
678 CX25840_VIN8_CH1 |
679 CX25840_SVIDEO_ON,
680 .amux = CX25840_AUDIO7,
681 } },
682 },
683 [CX23885_BOARD_DVBSKY_T9580] = {
684 .name = "DVBSky T9580",
685 .portb = CX23885_MPEG_DVB,
686 .portc = CX23885_MPEG_DVB,
687 },
688 [CX23885_BOARD_DVBSKY_T980C] = {
689 .name = "DVBSky T980C",
690 .portb = CX23885_MPEG_DVB,
691 },
692 [CX23885_BOARD_DVBSKY_S950C] = {
693 .name = "DVBSky S950C",
694 .portb = CX23885_MPEG_DVB,
695 },
696 [CX23885_BOARD_TT_CT2_4500_CI] = {
697 .name = "Technotrend TT-budget CT2-4500 CI",
698 .portb = CX23885_MPEG_DVB,
699 },
700 [CX23885_BOARD_DVBSKY_S950] = {
701 .name = "DVBSky S950",
702 .portb = CX23885_MPEG_DVB,
703 },
704 [CX23885_BOARD_DVBSKY_S952] = {
705 .name = "DVBSky S952",
706 .portb = CX23885_MPEG_DVB,
707 .portc = CX23885_MPEG_DVB,
708 },
709 [CX23885_BOARD_DVBSKY_T982] = {
710 .name = "DVBSky T982",
711 .portb = CX23885_MPEG_DVB,
712 .portc = CX23885_MPEG_DVB,
713 },
714 [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
715 .name = "Hauppauge WinTV-HVR5525",
716 .portb = CX23885_MPEG_DVB,
717 .portc = CX23885_MPEG_DVB,
718 },
719 [CX23885_BOARD_VIEWCAST_260E] = {
720 .name = "ViewCast 260e",
721 .porta = CX23885_ANALOG_VIDEO,
722 .force_bff = 1,
723 .input = {{
724 .type = CX23885_VMUX_COMPOSITE1,
725 .vmux = CX25840_VIN6_CH1,
726 .amux = CX25840_AUDIO7,
727 }, {
728 .type = CX23885_VMUX_SVIDEO,
729 .vmux = CX25840_VIN7_CH3 |
730 CX25840_VIN5_CH1 |
731 CX25840_SVIDEO_ON,
732 .amux = CX25840_AUDIO7,
733 }, {
734 .type = CX23885_VMUX_COMPONENT,
735 .vmux = CX25840_VIN7_CH3 |
736 CX25840_VIN6_CH2 |
737 CX25840_VIN5_CH1 |
738 CX25840_COMPONENT_ON,
739 .amux = CX25840_AUDIO7,
740 } },
741 },
742 [CX23885_BOARD_VIEWCAST_460E] = {
743 .name = "ViewCast 460e",
744 .porta = CX23885_ANALOG_VIDEO,
745 .force_bff = 1,
746 .input = {{
747 .type = CX23885_VMUX_COMPOSITE1,
748 .vmux = CX25840_VIN4_CH1,
749 .amux = CX25840_AUDIO7,
750 }, {
751 .type = CX23885_VMUX_SVIDEO,
752 .vmux = CX25840_VIN7_CH3 |
753 CX25840_VIN6_CH1 |
754 CX25840_SVIDEO_ON,
755 .amux = CX25840_AUDIO7,
756 }, {
757 .type = CX23885_VMUX_COMPONENT,
758 .vmux = CX25840_VIN7_CH3 |
759 CX25840_VIN6_CH1 |
760 CX25840_VIN5_CH2 |
761 CX25840_COMPONENT_ON,
762 .amux = CX25840_AUDIO7,
763 }, {
764 .type = CX23885_VMUX_COMPOSITE2,
765 .vmux = CX25840_VIN6_CH1,
766 .amux = CX25840_AUDIO7,
767 } },
768 },
769 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
770 .name = "Hauppauge WinTV-QuadHD-DVB",
771 .portb = CX23885_MPEG_DVB,
772 .portc = CX23885_MPEG_DVB,
773 },
774 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
775 .name = "Hauppauge WinTV-QuadHD-DVB(885)",
776 .portb = CX23885_MPEG_DVB,
777 .portc = CX23885_MPEG_DVB,
778 },
779 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
780 .name = "Hauppauge WinTV-QuadHD-ATSC",
781 .portb = CX23885_MPEG_DVB,
782 .portc = CX23885_MPEG_DVB,
783 },
784 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
785 .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
786 .portb = CX23885_MPEG_DVB,
787 .portc = CX23885_MPEG_DVB,
788 },
789 [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
790 .name = "Hauppauge WinTV-HVR-1265(161111)",
791 .porta = CX23885_ANALOG_VIDEO,
792 .portc = CX23885_MPEG_DVB,
793 .tuner_type = TUNER_ABSENT,
794 .force_bff = 1,
795 .input = {{
796 .type = CX23885_VMUX_COMPOSITE1,
797 .vmux = CX25840_VIN7_CH3 |
798 CX25840_VIN4_CH2 |
799 CX25840_VIN6_CH1,
800 .amux = CX25840_AUDIO7,
801 }, {
802 .type = CX23885_VMUX_SVIDEO,
803 .vmux = CX25840_VIN7_CH3 |
804 CX25840_VIN4_CH2 |
805 CX25840_VIN8_CH1 |
806 CX25840_SVIDEO_ON,
807 .amux = CX25840_AUDIO7,
808 } },
809 },
810 [CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
811 .name = "Hauppauge WinTV-Starburst2",
812 .portb = CX23885_MPEG_DVB,
813 },
814 };
815 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
816
817 /* ------------------------------------------------------------------ */
818 /* PCI subsystem IDs */
819
820 struct cx23885_subid cx23885_subids[] = {
821 {
822 .subvendor = 0x0070,
823 .subdevice = 0x3400,
824 .card = CX23885_BOARD_UNKNOWN,
825 }, {
826 .subvendor = 0x0070,
827 .subdevice = 0x7600,
828 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
829 }, {
830 .subvendor = 0x0070,
831 .subdevice = 0x7800,
832 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
833 }, {
834 .subvendor = 0x0070,
835 .subdevice = 0x7801,
836 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
837 }, {
838 .subvendor = 0x0070,
839 .subdevice = 0x7809,
840 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
841 }, {
842 .subvendor = 0x0070,
843 .subdevice = 0x7911,
844 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
845 }, {
846 .subvendor = 0x18ac,
847 .subdevice = 0xd500,
848 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
849 }, {
850 .subvendor = 0x0070,
851 .subdevice = 0x7790,
852 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
853 }, {
854 .subvendor = 0x0070,
855 .subdevice = 0x7797,
856 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
857 }, {
858 .subvendor = 0x0070,
859 .subdevice = 0x7710,
860 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
861 }, {
862 .subvendor = 0x0070,
863 .subdevice = 0x7717,
864 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
865 }, {
866 .subvendor = 0x0070,
867 .subdevice = 0x71d1,
868 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
869 }, {
870 .subvendor = 0x0070,
871 .subdevice = 0x71d3,
872 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
873 }, {
874 .subvendor = 0x0070,
875 .subdevice = 0x8101,
876 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
877 }, {
878 .subvendor = 0x0070,
879 .subdevice = 0x8010,
880 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
881 }, {
882 .subvendor = 0x18ac,
883 .subdevice = 0xd618,
884 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
885 }, {
886 .subvendor = 0x18ac,
887 .subdevice = 0xdb78,
888 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
889 }, {
890 .subvendor = 0x107d,
891 .subdevice = 0x6681,
892 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
893 }, {
894 .subvendor = 0x107d,
895 .subdevice = 0x6f21,
896 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
897 }, {
898 .subvendor = 0x107d,
899 .subdevice = 0x6f39,
900 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
901 }, {
902 .subvendor = 0x185b,
903 .subdevice = 0xe800,
904 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
905 }, {
906 .subvendor = 0x6920,
907 .subdevice = 0x8888,
908 .card = CX23885_BOARD_TBS_6920,
909 }, {
910 .subvendor = 0x6980,
911 .subdevice = 0x8888,
912 .card = CX23885_BOARD_TBS_6980,
913 }, {
914 .subvendor = 0x6981,
915 .subdevice = 0x8888,
916 .card = CX23885_BOARD_TBS_6981,
917 }, {
918 .subvendor = 0xd470,
919 .subdevice = 0x9022,
920 .card = CX23885_BOARD_TEVII_S470,
921 }, {
922 .subvendor = 0x0001,
923 .subdevice = 0x2005,
924 .card = CX23885_BOARD_DVBWORLD_2005,
925 }, {
926 .subvendor = 0x1b55,
927 .subdevice = 0x2a2c,
928 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
929 }, {
930 .subvendor = 0x0070,
931 .subdevice = 0x2211,
932 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
933 }, {
934 .subvendor = 0x0070,
935 .subdevice = 0x2215,
936 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
937 }, {
938 .subvendor = 0x0070,
939 .subdevice = 0x221d,
940 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
941 }, {
942 .subvendor = 0x0070,
943 .subdevice = 0x2251,
944 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
945 }, {
946 .subvendor = 0x0070,
947 .subdevice = 0x2259,
948 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
949 }, {
950 .subvendor = 0x0070,
951 .subdevice = 0x2291,
952 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
953 }, {
954 .subvendor = 0x0070,
955 .subdevice = 0x2295,
956 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
957 }, {
958 .subvendor = 0x0070,
959 .subdevice = 0x2299,
960 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
961 }, {
962 .subvendor = 0x0070,
963 .subdevice = 0x229d,
964 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
965 }, {
966 .subvendor = 0x0070,
967 .subdevice = 0x22f0,
968 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
969 }, {
970 .subvendor = 0x0070,
971 .subdevice = 0x22f1,
972 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
973 }, {
974 .subvendor = 0x0070,
975 .subdevice = 0x22f2,
976 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
977 }, {
978 .subvendor = 0x0070,
979 .subdevice = 0x22f3,
980 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
981 }, {
982 .subvendor = 0x0070,
983 .subdevice = 0x22f4,
984 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
985 }, {
986 .subvendor = 0x0070,
987 .subdevice = 0x22f5,
988 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
989 }, {
990 .subvendor = 0x14f1,
991 .subdevice = 0x8651,
992 .card = CX23885_BOARD_MYGICA_X8506,
993 }, {
994 .subvendor = 0x14f1,
995 .subdevice = 0x8657,
996 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
997 }, {
998 .subvendor = 0x0070,
999 .subdevice = 0x8541,
1000 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
1001 }, {
1002 .subvendor = 0x1858,
1003 .subdevice = 0xe800,
1004 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
1005 }, {
1006 .subvendor = 0x0070,
1007 .subdevice = 0x8551,
1008 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
1009 }, {
1010 .subvendor = 0x14f1,
1011 .subdevice = 0x8578,
1012 .card = CX23885_BOARD_MYGICA_X8558PRO,
1013 }, {
1014 .subvendor = 0x107d,
1015 .subdevice = 0x6f22,
1016 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
1017 }, {
1018 .subvendor = 0x5654,
1019 .subdevice = 0x2390,
1020 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
1021 }, {
1022 .subvendor = 0x1b55,
1023 .subdevice = 0xe2e4,
1024 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
1025 }, {
1026 .subvendor = 0x14f1,
1027 .subdevice = 0x8502,
1028 .card = CX23885_BOARD_MYGICA_X8507,
1029 }, {
1030 .subvendor = 0x153b,
1031 .subdevice = 0x117e,
1032 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
1033 }, {
1034 .subvendor = 0xd471,
1035 .subdevice = 0x9022,
1036 .card = CX23885_BOARD_TEVII_S471,
1037 }, {
1038 .subvendor = 0x8000,
1039 .subdevice = 0x3034,
1040 .card = CX23885_BOARD_PROF_8000,
1041 }, {
1042 .subvendor = 0x0070,
1043 .subdevice = 0xc108,
1044 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1045 }, {
1046 .subvendor = 0x0070,
1047 .subdevice = 0xc138,
1048 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1049 }, {
1050 .subvendor = 0x0070,
1051 .subdevice = 0xc12a,
1052 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1053 }, {
1054 .subvendor = 0x0070,
1055 .subdevice = 0xc1f8,
1056 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1057 }, {
1058 .subvendor = 0x1461,
1059 .subdevice = 0xd939,
1060 .card = CX23885_BOARD_AVERMEDIA_HC81R,
1061 }, {
1062 .subvendor = 0x0070,
1063 .subdevice = 0x7133,
1064 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1065 }, {
1066 .subvendor = 0x0070,
1067 .subdevice = 0x7137,
1068 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1069 }, {
1070 .subvendor = 0x18ac,
1071 .subdevice = 0xdb98,
1072 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
1073 }, {
1074 .subvendor = 0x4254,
1075 .subdevice = 0x9580,
1076 .card = CX23885_BOARD_DVBSKY_T9580,
1077 }, {
1078 .subvendor = 0x4254,
1079 .subdevice = 0x980c,
1080 .card = CX23885_BOARD_DVBSKY_T980C,
1081 }, {
1082 .subvendor = 0x4254,
1083 .subdevice = 0x950c,
1084 .card = CX23885_BOARD_DVBSKY_S950C,
1085 }, {
1086 .subvendor = 0x13c2,
1087 .subdevice = 0x3013,
1088 .card = CX23885_BOARD_TT_CT2_4500_CI,
1089 }, {
1090 .subvendor = 0x4254,
1091 .subdevice = 0x0950,
1092 .card = CX23885_BOARD_DVBSKY_S950,
1093 }, {
1094 .subvendor = 0x4254,
1095 .subdevice = 0x0952,
1096 .card = CX23885_BOARD_DVBSKY_S952,
1097 }, {
1098 .subvendor = 0x4254,
1099 .subdevice = 0x0982,
1100 .card = CX23885_BOARD_DVBSKY_T982,
1101 }, {
1102 .subvendor = 0x0070,
1103 .subdevice = 0xf038,
1104 .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
1105 }, {
1106 .subvendor = 0x1576,
1107 .subdevice = 0x0260,
1108 .card = CX23885_BOARD_VIEWCAST_260E,
1109 }, {
1110 .subvendor = 0x1576,
1111 .subdevice = 0x0460,
1112 .card = CX23885_BOARD_VIEWCAST_460E,
1113 }, {
1114 .subvendor = 0x0070,
1115 .subdevice = 0x6a28,
1116 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1117 }, {
1118 .subvendor = 0x0070,
1119 .subdevice = 0x6b28,
1120 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1121 }, {
1122 .subvendor = 0x0070,
1123 .subdevice = 0x6a18,
1124 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1125 }, {
1126 .subvendor = 0x0070,
1127 .subdevice = 0x6b18,
1128 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
1129 }, {
1130 .subvendor = 0x0070,
1131 .subdevice = 0x2a18,
1132 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
1133 }, {
1134 .subvendor = 0x0070,
1135 .subdevice = 0xf02a,
1136 .card = CX23885_BOARD_HAUPPAUGE_STARBURST2,
1137 },
1138 };
1139 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1140
1141 void cx23885_card_list(struct cx23885_dev *dev)
1142 {
1143 int i;
1144
1145 if (0 == dev->pci->subsystem_vendor &&
1146 0 == dev->pci->subsystem_device) {
1147 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1148 "%s: be autodetected. Pass card=<n> insmod option\n"
1149 "%s: to workaround that. Redirect complaints to the\n"
1150 "%s: vendor of the TV card. Best regards,\n"
1151 "%s: -- tux\n",
1152 dev->name, dev->name, dev->name, dev->name, dev->name);
1153 } else {
1154 pr_info("%s: Your board isn't known (yet) to the driver.\n"
1155 "%s: Try to pick one of the existing card configs via\n"
1156 "%s: card=<n> insmod option. Updating to the latest\n"
1157 "%s: version might help as well.\n",
1158 dev->name, dev->name, dev->name, dev->name);
1159 }
1160 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1161 dev->name);
1162 for (i = 0; i < cx23885_bcount; i++)
1163 pr_info("%s: card=%d -> %s\n",
1164 dev->name, i, cx23885_boards[i].name);
1165 }
1166
1167 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1168 {
1169 u32 sn;
1170
1171 /* The serial number record begins with tag 0x59 */
1172 if (*(eeprom_data + 0x00) != 0x59) {
1173 pr_info("%s() eeprom records are undefined, no serial number\n",
1174 __func__);
1175 return;
1176 }
1177
1178 sn = (*(eeprom_data + 0x06) << 24) |
1179 (*(eeprom_data + 0x05) << 16) |
1180 (*(eeprom_data + 0x04) << 8) |
1181 (*(eeprom_data + 0x03));
1182
1183 pr_info("%s: card '%s' sn# MM%d\n",
1184 dev->name,
1185 cx23885_boards[dev->board].name,
1186 sn);
1187 }
1188
1189 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1190 {
1191 struct tveeprom tv;
1192
1193 tveeprom_hauppauge_analog(&tv, eeprom_data);
1194
1195 /* Make sure we support the board model */
1196 switch (tv.model) {
1197 case 22001:
1198 /* WinTV-HVR1270 (PCIe, Retail, half height)
1199 * ATSC/QAM and basic analog, IR Blast */
1200 case 22009:
1201 /* WinTV-HVR1210 (PCIe, Retail, half height)
1202 * DVB-T and basic analog, IR Blast */
1203 case 22011:
1204 /* WinTV-HVR1270 (PCIe, Retail, half height)
1205 * ATSC/QAM and basic analog, IR Recv */
1206 case 22019:
1207 /* WinTV-HVR1210 (PCIe, Retail, half height)
1208 * DVB-T and basic analog, IR Recv */
1209 case 22021:
1210 /* WinTV-HVR1275 (PCIe, Retail, half height)
1211 * ATSC/QAM and basic analog, IR Recv */
1212 case 22029:
1213 /* WinTV-HVR1210 (PCIe, Retail, half height)
1214 * DVB-T and basic analog, IR Recv */
1215 case 22101:
1216 /* WinTV-HVR1270 (PCIe, Retail, full height)
1217 * ATSC/QAM and basic analog, IR Blast */
1218 case 22109:
1219 /* WinTV-HVR1210 (PCIe, Retail, full height)
1220 * DVB-T and basic analog, IR Blast */
1221 case 22111:
1222 /* WinTV-HVR1270 (PCIe, Retail, full height)
1223 * ATSC/QAM and basic analog, IR Recv */
1224 case 22119:
1225 /* WinTV-HVR1210 (PCIe, Retail, full height)
1226 * DVB-T and basic analog, IR Recv */
1227 case 22121:
1228 /* WinTV-HVR1275 (PCIe, Retail, full height)
1229 * ATSC/QAM and basic analog, IR Recv */
1230 case 22129:
1231 /* WinTV-HVR1210 (PCIe, Retail, full height)
1232 * DVB-T and basic analog, IR Recv */
1233 case 71009:
1234 /* WinTV-HVR1200 (PCIe, Retail, full height)
1235 * DVB-T and basic analog */
1236 case 71100:
1237 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1238 * Basic analog */
1239 case 71359:
1240 /* WinTV-HVR1200 (PCIe, OEM, half height)
1241 * DVB-T and basic analog */
1242 case 71439:
1243 /* WinTV-HVR1200 (PCIe, OEM, half height)
1244 * DVB-T and basic analog */
1245 case 71449:
1246 /* WinTV-HVR1200 (PCIe, OEM, full height)
1247 * DVB-T and basic analog */
1248 case 71939:
1249 /* WinTV-HVR1200 (PCIe, OEM, half height)
1250 * DVB-T and basic analog */
1251 case 71949:
1252 /* WinTV-HVR1200 (PCIe, OEM, full height)
1253 * DVB-T and basic analog */
1254 case 71959:
1255 /* WinTV-HVR1200 (PCIe, OEM, full height)
1256 * DVB-T and basic analog */
1257 case 71979:
1258 /* WinTV-HVR1200 (PCIe, OEM, half height)
1259 * DVB-T and basic analog */
1260 case 71999:
1261 /* WinTV-HVR1200 (PCIe, OEM, full height)
1262 * DVB-T and basic analog */
1263 case 76601:
1264 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1265 channel ATSC and MPEG2 HW Encoder */
1266 case 77001:
1267 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1268 and Basic analog */
1269 case 77011:
1270 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1271 and Basic analog */
1272 case 77041:
1273 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1274 and Basic analog */
1275 case 77051:
1276 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1277 and Basic analog */
1278 case 78011:
1279 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1280 Dual channel ATSC and MPEG2 HW Encoder */
1281 case 78501:
1282 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1283 Dual channel ATSC and MPEG2 HW Encoder */
1284 case 78521:
1285 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1286 Dual channel ATSC and MPEG2 HW Encoder */
1287 case 78531:
1288 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1289 Dual channel ATSC and MPEG2 HW Encoder */
1290 case 78631:
1291 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1292 Dual channel ATSC and MPEG2 HW Encoder */
1293 case 79001:
1294 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1295 ATSC and Basic analog */
1296 case 79101:
1297 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1298 ATSC and Basic analog */
1299 case 79501:
1300 /* WinTV-HVR1250 (PCIe, No IR, half height,
1301 ATSC [at least] and Basic analog) */
1302 case 79561:
1303 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1304 ATSC and Basic analog */
1305 case 79571:
1306 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1307 ATSC and Basic analog */
1308 case 79671:
1309 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1310 ATSC and Basic analog */
1311 case 80019:
1312 /* WinTV-HVR1400 (Express Card, Retail, IR,
1313 * DVB-T and Basic analog */
1314 case 81509:
1315 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1316 * DVB-T and MPEG2 HW Encoder */
1317 case 81519:
1318 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1319 * DVB-T and MPEG2 HW Encoder */
1320 break;
1321 case 85021:
1322 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1323 Dual channel ATSC and MPEG2 HW Encoder */
1324 break;
1325 case 85721:
1326 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1327 Dual channel ATSC and Basic analog */
1328 case 121019:
1329 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1330 break;
1331 case 121029:
1332 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1333 break;
1334 case 150329:
1335 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1336 break;
1337 case 161111:
1338 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
1339 break;
1340 case 166100: /* 888 version, hybrid */
1341 case 166200: /* 885 version, DVB only */
1342 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1343 DVB-T/T2/C, DVB-T/T2/C */
1344 break;
1345 case 166101: /* 888 version, hybrid */
1346 case 166201: /* 885 version, DVB only */
1347 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1348 DVB-T/T2/C, DVB-T/T2/C */
1349 break;
1350 case 165100: /* 888 version, hybrid */
1351 case 165200: /* 885 version, digital only */
1352 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1353 * ATSC/QAM-B, ATSC/QAM-B */
1354 break;
1355 case 165101: /* 888 version, hybrid */
1356 case 165201: /* 885 version, digital only */
1357 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1358 * ATSC/QAM-B, ATSC/QAM-B */
1359 break;
1360 default:
1361 pr_warn("%s: warning: unknown hauppauge model #%d\n",
1362 dev->name, tv.model);
1363 break;
1364 }
1365
1366 pr_info("%s: hauppauge eeprom: model=%d\n",
1367 dev->name, tv.model);
1368 }
1369
1370 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1371 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1372 doesn't respond to any command. */
1373 static void tbs_card_init(struct cx23885_dev *dev)
1374 {
1375 int i;
1376 static const u8 buf[] = {
1377 0xe0, 0x06, 0x66, 0x33, 0x65,
1378 0x01, 0x17, 0x06, 0xde};
1379
1380 switch (dev->board) {
1381 case CX23885_BOARD_TBS_6980:
1382 case CX23885_BOARD_TBS_6981:
1383 cx_set(GP0_IO, 0x00070007);
1384 usleep_range(1000, 10000);
1385 cx_clear(GP0_IO, 2);
1386 usleep_range(1000, 10000);
1387 for (i = 0; i < 9 * 8; i++) {
1388 cx_clear(GP0_IO, 7);
1389 usleep_range(1000, 10000);
1390 cx_set(GP0_IO,
1391 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1392 usleep_range(1000, 10000);
1393 }
1394 cx_set(GP0_IO, 7);
1395 break;
1396 }
1397 }
1398
1399 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1400 {
1401 struct cx23885_tsport *port = priv;
1402 struct cx23885_dev *dev = port->dev;
1403 u32 bitmask = 0;
1404
1405 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1406 return 0;
1407
1408 if (command != 0) {
1409 pr_err("%s(): Unknown command 0x%x.\n",
1410 __func__, command);
1411 return -EINVAL;
1412 }
1413
1414 switch (dev->board) {
1415 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1416 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1417 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1418 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1419 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1420 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1421 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1422 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1423 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1424 /* Tuner Reset Command */
1425 bitmask = 0x04;
1426 break;
1427 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1428 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1429 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1430 /* Two identical tuners on two different i2c buses,
1431 * we need to reset the correct gpio. */
1432 if (port->nr == 1)
1433 bitmask = 0x01;
1434 else if (port->nr == 2)
1435 bitmask = 0x04;
1436 break;
1437 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1438 /* Tuner Reset Command */
1439 bitmask = 0x02;
1440 break;
1441 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1442 altera_ci_tuner_reset(dev, port->nr);
1443 break;
1444 case CX23885_BOARD_AVERMEDIA_HC81R:
1445 /* XC3028L Reset Command */
1446 bitmask = 1 << 2;
1447 break;
1448 }
1449
1450 if (bitmask) {
1451 /* Drive the tuner into reset and back out */
1452 cx_clear(GP0_IO, bitmask);
1453 mdelay(200);
1454 cx_set(GP0_IO, bitmask);
1455 }
1456
1457 return 0;
1458 }
1459
1460 void cx23885_gpio_setup(struct cx23885_dev *dev)
1461 {
1462 switch (dev->board) {
1463 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1464 /* GPIO-0 cx24227 demodulator reset */
1465 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1466 break;
1467 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1468 /* GPIO-0 cx24227 demodulator */
1469 /* GPIO-2 xc3028 tuner */
1470
1471 /* Put the parts into reset */
1472 cx_set(GP0_IO, 0x00050000);
1473 cx_clear(GP0_IO, 0x00000005);
1474 msleep(5);
1475
1476 /* Bring the parts out of reset */
1477 cx_set(GP0_IO, 0x00050005);
1478 break;
1479 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1480 /* GPIO-0 cx24227 demodulator reset */
1481 /* GPIO-2 xc5000 tuner reset */
1482 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1483 break;
1484 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1485 /* GPIO-0 656_CLK */
1486 /* GPIO-1 656_D0 */
1487 /* GPIO-2 8295A Reset */
1488 /* GPIO-3-10 cx23417 data0-7 */
1489 /* GPIO-11-14 cx23417 addr0-3 */
1490 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1491 /* GPIO-19 IR_RX */
1492
1493 /* CX23417 GPIO's */
1494 /* EIO15 Zilog Reset */
1495 /* EIO14 S5H1409/CX24227 Reset */
1496 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1497
1498 /* Put the demod into reset and protect the eeprom */
1499 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1500 msleep(100);
1501
1502 /* Bring the demod and blaster out of reset */
1503 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1504 msleep(100);
1505
1506 /* Force the TDA8295A into reset and back */
1507 cx23885_gpio_enable(dev, GPIO_2, 1);
1508 cx23885_gpio_set(dev, GPIO_2);
1509 msleep(20);
1510 cx23885_gpio_clear(dev, GPIO_2);
1511 msleep(20);
1512 cx23885_gpio_set(dev, GPIO_2);
1513 msleep(20);
1514 break;
1515 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1516 /* GPIO-0 tda10048 demodulator reset */
1517 /* GPIO-2 tda18271 tuner reset */
1518
1519 /* Put the parts into reset and back */
1520 cx_set(GP0_IO, 0x00050000);
1521 msleep(20);
1522 cx_clear(GP0_IO, 0x00000005);
1523 msleep(20);
1524 cx_set(GP0_IO, 0x00050005);
1525 break;
1526 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1527 /* GPIO-0 TDA10048 demodulator reset */
1528 /* GPIO-2 TDA8295A Reset */
1529 /* GPIO-3-10 cx23417 data0-7 */
1530 /* GPIO-11-14 cx23417 addr0-3 */
1531 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1532
1533 /* The following GPIO's are on the interna AVCore (cx25840) */
1534 /* GPIO-19 IR_RX */
1535 /* GPIO-20 IR_TX 416/DVBT Select */
1536 /* GPIO-21 IIS DAT */
1537 /* GPIO-22 IIS WCLK */
1538 /* GPIO-23 IIS BCLK */
1539
1540 /* Put the parts into reset and back */
1541 cx_set(GP0_IO, 0x00050000);
1542 msleep(20);
1543 cx_clear(GP0_IO, 0x00000005);
1544 msleep(20);
1545 cx_set(GP0_IO, 0x00050005);
1546 break;
1547 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1548 /* GPIO-0 Dibcom7000p demodulator reset */
1549 /* GPIO-2 xc3028L tuner reset */
1550 /* GPIO-13 LED */
1551
1552 /* Put the parts into reset and back */
1553 cx_set(GP0_IO, 0x00050000);
1554 msleep(20);
1555 cx_clear(GP0_IO, 0x00000005);
1556 msleep(20);
1557 cx_set(GP0_IO, 0x00050005);
1558 break;
1559 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1560 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1561 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1562 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1563 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1564
1565 /* Put the parts into reset and back */
1566 cx_set(GP0_IO, 0x000f0000);
1567 msleep(20);
1568 cx_clear(GP0_IO, 0x0000000f);
1569 msleep(20);
1570 cx_set(GP0_IO, 0x000f000f);
1571 break;
1572 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1573 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1574 /* GPIO-0 portb xc3028 reset */
1575 /* GPIO-1 portb zl10353 reset */
1576 /* GPIO-2 portc xc3028 reset */
1577 /* GPIO-3 portc zl10353 reset */
1578
1579 /* Put the parts into reset and back */
1580 cx_set(GP0_IO, 0x000f0000);
1581 msleep(20);
1582 cx_clear(GP0_IO, 0x0000000f);
1583 msleep(20);
1584 cx_set(GP0_IO, 0x000f000f);
1585 break;
1586 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1587 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1588 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1589 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1590 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1591 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1592 /* GPIO-2 xc3028 tuner reset */
1593
1594 /* The following GPIO's are on the internal AVCore (cx25840) */
1595 /* GPIO-? zl10353 demod reset */
1596
1597 /* Put the parts into reset and back */
1598 cx_set(GP0_IO, 0x00040000);
1599 msleep(20);
1600 cx_clear(GP0_IO, 0x00000004);
1601 msleep(20);
1602 cx_set(GP0_IO, 0x00040004);
1603 break;
1604 case CX23885_BOARD_TBS_6920:
1605 case CX23885_BOARD_TBS_6980:
1606 case CX23885_BOARD_TBS_6981:
1607 case CX23885_BOARD_PROF_8000:
1608 cx_write(MC417_CTL, 0x00000036);
1609 cx_write(MC417_OEN, 0x00001000);
1610 cx_set(MC417_RWD, 0x00000002);
1611 msleep(200);
1612 cx_clear(MC417_RWD, 0x00000800);
1613 msleep(200);
1614 cx_set(MC417_RWD, 0x00000800);
1615 msleep(200);
1616 break;
1617 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1618 /* GPIO-0 INTA from CiMax1
1619 GPIO-1 INTB from CiMax2
1620 GPIO-2 reset chips
1621 GPIO-3 to GPIO-10 data/addr for CA
1622 GPIO-11 ~CS0 to CiMax1
1623 GPIO-12 ~CS1 to CiMax2
1624 GPIO-13 ADL0 load LSB addr
1625 GPIO-14 ADL1 load MSB addr
1626 GPIO-15 ~RDY from CiMax
1627 GPIO-17 ~RD to CiMax
1628 GPIO-18 ~WR to CiMax
1629 */
1630 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1631 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1632 cx_clear(GP0_IO, 0x00030004);
1633 msleep(100);/* reset delay */
1634 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1635 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1636 /* GPIO-15 IN as ~ACK, rest as OUT */
1637 cx_write(MC417_OEN, 0x00001000);
1638 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1639 cx_write(MC417_RWD, 0x0000c300);
1640 /* enable irq */
1641 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1642 break;
1643 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1644 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1645 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1646 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1647 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1648 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1649 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1650 /* GPIO-9 Demod reset */
1651
1652 /* Put the parts into reset and back */
1653 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1654 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1655 cx23885_gpio_clear(dev, GPIO_9);
1656 msleep(20);
1657 cx23885_gpio_set(dev, GPIO_9);
1658 break;
1659 case CX23885_BOARD_MYGICA_X8506:
1660 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1661 case CX23885_BOARD_MYGICA_X8507:
1662 /* GPIO-0 (0)Analog / (1)Digital TV */
1663 /* GPIO-1 reset XC5000 */
1664 /* GPIO-2 demod reset */
1665 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1666 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1667 msleep(100);
1668 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1669 msleep(100);
1670 break;
1671 case CX23885_BOARD_MYGICA_X8558PRO:
1672 /* GPIO-0 reset first ATBM8830 */
1673 /* GPIO-1 reset second ATBM8830 */
1674 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1675 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1676 msleep(100);
1677 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1678 msleep(100);
1679 break;
1680 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1681 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1682 /* GPIO-0 656_CLK */
1683 /* GPIO-1 656_D0 */
1684 /* GPIO-2 Wake# */
1685 /* GPIO-3-10 cx23417 data0-7 */
1686 /* GPIO-11-14 cx23417 addr0-3 */
1687 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1688 /* GPIO-19 IR_RX */
1689 /* GPIO-20 C_IR_TX */
1690 /* GPIO-21 I2S DAT */
1691 /* GPIO-22 I2S WCLK */
1692 /* GPIO-23 I2S BCLK */
1693 /* ALT GPIO: EXP GPIO LATCH */
1694
1695 /* CX23417 GPIO's */
1696 /* GPIO-14 S5H1411/CX24228 Reset */
1697 /* GPIO-13 EEPROM write protect */
1698 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1699
1700 /* Put the demod into reset and protect the eeprom */
1701 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1702 msleep(100);
1703
1704 /* Bring the demod out of reset */
1705 mc417_gpio_set(dev, GPIO_14);
1706 msleep(100);
1707
1708 /* CX24228 GPIO */
1709 /* Connected to IF / Mux */
1710 break;
1711 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1712 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1713 break;
1714 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1715 /* GPIO-0 ~INT in
1716 GPIO-1 TMS out
1717 GPIO-2 ~reset chips out
1718 GPIO-3 to GPIO-10 data/addr for CA in/out
1719 GPIO-11 ~CS out
1720 GPIO-12 ADDR out
1721 GPIO-13 ~WR out
1722 GPIO-14 ~RD out
1723 GPIO-15 ~RDY in
1724 GPIO-16 TCK out
1725 GPIO-17 TDO in
1726 GPIO-18 TDI out
1727 */
1728 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1729 /* GPIO-0 as INT, reset & TMS low */
1730 cx_clear(GP0_IO, 0x00010006);
1731 msleep(100);/* reset delay */
1732 cx_set(GP0_IO, 0x00000004); /* reset high */
1733 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1734 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1735 cx_write(MC417_OEN, 0x00005000);
1736 /* ~RD, ~WR high; ADDR low; ~CS high */
1737 cx_write(MC417_RWD, 0x00000d00);
1738 /* enable irq */
1739 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1740 break;
1741 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1742 case CX23885_BOARD_HAUPPAUGE_STARBURST:
1743 /* GPIO-8 tda10071 demod reset */
1744 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1745
1746 /* Put the parts into reset and back */
1747 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1748
1749 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1750 msleep(100);
1751 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1752 msleep(100);
1753
1754 break;
1755 case CX23885_BOARD_AVERMEDIA_HC81R:
1756 cx_clear(MC417_CTL, 1);
1757 /* GPIO-0,1,2 setup direction as output */
1758 cx_set(GP0_IO, 0x00070000);
1759 usleep_range(10000, 11000);
1760 /* AF9013 demod reset */
1761 cx_set(GP0_IO, 0x00010001);
1762 usleep_range(10000, 11000);
1763 cx_clear(GP0_IO, 0x00010001);
1764 usleep_range(10000, 11000);
1765 cx_set(GP0_IO, 0x00010001);
1766 usleep_range(10000, 11000);
1767 /* demod tune? */
1768 cx_clear(GP0_IO, 0x00030003);
1769 usleep_range(10000, 11000);
1770 cx_set(GP0_IO, 0x00020002);
1771 usleep_range(10000, 11000);
1772 cx_set(GP0_IO, 0x00010001);
1773 usleep_range(10000, 11000);
1774 cx_clear(GP0_IO, 0x00020002);
1775 /* XC3028L tuner reset */
1776 cx_set(GP0_IO, 0x00040004);
1777 cx_clear(GP0_IO, 0x00040004);
1778 cx_set(GP0_IO, 0x00040004);
1779 msleep(60);
1780 break;
1781 case CX23885_BOARD_DVBSKY_T9580:
1782 case CX23885_BOARD_DVBSKY_S952:
1783 case CX23885_BOARD_DVBSKY_T982:
1784 /* enable GPIO3-18 pins */
1785 cx_write(MC417_CTL, 0x00000037);
1786 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1787 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1788 msleep(100);
1789 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1790 break;
1791 case CX23885_BOARD_DVBSKY_T980C:
1792 case CX23885_BOARD_DVBSKY_S950C:
1793 case CX23885_BOARD_TT_CT2_4500_CI:
1794 /*
1795 * GPIO-0 INTA from CiMax, input
1796 * GPIO-1 reset CiMax, output, high active
1797 * GPIO-2 reset demod, output, low active
1798 * GPIO-3 to GPIO-10 data/addr for CAM
1799 * GPIO-11 ~CS0 to CiMax1
1800 * GPIO-12 ~CS1 to CiMax2
1801 * GPIO-13 ADL0 load LSB addr
1802 * GPIO-14 ADL1 load MSB addr
1803 * GPIO-15 ~RDY from CiMax
1804 * GPIO-17 ~RD to CiMax
1805 * GPIO-18 ~WR to CiMax
1806 */
1807
1808 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1809 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1810 msleep(100); /* reset delay */
1811 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1812 cx_clear(GP0_IO, 0x00010002);
1813 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1814
1815 /* GPIO-15 IN as ~ACK, rest as OUT */
1816 cx_write(MC417_OEN, 0x00001000);
1817
1818 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1819 cx_write(MC417_RWD, 0x0000c300);
1820
1821 /* enable irq */
1822 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1823 break;
1824 case CX23885_BOARD_DVBSKY_S950:
1825 cx23885_gpio_enable(dev, GPIO_2, 1);
1826 cx23885_gpio_clear(dev, GPIO_2);
1827 msleep(100);
1828 cx23885_gpio_set(dev, GPIO_2);
1829 break;
1830 case CX23885_BOARD_HAUPPAUGE_HVR5525:
1831 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
1832 /*
1833 * HVR5525 GPIO Details:
1834 * GPIO-00 IR_WIDE
1835 * GPIO-02 wake#
1836 * GPIO-03 VAUX Pres.
1837 * GPIO-07 PROG#
1838 * GPIO-08 SAT_RESN
1839 * GPIO-09 TER_RESN
1840 * GPIO-10 B2_SENSE
1841 * GPIO-11 B1_SENSE
1842 * GPIO-15 IR_LED_STATUS
1843 * GPIO-19 IR_NARROW
1844 * GPIO-20 Blauster1
1845 * ALTGPIO VAUX_SWITCH
1846 * AUX_PLL_CLK : Blaster2
1847 */
1848 /* Put the parts into reset and back */
1849 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1850 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1851 msleep(100);
1852 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1853 msleep(100);
1854 break;
1855 case CX23885_BOARD_VIEWCAST_260E:
1856 case CX23885_BOARD_VIEWCAST_460E:
1857 /* For documentation purposes, it's worth noting that this
1858 * card does not have any GPIO's connected to subcomponents.
1859 */
1860 break;
1861 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1862 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1863 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
1864 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1865 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
1866 /*
1867 * GPIO-08 TER1_RESN
1868 * GPIO-09 TER2_RESN
1869 */
1870 /* Put the parts into reset and back */
1871 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1872 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1873 msleep(100);
1874 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1875 msleep(100);
1876 break;
1877 }
1878 }
1879
1880 int cx23885_ir_init(struct cx23885_dev *dev)
1881 {
1882 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1883 {
1884 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1885 .pin = CX23885_PIN_IR_RX_GPIO19,
1886 .function = CX23885_PAD_IR_RX,
1887 .value = 0,
1888 .strength = CX25840_PIN_DRIVE_MEDIUM,
1889 }, {
1890 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
1891 .pin = CX23885_PIN_IR_TX_GPIO20,
1892 .function = CX23885_PAD_IR_TX,
1893 .value = 0,
1894 .strength = CX25840_PIN_DRIVE_MEDIUM,
1895 }
1896 };
1897 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1898
1899 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1900 {
1901 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1902 .pin = CX23885_PIN_IR_RX_GPIO19,
1903 .function = CX23885_PAD_IR_RX,
1904 .value = 0,
1905 .strength = CX25840_PIN_DRIVE_MEDIUM,
1906 }
1907 };
1908 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1909
1910 struct v4l2_subdev_ir_parameters params;
1911 int ret = 0;
1912 switch (dev->board) {
1913 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1914 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1915 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1916 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1917 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1918 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1919 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1920 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1921 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1922 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1923 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1924 /* FIXME: Implement me */
1925 break;
1926 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1927 ret = cx23888_ir_probe(dev);
1928 if (ret)
1929 break;
1930 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1931 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1932 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1933 break;
1934 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1935 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1936 ret = cx23888_ir_probe(dev);
1937 if (ret)
1938 break;
1939 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1940 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1941 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1942 /*
1943 * For these boards we need to invert the Tx output via the
1944 * IR controller to have the LED off while idle
1945 */
1946 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1947 params.enable = false;
1948 params.shutdown = false;
1949 params.invert_level = true;
1950 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1951 params.shutdown = true;
1952 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1953 break;
1954 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1955 case CX23885_BOARD_TEVII_S470:
1956 case CX23885_BOARD_MYGICA_X8507:
1957 case CX23885_BOARD_TBS_6980:
1958 case CX23885_BOARD_TBS_6981:
1959 case CX23885_BOARD_DVBSKY_T9580:
1960 case CX23885_BOARD_DVBSKY_T980C:
1961 case CX23885_BOARD_DVBSKY_S950C:
1962 case CX23885_BOARD_TT_CT2_4500_CI:
1963 case CX23885_BOARD_DVBSKY_S950:
1964 case CX23885_BOARD_DVBSKY_S952:
1965 case CX23885_BOARD_DVBSKY_T982:
1966 if (!enable_885_ir)
1967 break;
1968 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1969 if (dev->sd_ir == NULL) {
1970 ret = -ENODEV;
1971 break;
1972 }
1973 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1974 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1975 break;
1976 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1977 if (!enable_885_ir)
1978 break;
1979 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1980 if (dev->sd_ir == NULL) {
1981 ret = -ENODEV;
1982 break;
1983 }
1984 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1985 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1986 break;
1987 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1988 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1989 request_module("ir-kbd-i2c");
1990 break;
1991 }
1992
1993 return ret;
1994 }
1995
1996 void cx23885_ir_fini(struct cx23885_dev *dev)
1997 {
1998 switch (dev->board) {
1999 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2000 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2001 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2002 cx23885_irq_remove(dev, PCI_MSK_IR);
2003 cx23888_ir_remove(dev);
2004 dev->sd_ir = NULL;
2005 break;
2006 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2007 case CX23885_BOARD_TEVII_S470:
2008 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2009 case CX23885_BOARD_MYGICA_X8507:
2010 case CX23885_BOARD_TBS_6980:
2011 case CX23885_BOARD_TBS_6981:
2012 case CX23885_BOARD_DVBSKY_T9580:
2013 case CX23885_BOARD_DVBSKY_T980C:
2014 case CX23885_BOARD_DVBSKY_S950C:
2015 case CX23885_BOARD_TT_CT2_4500_CI:
2016 case CX23885_BOARD_DVBSKY_S950:
2017 case CX23885_BOARD_DVBSKY_S952:
2018 case CX23885_BOARD_DVBSKY_T982:
2019 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
2020 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
2021 dev->sd_ir = NULL;
2022 break;
2023 }
2024 }
2025
2026 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
2027 {
2028 int data;
2029 int tdo = 0;
2030 struct cx23885_dev *dev = (struct cx23885_dev *)device;
2031 /*TMS*/
2032 data = ((cx_read(GP0_IO)) & (~0x00000002));
2033 data |= (tms ? 0x00020002 : 0x00020000);
2034 cx_write(GP0_IO, data);
2035
2036 /*TDI*/
2037 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
2038 data |= (tdi ? 0x00008000 : 0);
2039 cx_write(MC417_RWD, data);
2040 if (read_tdo)
2041 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
2042
2043 cx_write(MC417_RWD, data | 0x00002000);
2044 udelay(1);
2045 /*TCK*/
2046 cx_write(MC417_RWD, data);
2047
2048 return tdo;
2049 }
2050
2051 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
2052 {
2053 switch (dev->board) {
2054 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2055 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2056 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2057 if (dev->sd_ir)
2058 cx23885_irq_add_enable(dev, PCI_MSK_IR);
2059 break;
2060 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2061 case CX23885_BOARD_TEVII_S470:
2062 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2063 case CX23885_BOARD_MYGICA_X8507:
2064 case CX23885_BOARD_TBS_6980:
2065 case CX23885_BOARD_TBS_6981:
2066 case CX23885_BOARD_DVBSKY_T9580:
2067 case CX23885_BOARD_DVBSKY_T980C:
2068 case CX23885_BOARD_DVBSKY_S950C:
2069 case CX23885_BOARD_TT_CT2_4500_CI:
2070 case CX23885_BOARD_DVBSKY_S950:
2071 case CX23885_BOARD_DVBSKY_S952:
2072 case CX23885_BOARD_DVBSKY_T982:
2073 if (dev->sd_ir)
2074 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2075 break;
2076 }
2077 }
2078
2079 void cx23885_card_setup(struct cx23885_dev *dev)
2080 {
2081 struct cx23885_tsport *ts1 = &dev->ts1;
2082 struct cx23885_tsport *ts2 = &dev->ts2;
2083
2084 static u8 eeprom[256];
2085
2086 if (dev->i2c_bus[0].i2c_rc == 0) {
2087 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2088 tveeprom_read(&dev->i2c_bus[0].i2c_client,
2089 eeprom, sizeof(eeprom));
2090 }
2091
2092 switch (dev->board) {
2093 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2094 if (dev->i2c_bus[0].i2c_rc == 0) {
2095 if (eeprom[0x80] != 0x84)
2096 hauppauge_eeprom(dev, eeprom+0xc0);
2097 else
2098 hauppauge_eeprom(dev, eeprom+0x80);
2099 }
2100 break;
2101 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2102 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2103 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2104 if (dev->i2c_bus[0].i2c_rc == 0)
2105 hauppauge_eeprom(dev, eeprom+0x80);
2106 break;
2107 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2108 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2109 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2110 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2111 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2112 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2113 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2114 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2115 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2116 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2117 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2118 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2119 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2120 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2121 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2122 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2123 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2124 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2125 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2126 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2127 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2128 if (dev->i2c_bus[0].i2c_rc == 0)
2129 hauppauge_eeprom(dev, eeprom+0xc0);
2130 break;
2131 case CX23885_BOARD_VIEWCAST_260E:
2132 case CX23885_BOARD_VIEWCAST_460E:
2133 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2134 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2135 eeprom, sizeof(eeprom));
2136 if (dev->i2c_bus[0].i2c_rc == 0)
2137 viewcast_eeprom(dev, eeprom);
2138 break;
2139 }
2140
2141 switch (dev->board) {
2142 case CX23885_BOARD_AVERMEDIA_HC81R:
2143 /* Defaults for VID B */
2144 ts1->gen_ctrl_val = 0x4; /* Parallel */
2145 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2146 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2147 /* Defaults for VID C */
2148 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2149 ts2->gen_ctrl_val = 0x10e;
2150 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2151 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2152 break;
2153 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2154 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2155 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2156 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2157 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2158 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2159 /* fall-through */
2160 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2161 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2162 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2163 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2164 break;
2165 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2166 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2167 /* Defaults for VID B - Analog encoder */
2168 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2169 ts1->gen_ctrl_val = 0x10e;
2170 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2171 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2172
2173 /* APB_TSVALERR_POL (active low)*/
2174 ts1->vld_misc_val = 0x2000;
2175 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2176 cx_write(0x130184, 0xc);
2177
2178 /* Defaults for VID C */
2179 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2180 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2181 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2182 break;
2183 case CX23885_BOARD_TBS_6920:
2184 ts1->gen_ctrl_val = 0x4; /* Parallel */
2185 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2186 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2187 break;
2188 case CX23885_BOARD_TEVII_S470:
2189 case CX23885_BOARD_TEVII_S471:
2190 case CX23885_BOARD_DVBWORLD_2005:
2191 case CX23885_BOARD_PROF_8000:
2192 case CX23885_BOARD_DVBSKY_T980C:
2193 case CX23885_BOARD_DVBSKY_S950C:
2194 case CX23885_BOARD_TT_CT2_4500_CI:
2195 case CX23885_BOARD_DVBSKY_S950:
2196 ts1->gen_ctrl_val = 0x5; /* Parallel */
2197 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2198 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2199 break;
2200 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2201 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2202 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2203 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2204 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2205 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2206 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2207 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2208 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2209 break;
2210 case CX23885_BOARD_TBS_6980:
2211 case CX23885_BOARD_TBS_6981:
2212 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2213 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2214 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2215 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2216 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2217 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2218 tbs_card_init(dev);
2219 break;
2220 case CX23885_BOARD_MYGICA_X8506:
2221 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2222 case CX23885_BOARD_MYGICA_X8507:
2223 ts1->gen_ctrl_val = 0x5; /* Parallel */
2224 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2225 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2226 break;
2227 case CX23885_BOARD_MYGICA_X8558PRO:
2228 ts1->gen_ctrl_val = 0x5; /* Parallel */
2229 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2230 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2231 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2232 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2233 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2234 break;
2235 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2236 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2237 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2238 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2239 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2240 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2241 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2242 break;
2243 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2244 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2245 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2246 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2247 break;
2248 case CX23885_BOARD_DVBSKY_T9580:
2249 case CX23885_BOARD_DVBSKY_T982:
2250 ts1->gen_ctrl_val = 0x5; /* Parallel */
2251 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2252 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2253 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2254 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2255 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2256 break;
2257 case CX23885_BOARD_DVBSKY_S952:
2258 ts1->gen_ctrl_val = 0x5; /* Parallel */
2259 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2260 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2261 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2262 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2263 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2264 break;
2265 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2266 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2267 ts1->gen_ctrl_val = 0x5; /* Parallel */
2268 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2269 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2270 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2271 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2272 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2273 break;
2274 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2275 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2276 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2277 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2278 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2279 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2280 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2281 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2282 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2283 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2284 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2285 break;
2286 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2287 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2288 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2289 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2290 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2291 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2292 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2293 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2294 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2295 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2296 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2297 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2298 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2299 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2300 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2301 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2302 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2303 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2304 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2305 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2306 default:
2307 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2308 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2309 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2310 }
2311
2312 /* Certain boards support analog, or require the avcore to be
2313 * loaded, ensure this happens.
2314 */
2315 switch (dev->board) {
2316 case CX23885_BOARD_TEVII_S470:
2317 /* Currently only enabled for the integrated IR controller */
2318 if (!enable_885_ir)
2319 break;
2320 /* fall-through */
2321 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2322 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2323 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2324 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2325 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2326 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2327 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2328 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2329 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2330 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2331 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2332 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2333 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2334 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2335 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2336 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2337 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2338 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2339 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2340 case CX23885_BOARD_MYGICA_X8506:
2341 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2342 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2343 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2344 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2345 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2346 case CX23885_BOARD_MPX885:
2347 case CX23885_BOARD_MYGICA_X8507:
2348 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2349 case CX23885_BOARD_AVERMEDIA_HC81R:
2350 case CX23885_BOARD_TBS_6980:
2351 case CX23885_BOARD_TBS_6981:
2352 case CX23885_BOARD_DVBSKY_T9580:
2353 case CX23885_BOARD_DVBSKY_T980C:
2354 case CX23885_BOARD_DVBSKY_S950C:
2355 case CX23885_BOARD_TT_CT2_4500_CI:
2356 case CX23885_BOARD_DVBSKY_S950:
2357 case CX23885_BOARD_DVBSKY_S952:
2358 case CX23885_BOARD_DVBSKY_T982:
2359 case CX23885_BOARD_VIEWCAST_260E:
2360 case CX23885_BOARD_VIEWCAST_460E:
2361 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2362 &dev->i2c_bus[2].i2c_adap,
2363 "cx25840", 0x88 >> 1, NULL);
2364 if (dev->sd_cx25840) {
2365 /* set host data for clk_freq configuration */
2366 v4l2_set_subdev_hostdata(dev->sd_cx25840,
2367 &dev->clk_freq);
2368
2369 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2370 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2371 }
2372 break;
2373 }
2374
2375 switch (dev->board) {
2376 case CX23885_BOARD_VIEWCAST_260E:
2377 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2378 &dev->i2c_bus[0].i2c_adap,
2379 "cs3308", 0x82 >> 1, NULL);
2380 break;
2381 case CX23885_BOARD_VIEWCAST_460E:
2382 /* This cs3308 controls the audio from the breakout cable */
2383 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2384 &dev->i2c_bus[0].i2c_adap,
2385 "cs3308", 0x80 >> 1, NULL);
2386 /* This cs3308 controls the audio from the onboard header */
2387 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2388 &dev->i2c_bus[0].i2c_adap,
2389 "cs3308", 0x82 >> 1, NULL);
2390 break;
2391 }
2392
2393 /* AUX-PLL 27MHz CLK */
2394 switch (dev->board) {
2395 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2396 netup_initialize(dev);
2397 break;
2398 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2399 int ret;
2400 const struct firmware *fw;
2401 const char *filename = "dvb-netup-altera-01.fw";
2402 char *action = "configure";
2403 static struct netup_card_info cinfo;
2404 struct altera_config netup_config = {
2405 .dev = dev,
2406 .action = action,
2407 .jtag_io = netup_jtag_io,
2408 };
2409
2410 netup_initialize(dev);
2411
2412 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2413 if (netup_card_rev)
2414 cinfo.rev = netup_card_rev;
2415
2416 switch (cinfo.rev) {
2417 case 0x4:
2418 filename = "dvb-netup-altera-04.fw";
2419 break;
2420 default:
2421 filename = "dvb-netup-altera-01.fw";
2422 break;
2423 }
2424 pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2425 cinfo.rev, filename);
2426
2427 ret = request_firmware(&fw, filename, &dev->pci->dev);
2428 if (ret != 0)
2429 pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
2430 filename);
2431 else
2432 altera_init(&netup_config, fw);
2433
2434 release_firmware(fw);
2435 break;
2436 }
2437 }
2438 }
Linux with added FPC-III support