2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/sched/signal.h>
23 #include <linux/hrtimer.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
31 #include <linux/ratelimit.h>
32 #include <linux/string.h>
33 #include <linux/i2c.h>
35 #include <media/dvbdev.h>
36 #include <media/dvb_demux.h>
37 #include <media/dmxdev.h>
38 #include <media/dvb_net.h>
39 #include <media/dvb_frontend.h>
42 #include "qm1d1b0004.h"
45 #define DRIVER_NAME "earth-pt1"
47 #define PT1_PAGE_SHIFT 12
48 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
49 #define PT1_NR_UPACKETS 1024
50 #define PT1_NR_BUFS 511
52 struct pt1_buffer_page
{
53 __le32 upackets
[PT1_NR_UPACKETS
];
56 struct pt1_table_page
{
58 __le32 buf_pfns
[PT1_NR_BUFS
];
62 struct pt1_buffer_page
*page
;
67 struct pt1_table_page
*page
;
69 struct pt1_buffer bufs
[PT1_NR_BUFS
];
73 PT1_FE_CLK_20MHZ
, /* PT1 */
74 PT1_FE_CLK_25MHZ
, /* PT2 */
77 #define PT1_NR_ADAPS 4
84 struct i2c_adapter i2c_adap
;
86 struct pt1_adapter
*adaps
[PT1_NR_ADAPS
];
87 struct pt1_table
*tables
;
88 struct task_struct
*kthread
;
96 enum pt1_fe_clk fe_clk
;
108 struct dvb_adapter adap
;
109 struct dvb_demux demux
;
111 struct dmxdev dmxdev
;
112 struct dvb_frontend
*fe
;
113 struct i2c_client
*demod_i2c_client
;
114 struct i2c_client
*tuner_i2c_client
;
115 int (*orig_set_voltage
)(struct dvb_frontend
*fe
,
116 enum fe_sec_voltage voltage
);
117 int (*orig_sleep
)(struct dvb_frontend
*fe
);
118 int (*orig_init
)(struct dvb_frontend
*fe
);
120 enum fe_sec_voltage voltage
;
124 union pt1_tuner_config
{
125 struct qm1d1b0004_config qm1d1b0004
;
126 struct dvb_pll_config tda6651
;
130 struct i2c_board_info demod_info
;
131 struct tc90522_config demod_cfg
;
133 struct i2c_board_info tuner_info
;
134 union pt1_tuner_config tuner_cfg
;
137 static const struct pt1_config pt1_configs
[PT1_NR_ADAPS
] = {
140 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT
, 0x1b),
143 I2C_BOARD_INFO("qm1d1b0004", 0x60),
148 I2C_BOARD_INFO(TC90522_I2C_DEV_TER
, 0x1a),
151 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
156 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT
, 0x19),
159 I2C_BOARD_INFO("qm1d1b0004", 0x60),
164 I2C_BOARD_INFO(TC90522_I2C_DEV_TER
, 0x18),
167 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
172 static const u8 va1j5jf8007s_20mhz_configs
[][2] = {
173 {0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
174 {0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
175 {0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
176 {0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
179 static const u8 va1j5jf8007s_25mhz_configs
[][2] = {
180 {0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
181 {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
182 {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
183 {0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
186 static const u8 va1j5jf8007t_20mhz_configs
[][2] = {
187 {0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
188 {0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
189 {0x3b, 0x11}, {0x3c, 0x3f},
190 {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
194 static const u8 va1j5jf8007t_25mhz_configs
[][2] = {
195 {0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
196 {0x3a, 0x04}, {0x3b, 0x11}, {0x3c, 0x3f}, {0x5c, 0x40}, {0x5f, 0x80},
197 {0x75, 0x0a}, {0x76, 0x4c}, {0x77, 0x03}, {0xef, 0x01}
200 static int config_demod(struct i2c_client
*cl
, enum pt1_fe_clk clk
)
203 u8 buf
[2] = {0x01, 0x80};
205 const u8 (*cfg_data
)[2];
208 ret
= i2c_master_send(cl
, buf
, 2);
211 usleep_range(30000, 50000);
213 is_sat
= !strncmp(cl
->name
, TC90522_I2C_DEV_SAT
,
214 strlen(TC90522_I2C_DEV_SAT
));
216 struct i2c_msg msg
[2];
220 msg
[0].addr
= cl
->addr
;
225 msg
[1].addr
= cl
->addr
;
226 msg
[1].flags
= I2C_M_RD
;
229 ret
= i2c_transfer(cl
->adapter
, msg
, 2);
237 if (clk
== PT1_FE_CLK_20MHZ
) {
239 cfg_data
= va1j5jf8007s_20mhz_configs
;
240 len
= ARRAY_SIZE(va1j5jf8007s_20mhz_configs
);
242 cfg_data
= va1j5jf8007t_20mhz_configs
;
243 len
= ARRAY_SIZE(va1j5jf8007t_20mhz_configs
);
247 cfg_data
= va1j5jf8007s_25mhz_configs
;
248 len
= ARRAY_SIZE(va1j5jf8007s_25mhz_configs
);
250 cfg_data
= va1j5jf8007t_25mhz_configs
;
251 len
= ARRAY_SIZE(va1j5jf8007t_25mhz_configs
);
255 for (i
= 0; i
< len
; i
++) {
256 ret
= i2c_master_send(cl
, cfg_data
[i
], 2);
263 static void pt1_write_reg(struct pt1
*pt1
, int reg
, u32 data
)
265 writel(data
, pt1
->regs
+ reg
* 4);
268 static u32
pt1_read_reg(struct pt1
*pt1
, int reg
)
270 return readl(pt1
->regs
+ reg
* 4);
273 static unsigned int pt1_nr_tables
= 8;
274 module_param_named(nr_tables
, pt1_nr_tables
, uint
, 0);
276 static void pt1_increment_table_count(struct pt1
*pt1
)
278 pt1_write_reg(pt1
, 0, 0x00000020);
281 static void pt1_init_table_count(struct pt1
*pt1
)
283 pt1_write_reg(pt1
, 0, 0x00000010);
286 static void pt1_register_tables(struct pt1
*pt1
, u32 first_pfn
)
288 pt1_write_reg(pt1
, 5, first_pfn
);
289 pt1_write_reg(pt1
, 0, 0x0c000040);
292 static void pt1_unregister_tables(struct pt1
*pt1
)
294 pt1_write_reg(pt1
, 0, 0x08080000);
297 static int pt1_sync(struct pt1
*pt1
)
300 for (i
= 0; i
< 57; i
++) {
301 if (pt1_read_reg(pt1
, 0) & 0x20000000)
303 pt1_write_reg(pt1
, 0, 0x00000008);
305 dev_err(&pt1
->pdev
->dev
, "could not sync\n");
309 static u64
pt1_identify(struct pt1
*pt1
)
314 for (i
= 0; i
< 57; i
++) {
315 id
|= (u64
)(pt1_read_reg(pt1
, 0) >> 30 & 1) << i
;
316 pt1_write_reg(pt1
, 0, 0x00000008);
321 static int pt1_unlock(struct pt1
*pt1
)
324 pt1_write_reg(pt1
, 0, 0x00000008);
325 for (i
= 0; i
< 3; i
++) {
326 if (pt1_read_reg(pt1
, 0) & 0x80000000)
328 usleep_range(1000, 2000);
330 dev_err(&pt1
->pdev
->dev
, "could not unlock\n");
334 static int pt1_reset_pci(struct pt1
*pt1
)
337 pt1_write_reg(pt1
, 0, 0x01010000);
338 pt1_write_reg(pt1
, 0, 0x01000000);
339 for (i
= 0; i
< 10; i
++) {
340 if (pt1_read_reg(pt1
, 0) & 0x00000001)
342 usleep_range(1000, 2000);
344 dev_err(&pt1
->pdev
->dev
, "could not reset PCI\n");
348 static int pt1_reset_ram(struct pt1
*pt1
)
351 pt1_write_reg(pt1
, 0, 0x02020000);
352 pt1_write_reg(pt1
, 0, 0x02000000);
353 for (i
= 0; i
< 10; i
++) {
354 if (pt1_read_reg(pt1
, 0) & 0x00000002)
356 usleep_range(1000, 2000);
358 dev_err(&pt1
->pdev
->dev
, "could not reset RAM\n");
362 static int pt1_do_enable_ram(struct pt1
*pt1
)
366 status
= pt1_read_reg(pt1
, 0) & 0x00000004;
367 pt1_write_reg(pt1
, 0, 0x00000002);
368 for (i
= 0; i
< 10; i
++) {
369 for (j
= 0; j
< 1024; j
++) {
370 if ((pt1_read_reg(pt1
, 0) & 0x00000004) != status
)
373 usleep_range(1000, 2000);
375 dev_err(&pt1
->pdev
->dev
, "could not enable RAM\n");
379 static int pt1_enable_ram(struct pt1
*pt1
)
383 usleep_range(1000, 2000);
384 phase
= pt1
->pdev
->device
== 0x211a ? 128 : 166;
385 for (i
= 0; i
< phase
; i
++) {
386 ret
= pt1_do_enable_ram(pt1
);
393 static void pt1_disable_ram(struct pt1
*pt1
)
395 pt1_write_reg(pt1
, 0, 0x0b0b0000);
398 static void pt1_set_stream(struct pt1
*pt1
, int index
, int enabled
)
400 pt1_write_reg(pt1
, 2, 1 << (index
+ 8) | enabled
<< index
);
403 static void pt1_init_streams(struct pt1
*pt1
)
406 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
407 pt1_set_stream(pt1
, i
, 0);
410 static int pt1_filter(struct pt1
*pt1
, struct pt1_buffer_page
*page
)
415 struct pt1_adapter
*adap
;
420 if (!page
->upackets
[PT1_NR_UPACKETS
- 1])
423 for (i
= 0; i
< PT1_NR_UPACKETS
; i
++) {
424 upacket
= le32_to_cpu(page
->upackets
[i
]);
425 index
= (upacket
>> 29) - 1;
426 if (index
< 0 || index
>= PT1_NR_ADAPS
)
429 adap
= pt1
->adaps
[index
];
430 if (upacket
>> 25 & 1)
431 adap
->upacket_count
= 0;
432 else if (!adap
->upacket_count
)
435 if (upacket
>> 24 & 1)
436 printk_ratelimited(KERN_INFO
"earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
437 pt1
->table_index
, pt1
->buf_index
);
438 sc
= upacket
>> 26 & 0x7;
439 if (adap
->st_count
!= -1 && sc
!= ((adap
->st_count
+ 1) & 0x7))
440 printk_ratelimited(KERN_INFO
"earth-pt1: data loss in streamID(adapter)[%d]\n",
445 offset
= adap
->packet_count
* 188 + adap
->upacket_count
* 3;
446 buf
[offset
] = upacket
>> 16;
447 buf
[offset
+ 1] = upacket
>> 8;
448 if (adap
->upacket_count
!= 62)
449 buf
[offset
+ 2] = upacket
;
451 if (++adap
->upacket_count
>= 63) {
452 adap
->upacket_count
= 0;
453 if (++adap
->packet_count
>= 21) {
454 dvb_dmx_swfilter_packets(&adap
->demux
, buf
, 21);
455 adap
->packet_count
= 0;
460 page
->upackets
[PT1_NR_UPACKETS
- 1] = 0;
464 static int pt1_thread(void *data
)
467 struct pt1_buffer_page
*page
;
470 #define PT1_FETCH_DELAY 10
471 #define PT1_FETCH_DELAY_DELTA 2
476 while (!kthread_freezable_should_stop(&was_frozen
)) {
480 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
481 pt1_set_stream(pt1
, i
, !!pt1
->adaps
[i
]->users
);
484 page
= pt1
->tables
[pt1
->table_index
].bufs
[pt1
->buf_index
].page
;
485 if (!pt1_filter(pt1
, page
)) {
488 delay
= ktime_set(0, PT1_FETCH_DELAY
* NSEC_PER_MSEC
);
489 set_current_state(TASK_INTERRUPTIBLE
);
490 schedule_hrtimeout_range(&delay
,
491 PT1_FETCH_DELAY_DELTA
* NSEC_PER_MSEC
,
496 if (++pt1
->buf_index
>= PT1_NR_BUFS
) {
497 pt1_increment_table_count(pt1
);
499 if (++pt1
->table_index
>= pt1_nr_tables
)
500 pt1
->table_index
= 0;
507 static void pt1_free_page(struct pt1
*pt1
, void *page
, dma_addr_t addr
)
509 dma_free_coherent(&pt1
->pdev
->dev
, PT1_PAGE_SIZE
, page
, addr
);
512 static void *pt1_alloc_page(struct pt1
*pt1
, dma_addr_t
*addrp
, u32
*pfnp
)
517 page
= dma_alloc_coherent(&pt1
->pdev
->dev
, PT1_PAGE_SIZE
, &addr
,
522 BUG_ON(addr
& (PT1_PAGE_SIZE
- 1));
523 BUG_ON(addr
>> PT1_PAGE_SHIFT
>> 31 >> 1);
526 *pfnp
= addr
>> PT1_PAGE_SHIFT
;
530 static void pt1_cleanup_buffer(struct pt1
*pt1
, struct pt1_buffer
*buf
)
532 pt1_free_page(pt1
, buf
->page
, buf
->addr
);
536 pt1_init_buffer(struct pt1
*pt1
, struct pt1_buffer
*buf
, u32
*pfnp
)
538 struct pt1_buffer_page
*page
;
541 page
= pt1_alloc_page(pt1
, &addr
, pfnp
);
545 page
->upackets
[PT1_NR_UPACKETS
- 1] = 0;
552 static void pt1_cleanup_table(struct pt1
*pt1
, struct pt1_table
*table
)
556 for (i
= 0; i
< PT1_NR_BUFS
; i
++)
557 pt1_cleanup_buffer(pt1
, &table
->bufs
[i
]);
559 pt1_free_page(pt1
, table
->page
, table
->addr
);
563 pt1_init_table(struct pt1
*pt1
, struct pt1_table
*table
, u32
*pfnp
)
565 struct pt1_table_page
*page
;
570 page
= pt1_alloc_page(pt1
, &addr
, pfnp
);
574 for (i
= 0; i
< PT1_NR_BUFS
; i
++) {
575 ret
= pt1_init_buffer(pt1
, &table
->bufs
[i
], &buf_pfn
);
579 page
->buf_pfns
[i
] = cpu_to_le32(buf_pfn
);
582 pt1_increment_table_count(pt1
);
589 pt1_cleanup_buffer(pt1
, &table
->bufs
[i
]);
591 pt1_free_page(pt1
, page
, addr
);
595 static void pt1_cleanup_tables(struct pt1
*pt1
)
597 struct pt1_table
*tables
;
600 tables
= pt1
->tables
;
601 pt1_unregister_tables(pt1
);
603 for (i
= 0; i
< pt1_nr_tables
; i
++)
604 pt1_cleanup_table(pt1
, &tables
[i
]);
609 static int pt1_init_tables(struct pt1
*pt1
)
611 struct pt1_table
*tables
;
618 tables
= vmalloc(array_size(pt1_nr_tables
, sizeof(struct pt1_table
)));
622 pt1_init_table_count(pt1
);
625 ret
= pt1_init_table(pt1
, &tables
[0], &first_pfn
);
630 while (i
< pt1_nr_tables
) {
631 ret
= pt1_init_table(pt1
, &tables
[i
], &pfn
);
634 tables
[i
- 1].page
->next_pfn
= cpu_to_le32(pfn
);
638 tables
[pt1_nr_tables
- 1].page
->next_pfn
= cpu_to_le32(first_pfn
);
640 pt1_register_tables(pt1
, first_pfn
);
641 pt1
->tables
= tables
;
646 pt1_cleanup_table(pt1
, &tables
[i
]);
652 static int pt1_start_polling(struct pt1
*pt1
)
656 mutex_lock(&pt1
->lock
);
658 pt1
->kthread
= kthread_run(pt1_thread
, pt1
, "earth-pt1");
659 if (IS_ERR(pt1
->kthread
)) {
660 ret
= PTR_ERR(pt1
->kthread
);
664 mutex_unlock(&pt1
->lock
);
668 static int pt1_start_feed(struct dvb_demux_feed
*feed
)
670 struct pt1_adapter
*adap
;
671 adap
= container_of(feed
->demux
, struct pt1_adapter
, demux
);
672 if (!adap
->users
++) {
675 ret
= pt1_start_polling(adap
->pt1
);
678 pt1_set_stream(adap
->pt1
, adap
->index
, 1);
683 static void pt1_stop_polling(struct pt1
*pt1
)
687 mutex_lock(&pt1
->lock
);
688 for (i
= 0, count
= 0; i
< PT1_NR_ADAPS
; i
++)
689 count
+= pt1
->adaps
[i
]->users
;
691 if (count
== 0 && pt1
->kthread
) {
692 kthread_stop(pt1
->kthread
);
695 mutex_unlock(&pt1
->lock
);
698 static int pt1_stop_feed(struct dvb_demux_feed
*feed
)
700 struct pt1_adapter
*adap
;
701 adap
= container_of(feed
->demux
, struct pt1_adapter
, demux
);
702 if (!--adap
->users
) {
703 pt1_set_stream(adap
->pt1
, adap
->index
, 0);
704 pt1_stop_polling(adap
->pt1
);
710 pt1_update_power(struct pt1
*pt1
)
714 struct pt1_adapter
*adap
;
715 static const int sleep_bits
[] = {
722 bits
= pt1
->power
| !pt1
->reset
<< 3;
723 mutex_lock(&pt1
->lock
);
724 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
725 adap
= pt1
->adaps
[i
];
726 switch (adap
->voltage
) {
727 case SEC_VOLTAGE_13
: /* actually 11V */
730 case SEC_VOLTAGE_18
: /* actually 15V */
731 bits
|= 1 << 1 | 1 << 2;
737 /* XXX: The bits should be changed depending on adap->sleep. */
738 bits
|= sleep_bits
[i
];
740 pt1_write_reg(pt1
, 1, bits
);
741 mutex_unlock(&pt1
->lock
);
744 static int pt1_set_voltage(struct dvb_frontend
*fe
, enum fe_sec_voltage voltage
)
746 struct pt1_adapter
*adap
;
748 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
749 adap
->voltage
= voltage
;
750 pt1_update_power(adap
->pt1
);
752 if (adap
->orig_set_voltage
)
753 return adap
->orig_set_voltage(fe
, voltage
);
758 static int pt1_sleep(struct dvb_frontend
*fe
)
760 struct pt1_adapter
*adap
;
763 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
766 if (adap
->orig_sleep
)
767 ret
= adap
->orig_sleep(fe
);
770 pt1_update_power(adap
->pt1
);
774 static int pt1_wakeup(struct dvb_frontend
*fe
)
776 struct pt1_adapter
*adap
;
779 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
781 pt1_update_power(adap
->pt1
);
782 usleep_range(1000, 2000);
784 ret
= config_demod(adap
->demod_i2c_client
, adap
->pt1
->fe_clk
);
785 if (ret
== 0 && adap
->orig_init
)
786 ret
= adap
->orig_init(fe
);
790 static void pt1_free_adapter(struct pt1_adapter
*adap
)
792 adap
->demux
.dmx
.close(&adap
->demux
.dmx
);
793 dvb_dmxdev_release(&adap
->dmxdev
);
794 dvb_dmx_release(&adap
->demux
);
795 dvb_unregister_adapter(&adap
->adap
);
796 free_page((unsigned long)adap
->buf
);
800 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr
);
802 static struct pt1_adapter
*
803 pt1_alloc_adapter(struct pt1
*pt1
)
805 struct pt1_adapter
*adap
;
807 struct dvb_adapter
*dvb_adap
;
808 struct dvb_demux
*demux
;
809 struct dmxdev
*dmxdev
;
812 adap
= kzalloc(sizeof(struct pt1_adapter
), GFP_KERNEL
);
820 adap
->voltage
= SEC_VOLTAGE_OFF
;
823 buf
= (u8
*)__get_free_page(GFP_KERNEL
);
830 adap
->upacket_count
= 0;
831 adap
->packet_count
= 0;
834 dvb_adap
= &adap
->adap
;
835 dvb_adap
->priv
= adap
;
836 ret
= dvb_register_adapter(dvb_adap
, DRIVER_NAME
, THIS_MODULE
,
837 &pt1
->pdev
->dev
, adapter_nr
);
841 demux
= &adap
->demux
;
842 demux
->dmx
.capabilities
= DMX_TS_FILTERING
| DMX_SECTION_FILTERING
;
844 demux
->feednum
= 256;
845 demux
->filternum
= 256;
846 demux
->start_feed
= pt1_start_feed
;
847 demux
->stop_feed
= pt1_stop_feed
;
848 demux
->write_to_decoder
= NULL
;
849 ret
= dvb_dmx_init(demux
);
851 goto err_unregister_adapter
;
853 dmxdev
= &adap
->dmxdev
;
854 dmxdev
->filternum
= 256;
855 dmxdev
->demux
= &demux
->dmx
;
856 dmxdev
->capabilities
= 0;
857 ret
= dvb_dmxdev_init(dmxdev
, dvb_adap
);
859 goto err_dmx_release
;
864 dvb_dmx_release(demux
);
865 err_unregister_adapter
:
866 dvb_unregister_adapter(dvb_adap
);
868 free_page((unsigned long)buf
);
875 static void pt1_cleanup_adapters(struct pt1
*pt1
)
878 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
879 pt1_free_adapter(pt1
->adaps
[i
]);
882 static int pt1_init_adapters(struct pt1
*pt1
)
885 struct pt1_adapter
*adap
;
888 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
889 adap
= pt1_alloc_adapter(pt1
);
896 pt1
->adaps
[i
] = adap
;
902 pt1_free_adapter(pt1
->adaps
[i
]);
907 static void pt1_cleanup_frontend(struct pt1_adapter
*adap
)
909 dvb_unregister_frontend(adap
->fe
);
910 dvb_module_release(adap
->tuner_i2c_client
);
911 dvb_module_release(adap
->demod_i2c_client
);
914 static int pt1_init_frontend(struct pt1_adapter
*adap
, struct dvb_frontend
*fe
)
918 adap
->orig_set_voltage
= fe
->ops
.set_voltage
;
919 adap
->orig_sleep
= fe
->ops
.sleep
;
920 adap
->orig_init
= fe
->ops
.init
;
921 fe
->ops
.set_voltage
= pt1_set_voltage
;
922 fe
->ops
.sleep
= pt1_sleep
;
923 fe
->ops
.init
= pt1_wakeup
;
925 ret
= dvb_register_frontend(&adap
->adap
, fe
);
933 static void pt1_cleanup_frontends(struct pt1
*pt1
)
936 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
937 pt1_cleanup_frontend(pt1
->adaps
[i
]);
940 static int pt1_init_frontends(struct pt1
*pt1
)
945 for (i
= 0; i
< ARRAY_SIZE(pt1_configs
); i
++) {
946 const struct i2c_board_info
*info
;
947 struct tc90522_config dcfg
;
948 struct i2c_client
*cl
;
950 info
= &pt1_configs
[i
].demod_info
;
951 dcfg
= pt1_configs
[i
].demod_cfg
;
952 dcfg
.tuner_i2c
= NULL
;
955 cl
= dvb_module_probe("tc90522", info
->type
, &pt1
->i2c_adap
,
959 pt1
->adaps
[i
]->demod_i2c_client
= cl
;
961 if (!strncmp(cl
->name
, TC90522_I2C_DEV_SAT
,
962 strlen(TC90522_I2C_DEV_SAT
))) {
963 struct qm1d1b0004_config tcfg
;
965 info
= &pt1_configs
[i
].tuner_info
;
966 tcfg
= pt1_configs
[i
].tuner_cfg
.qm1d1b0004
;
968 cl
= dvb_module_probe("qm1d1b0004",
969 info
->type
, dcfg
.tuner_i2c
,
972 struct dvb_pll_config tcfg
;
974 info
= &pt1_configs
[i
].tuner_info
;
975 tcfg
= pt1_configs
[i
].tuner_cfg
.tda6651
;
977 cl
= dvb_module_probe("dvb_pll",
978 info
->type
, dcfg
.tuner_i2c
,
983 pt1
->adaps
[i
]->tuner_i2c_client
= cl
;
985 ret
= pt1_init_frontend(pt1
->adaps
[i
], dcfg
.fe
);
993 dvb_module_release(pt1
->adaps
[i
]->tuner_i2c_client
);
995 dvb_module_release(pt1
->adaps
[i
]->demod_i2c_client
);
997 dev_warn(&pt1
->pdev
->dev
, "failed to init FE(%d).\n", i
);
999 for (; i
>= 0; i
--) {
1000 dvb_unregister_frontend(pt1
->adaps
[i
]->fe
);
1001 dvb_module_release(pt1
->adaps
[i
]->tuner_i2c_client
);
1002 dvb_module_release(pt1
->adaps
[i
]->demod_i2c_client
);
1007 static void pt1_i2c_emit(struct pt1
*pt1
, int addr
, int busy
, int read_enable
,
1008 int clock
, int data
, int next_addr
)
1010 pt1_write_reg(pt1
, 4, addr
<< 18 | busy
<< 13 | read_enable
<< 12 |
1011 !clock
<< 11 | !data
<< 10 | next_addr
);
1014 static void pt1_i2c_write_bit(struct pt1
*pt1
, int addr
, int *addrp
, int data
)
1016 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, data
, addr
+ 1);
1017 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, data
, addr
+ 2);
1018 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 0, data
, addr
+ 3);
1022 static void pt1_i2c_read_bit(struct pt1
*pt1
, int addr
, int *addrp
)
1024 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, 1, addr
+ 1);
1025 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 1, addr
+ 2);
1026 pt1_i2c_emit(pt1
, addr
+ 2, 1, 1, 1, 1, addr
+ 3);
1027 pt1_i2c_emit(pt1
, addr
+ 3, 1, 0, 0, 1, addr
+ 4);
1031 static void pt1_i2c_write_byte(struct pt1
*pt1
, int addr
, int *addrp
, int data
)
1034 for (i
= 0; i
< 8; i
++)
1035 pt1_i2c_write_bit(pt1
, addr
, &addr
, data
>> (7 - i
) & 1);
1036 pt1_i2c_write_bit(pt1
, addr
, &addr
, 1);
1040 static void pt1_i2c_read_byte(struct pt1
*pt1
, int addr
, int *addrp
, int last
)
1043 for (i
= 0; i
< 8; i
++)
1044 pt1_i2c_read_bit(pt1
, addr
, &addr
);
1045 pt1_i2c_write_bit(pt1
, addr
, &addr
, last
);
1049 static void pt1_i2c_prepare(struct pt1
*pt1
, int addr
, int *addrp
)
1051 pt1_i2c_emit(pt1
, addr
, 1, 0, 1, 1, addr
+ 1);
1052 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1053 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 0, 0, addr
+ 3);
1058 pt1_i2c_write_msg(struct pt1
*pt1
, int addr
, int *addrp
, struct i2c_msg
*msg
)
1061 pt1_i2c_prepare(pt1
, addr
, &addr
);
1062 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->addr
<< 1);
1063 for (i
= 0; i
< msg
->len
; i
++)
1064 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->buf
[i
]);
1069 pt1_i2c_read_msg(struct pt1
*pt1
, int addr
, int *addrp
, struct i2c_msg
*msg
)
1072 pt1_i2c_prepare(pt1
, addr
, &addr
);
1073 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->addr
<< 1 | 1);
1074 for (i
= 0; i
< msg
->len
; i
++)
1075 pt1_i2c_read_byte(pt1
, addr
, &addr
, i
== msg
->len
- 1);
1079 static int pt1_i2c_end(struct pt1
*pt1
, int addr
)
1081 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, 0, addr
+ 1);
1082 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1083 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 1, 1, 0);
1085 pt1_write_reg(pt1
, 0, 0x00000004);
1087 if (signal_pending(current
))
1089 usleep_range(1000, 2000);
1090 } while (pt1_read_reg(pt1
, 0) & 0x00000080);
1094 static void pt1_i2c_begin(struct pt1
*pt1
, int *addrp
)
1099 pt1_i2c_emit(pt1
, addr
, 0, 0, 1, 1, addr
/* itself */);
1102 if (!pt1
->i2c_running
) {
1103 pt1_i2c_emit(pt1
, addr
, 1, 0, 1, 1, addr
+ 1);
1104 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1106 pt1
->i2c_running
= 1;
1111 static int pt1_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
1115 struct i2c_msg
*msg
, *next_msg
;
1120 pt1
= i2c_get_adapdata(adap
);
1122 for (i
= 0; i
< num
; i
++) {
1124 if (msg
->flags
& I2C_M_RD
)
1128 next_msg
= &msgs
[i
+ 1];
1132 if (next_msg
&& next_msg
->flags
& I2C_M_RD
) {
1135 len
= next_msg
->len
;
1139 pt1_i2c_begin(pt1
, &addr
);
1140 pt1_i2c_write_msg(pt1
, addr
, &addr
, msg
);
1141 pt1_i2c_read_msg(pt1
, addr
, &addr
, next_msg
);
1142 ret
= pt1_i2c_end(pt1
, addr
);
1146 word
= pt1_read_reg(pt1
, 2);
1148 next_msg
->buf
[len
] = word
;
1152 pt1_i2c_begin(pt1
, &addr
);
1153 pt1_i2c_write_msg(pt1
, addr
, &addr
, msg
);
1154 ret
= pt1_i2c_end(pt1
, addr
);
1163 static u32
pt1_i2c_func(struct i2c_adapter
*adap
)
1165 return I2C_FUNC_I2C
;
1168 static const struct i2c_algorithm pt1_i2c_algo
= {
1169 .master_xfer
= pt1_i2c_xfer
,
1170 .functionality
= pt1_i2c_func
,
1173 static void pt1_i2c_wait(struct pt1
*pt1
)
1176 for (i
= 0; i
< 128; i
++)
1177 pt1_i2c_emit(pt1
, 0, 0, 0, 1, 1, 0);
1180 static void pt1_i2c_init(struct pt1
*pt1
)
1183 for (i
= 0; i
< 1024; i
++)
1184 pt1_i2c_emit(pt1
, i
, 0, 0, 1, 1, 0);
1187 #ifdef CONFIG_PM_SLEEP
1189 static int pt1_suspend(struct device
*dev
)
1191 struct pci_dev
*pdev
= to_pci_dev(dev
);
1192 struct pt1
*pt1
= pci_get_drvdata(pdev
);
1194 pt1_init_streams(pt1
);
1195 pt1_disable_ram(pt1
);
1198 pt1_update_power(pt1
);
1202 static int pt1_resume(struct device
*dev
)
1204 struct pci_dev
*pdev
= to_pci_dev(dev
);
1205 struct pt1
*pt1
= pci_get_drvdata(pdev
);
1211 pt1_update_power(pt1
);
1216 ret
= pt1_sync(pt1
);
1222 ret
= pt1_unlock(pt1
);
1226 ret
= pt1_reset_pci(pt1
);
1230 ret
= pt1_reset_ram(pt1
);
1234 ret
= pt1_enable_ram(pt1
);
1238 pt1_init_streams(pt1
);
1241 pt1_update_power(pt1
);
1245 pt1_update_power(pt1
);
1246 usleep_range(1000, 2000);
1248 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
1249 dvb_frontend_reinitialise(pt1
->adaps
[i
]->fe
);
1251 pt1_init_table_count(pt1
);
1252 for (i
= 0; i
< pt1_nr_tables
; i
++) {
1255 for (j
= 0; j
< PT1_NR_BUFS
; j
++)
1256 pt1
->tables
[i
].bufs
[j
].page
->upackets
[PT1_NR_UPACKETS
-1]
1258 pt1_increment_table_count(pt1
);
1260 pt1_register_tables(pt1
, pt1
->tables
[0].addr
>> PT1_PAGE_SHIFT
);
1262 pt1
->table_index
= 0;
1264 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
1265 pt1
->adaps
[i
]->upacket_count
= 0;
1266 pt1
->adaps
[i
]->packet_count
= 0;
1267 pt1
->adaps
[i
]->st_count
= -1;
1273 dev_info(&pt1
->pdev
->dev
, "failed to resume PT1/PT2.");
1274 return 0; /* resume anyway */
1277 #endif /* CONFIG_PM_SLEEP */
1279 static void pt1_remove(struct pci_dev
*pdev
)
1284 pt1
= pci_get_drvdata(pdev
);
1288 kthread_stop(pt1
->kthread
);
1289 pt1_cleanup_tables(pt1
);
1290 pt1_cleanup_frontends(pt1
);
1291 pt1_disable_ram(pt1
);
1294 pt1_update_power(pt1
);
1295 pt1_cleanup_adapters(pt1
);
1296 i2c_del_adapter(&pt1
->i2c_adap
);
1298 pci_iounmap(pdev
, regs
);
1299 pci_release_regions(pdev
);
1300 pci_disable_device(pdev
);
1303 static int pt1_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1308 struct i2c_adapter
*i2c_adap
;
1310 ret
= pci_enable_device(pdev
);
1314 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1316 goto err_pci_disable_device
;
1318 pci_set_master(pdev
);
1320 ret
= pci_request_regions(pdev
, DRIVER_NAME
);
1322 goto err_pci_disable_device
;
1324 regs
= pci_iomap(pdev
, 0, 0);
1327 goto err_pci_release_regions
;
1330 pt1
= kzalloc(sizeof(struct pt1
), GFP_KERNEL
);
1333 goto err_pci_iounmap
;
1336 mutex_init(&pt1
->lock
);
1339 pt1
->fe_clk
= (pdev
->device
== 0x211a) ?
1340 PT1_FE_CLK_20MHZ
: PT1_FE_CLK_25MHZ
;
1341 pci_set_drvdata(pdev
, pt1
);
1343 ret
= pt1_init_adapters(pt1
);
1347 mutex_init(&pt1
->lock
);
1351 pt1_update_power(pt1
);
1353 i2c_adap
= &pt1
->i2c_adap
;
1354 i2c_adap
->algo
= &pt1_i2c_algo
;
1355 i2c_adap
->algo_data
= NULL
;
1356 i2c_adap
->dev
.parent
= &pdev
->dev
;
1357 strcpy(i2c_adap
->name
, DRIVER_NAME
);
1358 i2c_set_adapdata(i2c_adap
, pt1
);
1359 ret
= i2c_add_adapter(i2c_adap
);
1361 goto err_pt1_cleanup_adapters
;
1366 ret
= pt1_sync(pt1
);
1368 goto err_i2c_del_adapter
;
1372 ret
= pt1_unlock(pt1
);
1374 goto err_i2c_del_adapter
;
1376 ret
= pt1_reset_pci(pt1
);
1378 goto err_i2c_del_adapter
;
1380 ret
= pt1_reset_ram(pt1
);
1382 goto err_i2c_del_adapter
;
1384 ret
= pt1_enable_ram(pt1
);
1386 goto err_i2c_del_adapter
;
1388 pt1_init_streams(pt1
);
1391 pt1_update_power(pt1
);
1395 pt1_update_power(pt1
);
1396 usleep_range(1000, 2000);
1398 ret
= pt1_init_frontends(pt1
);
1400 goto err_pt1_disable_ram
;
1402 ret
= pt1_init_tables(pt1
);
1404 goto err_pt1_cleanup_frontends
;
1408 err_pt1_cleanup_frontends
:
1409 pt1_cleanup_frontends(pt1
);
1410 err_pt1_disable_ram
:
1411 pt1_disable_ram(pt1
);
1414 pt1_update_power(pt1
);
1415 err_i2c_del_adapter
:
1416 i2c_del_adapter(i2c_adap
);
1417 err_pt1_cleanup_adapters
:
1418 pt1_cleanup_adapters(pt1
);
1422 pci_iounmap(pdev
, regs
);
1423 err_pci_release_regions
:
1424 pci_release_regions(pdev
);
1425 err_pci_disable_device
:
1426 pci_disable_device(pdev
);
1432 static const struct pci_device_id pt1_id_table
[] = {
1433 { PCI_DEVICE(0x10ee, 0x211a) },
1434 { PCI_DEVICE(0x10ee, 0x222a) },
1437 MODULE_DEVICE_TABLE(pci
, pt1_id_table
);
1439 static SIMPLE_DEV_PM_OPS(pt1_pm_ops
, pt1_suspend
, pt1_resume
);
1441 static struct pci_driver pt1_driver
= {
1442 .name
= DRIVER_NAME
,
1444 .remove
= pt1_remove
,
1445 .id_table
= pt1_id_table
,
1446 .driver
.pm
= &pt1_pm_ops
,
1449 module_pci_driver(pt1_driver
);
1451 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1452 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1453 MODULE_LICENSE("GPL");