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perf tools: Don't clone maps from parent when synthesizing forks
[linux/fpc-iii.git] / drivers / media / platform / omap3isp / ispccdc.c
blob77b73e27a2746bf086d1bf86c7cb252582c94316
1 /*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17 #include <linux/module.h>
18 #include <linux/uaccess.h>
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/sched.h>
24 #include <linux/slab.h>
25 #include <media/v4l2-event.h>
26
27 #include "isp.h"
28 #include "ispreg.h"
29 #include "ispccdc.h"
30
31 #define CCDC_MIN_WIDTH 32
32 #define CCDC_MIN_HEIGHT 32
33
34 static struct v4l2_mbus_framefmt *
35 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
36 unsigned int pad, enum v4l2_subdev_format_whence which);
37
38 static const unsigned int ccdc_fmts[] = {
39 MEDIA_BUS_FMT_Y8_1X8,
40 MEDIA_BUS_FMT_Y10_1X10,
41 MEDIA_BUS_FMT_Y12_1X12,
42 MEDIA_BUS_FMT_SGRBG8_1X8,
43 MEDIA_BUS_FMT_SRGGB8_1X8,
44 MEDIA_BUS_FMT_SBGGR8_1X8,
45 MEDIA_BUS_FMT_SGBRG8_1X8,
46 MEDIA_BUS_FMT_SGRBG10_1X10,
47 MEDIA_BUS_FMT_SRGGB10_1X10,
48 MEDIA_BUS_FMT_SBGGR10_1X10,
49 MEDIA_BUS_FMT_SGBRG10_1X10,
50 MEDIA_BUS_FMT_SGRBG12_1X12,
51 MEDIA_BUS_FMT_SRGGB12_1X12,
52 MEDIA_BUS_FMT_SBGGR12_1X12,
53 MEDIA_BUS_FMT_SGBRG12_1X12,
54 MEDIA_BUS_FMT_YUYV8_2X8,
55 MEDIA_BUS_FMT_UYVY8_2X8,
56 };
57
58 /*
59 * ccdc_print_status - Print current CCDC Module register values.
60 * @ccdc: Pointer to ISP CCDC device.
61 *
62 * Also prints other debug information stored in the CCDC module.
63 */
64 #define CCDC_PRINT_REGISTER(isp, name)\
65 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
66 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
67
68 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
69 {
70 struct isp_device *isp = to_isp_device(ccdc);
71
72 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
73
74 CCDC_PRINT_REGISTER(isp, PCR);
75 CCDC_PRINT_REGISTER(isp, SYN_MODE);
76 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
77 CCDC_PRINT_REGISTER(isp, PIX_LINES);
78 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
79 CCDC_PRINT_REGISTER(isp, VERT_START);
80 CCDC_PRINT_REGISTER(isp, VERT_LINES);
81 CCDC_PRINT_REGISTER(isp, CULLING);
82 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
83 CCDC_PRINT_REGISTER(isp, SDOFST);
84 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
85 CCDC_PRINT_REGISTER(isp, CLAMP);
86 CCDC_PRINT_REGISTER(isp, DCSUB);
87 CCDC_PRINT_REGISTER(isp, COLPTN);
88 CCDC_PRINT_REGISTER(isp, BLKCMP);
89 CCDC_PRINT_REGISTER(isp, FPC);
90 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
91 CCDC_PRINT_REGISTER(isp, VDINT);
92 CCDC_PRINT_REGISTER(isp, ALAW);
93 CCDC_PRINT_REGISTER(isp, REC656IF);
94 CCDC_PRINT_REGISTER(isp, CFG);
95 CCDC_PRINT_REGISTER(isp, FMTCFG);
96 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
97 CCDC_PRINT_REGISTER(isp, FMT_VERT);
98 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
99 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
100 CCDC_PRINT_REGISTER(isp, PRGODD0);
101 CCDC_PRINT_REGISTER(isp, PRGODD1);
102 CCDC_PRINT_REGISTER(isp, VP_OUT);
103 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
104 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
105 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
106 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
107
108 dev_dbg(isp->dev, "--------------------------------------------\n");
109 }
110
111 /*
112 * omap3isp_ccdc_busy - Get busy state of the CCDC.
113 * @ccdc: Pointer to ISP CCDC device.
114 */
115 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
116 {
117 struct isp_device *isp = to_isp_device(ccdc);
118
119 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
120 ISPCCDC_PCR_BUSY;
121 }
122
123 /* -----------------------------------------------------------------------------
124 * Lens Shading Compensation
125 */
126
127 /*
128 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
129 * @ccdc: Pointer to ISP CCDC device.
130 * @lsc_cfg: the LSC configuration to check.
131 *
132 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
133 */
134 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
135 struct omap3isp_ccdc_lsc_config *lsc_cfg)
136 {
137 struct isp_device *isp = to_isp_device(ccdc);
138 struct v4l2_mbus_framefmt *format;
139 unsigned int paxel_width, paxel_height;
140 unsigned int paxel_shift_x, paxel_shift_y;
141 unsigned int min_width, min_height, min_size;
142 unsigned int input_width, input_height;
143
144 paxel_shift_x = lsc_cfg->gain_mode_m;
145 paxel_shift_y = lsc_cfg->gain_mode_n;
146
147 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
148 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
149 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
150 return -EINVAL;
151 }
152
153 if (lsc_cfg->offset & 3) {
154 dev_dbg(isp->dev,
155 "CCDC: LSC: Offset must be a multiple of 4\n");
156 return -EINVAL;
157 }
158
159 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
160 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
161 return -EINVAL;
162 }
163
164 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
165 V4L2_SUBDEV_FORMAT_ACTIVE);
166 input_width = format->width;
167 input_height = format->height;
168
169 /* Calculate minimum bytesize for validation */
170 paxel_width = 1 << paxel_shift_x;
171 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
172 >> paxel_shift_x) + 1;
173
174 paxel_height = 1 << paxel_shift_y;
175 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
176 >> paxel_shift_y) + 1;
177
178 min_size = 4 * min_width * min_height;
179 if (min_size > lsc_cfg->size) {
180 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
181 return -EINVAL;
182 }
183 if (lsc_cfg->offset < (min_width * 4)) {
184 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
185 return -EINVAL;
186 }
187 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
188 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
189 return -EINVAL;
190 }
191 return 0;
192 }
193
194 /*
195 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
196 * @ccdc: Pointer to ISP CCDC device.
197 */
198 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
199 dma_addr_t addr)
200 {
201 isp_reg_writel(to_isp_device(ccdc), addr,
202 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
203 }
204
205 /*
206 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
207 * @ccdc: Pointer to ISP CCDC device.
208 */
209 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
210 struct omap3isp_ccdc_lsc_config *cfg)
211 {
212 struct isp_device *isp = to_isp_device(ccdc);
213 int reg;
214
215 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
216 ISPCCDC_LSC_TABLE_OFFSET);
217
218 reg = 0;
219 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
220 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
221 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
222 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
223
224 reg = 0;
225 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
226 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
227 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
228 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
229 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
230 ISPCCDC_LSC_INITIAL);
231 }
232
233 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
234 {
235 struct isp_device *isp = to_isp_device(ccdc);
236 unsigned int wait;
237
238 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
239 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
240
241 /* timeout 1 ms */
242 for (wait = 0; wait < 1000; wait++) {
243 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
244 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
245 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
246 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
247 return 0;
248 }
249
250 rmb();
251 udelay(1);
252 }
253
254 return -ETIMEDOUT;
255 }
256
257 /*
258 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
259 * @ccdc: Pointer to ISP CCDC device.
260 * @enable: 0 Disables LSC, 1 Enables LSC.
261 */
262 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
263 {
264 struct isp_device *isp = to_isp_device(ccdc);
265 const struct v4l2_mbus_framefmt *format =
266 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
267 V4L2_SUBDEV_FORMAT_ACTIVE);
268
269 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
270 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
271 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
272 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
273 return -EINVAL;
274
275 if (enable)
276 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
277
278 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
279 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
280
281 if (enable) {
282 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
283 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
284 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
285 ccdc->lsc.state = LSC_STATE_STOPPED;
286 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
287 return -ETIMEDOUT;
288 }
289 ccdc->lsc.state = LSC_STATE_RUNNING;
290 } else {
291 ccdc->lsc.state = LSC_STATE_STOPPING;
292 }
293
294 return 0;
295 }
296
297 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
298 {
299 struct isp_device *isp = to_isp_device(ccdc);
300
301 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
302 ISPCCDC_LSC_BUSY;
303 }
304
305 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
306 * @ccdc: Pointer to ISP CCDC device
307 * @req: New configuration request
308 *
309 * context: in_interrupt()
310 */
311 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
312 struct ispccdc_lsc_config_req *req)
313 {
314 if (!req->enable)
315 return -EINVAL;
316
317 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
318 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
319 return -EINVAL;
320 }
321
322 if (ccdc_lsc_busy(ccdc))
323 return -EBUSY;
324
325 ccdc_lsc_setup_regs(ccdc, &req->config);
326 ccdc_lsc_program_table(ccdc, req->table.dma);
327 return 0;
328 }
329
330 /*
331 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
332 * @ccdc: Pointer to ISP CCDC device.
333 *
334 * Disables LSC, and defers enablement to shadow registers update time.
335 */
336 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
337 {
338 struct isp_device *isp = to_isp_device(ccdc);
339 /*
340 * From OMAP3 TRM: When this event is pending, the module
341 * goes into transparent mode (output =input). Normal
342 * operation can be resumed at the start of the next frame
343 * after:
344 * 1) Clearing this event
345 * 2) Disabling the LSC module
346 * 3) Enabling it
347 */
348 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
349 ISPCCDC_LSC_ENABLE);
350 ccdc->lsc.state = LSC_STATE_STOPPED;
351 }
352
353 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
354 struct ispccdc_lsc_config_req *req)
355 {
356 struct isp_device *isp = to_isp_device(ccdc);
357
358 if (req == NULL)
359 return;
360
361 if (req->table.addr) {
362 sg_free_table(&req->table.sgt);
363 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
364 req->table.dma);
365 }
366
367 kfree(req);
368 }
369
370 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
371 struct list_head *queue)
372 {
373 struct ispccdc_lsc_config_req *req, *n;
374 unsigned long flags;
375
376 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
377 list_for_each_entry_safe(req, n, queue, list) {
378 list_del(&req->list);
379 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
380 ccdc_lsc_free_request(ccdc, req);
381 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
382 }
383 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
384 }
385
386 static void ccdc_lsc_free_table_work(struct work_struct *work)
387 {
388 struct isp_ccdc_device *ccdc;
389 struct ispccdc_lsc *lsc;
390
391 lsc = container_of(work, struct ispccdc_lsc, table_work);
392 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
393
394 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
395 }
396
397 /*
398 * ccdc_lsc_config - Configure the LSC module from a userspace request
399 *
400 * Store the request LSC configuration in the LSC engine request pointer. The
401 * configuration will be applied to the hardware when the CCDC will be enabled,
402 * or at the next LSC interrupt if the CCDC is already running.
403 */
404 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
405 struct omap3isp_ccdc_update_config *config)
406 {
407 struct isp_device *isp = to_isp_device(ccdc);
408 struct ispccdc_lsc_config_req *req;
409 unsigned long flags;
410 u16 update;
411 int ret;
412
413 update = config->update &
414 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
415 if (!update)
416 return 0;
417
418 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
419 dev_dbg(to_device(ccdc),
420 "%s: Both LSC configuration and table need to be supplied\n",
421 __func__);
422 return -EINVAL;
423 }
424
425 req = kzalloc(sizeof(*req), GFP_KERNEL);
426 if (req == NULL)
427 return -ENOMEM;
428
429 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
430 if (copy_from_user(&req->config, config->lsc_cfg,
431 sizeof(req->config))) {
432 ret = -EFAULT;
433 goto done;
434 }
435
436 req->enable = 1;
437
438 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
439 &req->table.dma,
440 GFP_KERNEL);
441 if (req->table.addr == NULL) {
442 ret = -ENOMEM;
443 goto done;
444 }
445
446 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
447 req->table.addr, req->table.dma,
448 req->config.size);
449 if (ret < 0)
450 goto done;
451
452 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
453 req->table.sgt.nents, DMA_TO_DEVICE);
454
455 if (copy_from_user(req->table.addr, config->lsc,
456 req->config.size)) {
457 ret = -EFAULT;
458 goto done;
459 }
460
461 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
462 req->table.sgt.nents, DMA_TO_DEVICE);
463 }
464
465 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
466 if (ccdc->lsc.request) {
467 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
468 schedule_work(&ccdc->lsc.table_work);
469 }
470 ccdc->lsc.request = req;
471 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
472
473 ret = 0;
474
475 done:
476 if (ret < 0)
477 ccdc_lsc_free_request(ccdc, req);
478
479 return ret;
480 }
481
482 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
483 {
484 unsigned long flags;
485 int ret;
486
487 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
488 ret = ccdc->lsc.active != NULL;
489 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
490
491 return ret;
492 }
493
494 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
495 {
496 struct ispccdc_lsc *lsc = &ccdc->lsc;
497
498 if (lsc->state != LSC_STATE_STOPPED)
499 return -EINVAL;
500
501 if (lsc->active) {
502 list_add_tail(&lsc->active->list, &lsc->free_queue);
503 lsc->active = NULL;
504 }
505
506 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
507 omap3isp_sbl_disable(to_isp_device(ccdc),
508 OMAP3_ISP_SBL_CCDC_LSC_READ);
509 list_add_tail(&lsc->request->list, &lsc->free_queue);
510 lsc->request = NULL;
511 goto done;
512 }
513
514 lsc->active = lsc->request;
515 lsc->request = NULL;
516 __ccdc_lsc_enable(ccdc, 1);
517
518 done:
519 if (!list_empty(&lsc->free_queue))
520 schedule_work(&lsc->table_work);
521
522 return 0;
523 }
524
525 /* -----------------------------------------------------------------------------
526 * Parameters configuration
527 */
528
529 /*
530 * ccdc_configure_clamp - Configure optical-black or digital clamping
531 * @ccdc: Pointer to ISP CCDC device.
532 *
533 * The CCDC performs either optical-black or digital clamp. Configure and enable
534 * the selected clamp method.
535 */
536 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
537 {
538 struct isp_device *isp = to_isp_device(ccdc);
539 u32 clamp;
540
541 if (ccdc->obclamp) {
542 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
543 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
544 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
545 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
546 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
547 } else {
548 isp_reg_writel(isp, ccdc->clamp.dcsubval,
549 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
550 }
551
552 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
553 ISPCCDC_CLAMP_CLAMPEN,
554 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
555 }
556
557 /*
558 * ccdc_configure_fpc - Configure Faulty Pixel Correction
559 * @ccdc: Pointer to ISP CCDC device.
560 */
561 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
562 {
563 struct isp_device *isp = to_isp_device(ccdc);
564
565 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
566
567 if (!ccdc->fpc_en)
568 return;
569
570 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
571 ISPCCDC_FPC_ADDR);
572 /* The FPNUM field must be set before enabling FPC. */
573 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
574 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
575 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
576 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
577 }
578
579 /*
580 * ccdc_configure_black_comp - Configure Black Level Compensation.
581 * @ccdc: Pointer to ISP CCDC device.
582 */
583 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
584 {
585 struct isp_device *isp = to_isp_device(ccdc);
586 u32 blcomp;
587
588 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
589 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
590 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
591 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
592
593 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
594 }
595
596 /*
597 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
598 * @ccdc: Pointer to ISP CCDC device.
599 */
600 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
601 {
602 struct isp_device *isp = to_isp_device(ccdc);
603
604 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
605 ISPCCDC_SYN_MODE_LPF,
606 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
607 }
608
609 /*
610 * ccdc_configure_alaw - Configure A-law compression.
611 * @ccdc: Pointer to ISP CCDC device.
612 */
613 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
614 {
615 struct isp_device *isp = to_isp_device(ccdc);
616 const struct isp_format_info *info;
617 u32 alaw = 0;
618
619 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
620
621 switch (info->width) {
622 case 8:
623 return;
624
625 case 10:
626 alaw = ISPCCDC_ALAW_GWDI_9_0;
627 break;
628 case 11:
629 alaw = ISPCCDC_ALAW_GWDI_10_1;
630 break;
631 case 12:
632 alaw = ISPCCDC_ALAW_GWDI_11_2;
633 break;
634 case 13:
635 alaw = ISPCCDC_ALAW_GWDI_12_3;
636 break;
637 }
638
639 if (ccdc->alaw)
640 alaw |= ISPCCDC_ALAW_CCDTBL;
641
642 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
643 }
644
645 /*
646 * ccdc_config_imgattr - Configure sensor image specific attributes.
647 * @ccdc: Pointer to ISP CCDC device.
648 * @colptn: Color pattern of the sensor.
649 */
650 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
651 {
652 struct isp_device *isp = to_isp_device(ccdc);
653
654 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
655 }
656
657 /*
658 * ccdc_config - Set CCDC configuration from userspace
659 * @ccdc: Pointer to ISP CCDC device.
660 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
661 *
662 * Returns 0 if successful, -EINVAL if the pointer to the configuration
663 * structure is null, or the copy_from_user function fails to copy user space
664 * memory to kernel space memory.
665 */
666 static int ccdc_config(struct isp_ccdc_device *ccdc,
667 struct omap3isp_ccdc_update_config *ccdc_struct)
668 {
669 struct isp_device *isp = to_isp_device(ccdc);
670 unsigned long flags;
671
672 spin_lock_irqsave(&ccdc->lock, flags);
673 ccdc->shadow_update = 1;
674 spin_unlock_irqrestore(&ccdc->lock, flags);
675
676 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
677 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
678 ccdc->update |= OMAP3ISP_CCDC_ALAW;
679 }
680
681 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
682 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
683 ccdc->update |= OMAP3ISP_CCDC_LPF;
684 }
685
686 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
687 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
688 sizeof(ccdc->clamp))) {
689 ccdc->shadow_update = 0;
690 return -EFAULT;
691 }
692
693 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
695 }
696
697 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
698 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
699 sizeof(ccdc->blcomp))) {
700 ccdc->shadow_update = 0;
701 return -EFAULT;
702 }
703
704 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
705 }
706
707 ccdc->shadow_update = 0;
708
709 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
710 struct omap3isp_ccdc_fpc fpc;
711 struct ispccdc_fpc fpc_old = { .addr = NULL, };
712 struct ispccdc_fpc fpc_new;
713 u32 size;
714
715 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
716 return -EBUSY;
717
718 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
719
720 if (ccdc->fpc_en) {
721 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
722 return -EFAULT;
723
724 size = fpc.fpnum * 4;
725
726 /*
727 * The table address must be 64-bytes aligned, which is
728 * guaranteed by dma_alloc_coherent().
729 */
730 fpc_new.fpnum = fpc.fpnum;
731 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
732 &fpc_new.dma,
733 GFP_KERNEL);
734 if (fpc_new.addr == NULL)
735 return -ENOMEM;
736
737 if (copy_from_user(fpc_new.addr,
738 (__force void __user *)(long)fpc.fpcaddr,
739 size)) {
740 dma_free_coherent(isp->dev, size, fpc_new.addr,
741 fpc_new.dma);
742 return -EFAULT;
743 }
744
745 fpc_old = ccdc->fpc;
746 ccdc->fpc = fpc_new;
747 }
748
749 ccdc_configure_fpc(ccdc);
750
751 if (fpc_old.addr != NULL)
752 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
753 fpc_old.addr, fpc_old.dma);
754 }
755
756 return ccdc_lsc_config(ccdc, ccdc_struct);
757 }
758
759 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
760 {
761 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
762 ccdc_configure_alaw(ccdc);
763 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
764 }
765
766 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
767 ccdc_configure_lpf(ccdc);
768 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
769 }
770
771 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
772 ccdc_configure_clamp(ccdc);
773 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
774 }
775
776 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
777 ccdc_configure_black_comp(ccdc);
778 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
779 }
780 }
781
782 /*
783 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
784 * @isp: Pointer to ISP device
785 */
786 void omap3isp_ccdc_restore_context(struct isp_device *isp)
787 {
788 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
789
790 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
791
792 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
793 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
794 ccdc_apply_controls(ccdc);
795 ccdc_configure_fpc(ccdc);
796 }
797
798 /* -----------------------------------------------------------------------------
799 * Format- and pipeline-related configuration helpers
800 */
801
802 /*
803 * ccdc_config_vp - Configure the Video Port.
804 * @ccdc: Pointer to ISP CCDC device.
805 */
806 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
807 {
808 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
809 struct isp_device *isp = to_isp_device(ccdc);
810 const struct isp_format_info *info;
811 struct v4l2_mbus_framefmt *format;
812 unsigned long l3_ick = pipe->l3_ick;
813 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
814 unsigned int div = 0;
815 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
816
817 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
818
819 if (!format->code) {
820 /* Disable the video port when the input format isn't supported.
821 * This is indicated by a pixel code set to 0.
822 */
823 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
824 return;
825 }
826
827 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
828 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
829 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
830 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
831 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
832 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
833
834 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
835 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
836 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
837
838 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
839
840 switch (info->width) {
841 case 8:
842 case 10:
843 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
844 break;
845 case 11:
846 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
847 break;
848 case 12:
849 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
850 break;
851 case 13:
852 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
853 break;
854 }
855
856 if (pipe->input)
857 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
858 else if (pipe->external_rate)
859 div = l3_ick / pipe->external_rate;
860
861 div = clamp(div, 2U, max_div);
862 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
863
864 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
865 }
866
867 /*
868 * ccdc_config_outlineoffset - Configure memory saving output line offset
869 * @ccdc: Pointer to ISP CCDC device.
870 * @bpl: Number of bytes per line when stored in memory.
871 * @field: Field order when storing interlaced formats in memory.
872 *
873 * Configure the offsets for the line output control:
874 *
875 * - The horizontal line offset is defined as the number of bytes between the
876 * start of two consecutive lines in memory. Set it to the given bytes per
877 * line value.
878 *
879 * - The field offset value is defined as the number of lines to offset the
880 * start of the field identified by FID = 1. Set it to one.
881 *
882 * - The line offset values are defined as the number of lines (as defined by
883 * the horizontal line offset) between the start of two consecutive lines for
884 * all combinations of odd/even lines in odd/even fields. When interleaving
885 * fields set them all to two lines, and to one line otherwise.
886 */
887 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
888 unsigned int bpl,
889 enum v4l2_field field)
890 {
891 struct isp_device *isp = to_isp_device(ccdc);
892 u32 sdofst = 0;
893
894 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
895 ISPCCDC_HSIZE_OFF);
896
897 switch (field) {
898 case V4L2_FIELD_INTERLACED_TB:
899 case V4L2_FIELD_INTERLACED_BT:
900 /* When interleaving fields in memory offset field one by one
901 * line and set the line offset to two lines.
902 */
903 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
904 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
905 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
906 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
907 break;
908
909 default:
910 /* In all other cases set the line offsets to one line. */
911 break;
912 }
913
914 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
915 }
916
917 /*
918 * ccdc_set_outaddr - Set memory address to save output image
919 * @ccdc: Pointer to ISP CCDC device.
920 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
921 *
922 * Sets the memory address where the output will be saved.
923 */
924 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
925 {
926 struct isp_device *isp = to_isp_device(ccdc);
927
928 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
929 }
930
931 /*
932 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
933 * @ccdc: Pointer to ISP CCDC device.
934 * @max_rate: Maximum calculated data rate.
935 *
936 * Returns in *max_rate less value between calculated and passed
937 */
938 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
939 unsigned int *max_rate)
940 {
941 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
942 unsigned int rate;
943
944 if (pipe == NULL)
945 return;
946
947 /*
948 * TRM says that for parallel sensors the maximum data rate
949 * should be 90% form L3/2 clock, otherwise just L3/2.
950 */
951 if (ccdc->input == CCDC_INPUT_PARALLEL)
952 rate = pipe->l3_ick / 2 * 9 / 10;
953 else
954 rate = pipe->l3_ick / 2;
955
956 *max_rate = min(*max_rate, rate);
957 }
958
959 /*
960 * ccdc_config_sync_if - Set CCDC sync interface configuration
961 * @ccdc: Pointer to ISP CCDC device.
962 * @parcfg: Parallel interface platform data (may be NULL)
963 * @data_size: Data size
964 */
965 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
966 struct isp_parallel_cfg *parcfg,
967 unsigned int data_size)
968 {
969 struct isp_device *isp = to_isp_device(ccdc);
970 const struct v4l2_mbus_framefmt *format;
971 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
972
973 format = &ccdc->formats[CCDC_PAD_SINK];
974
975 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
976 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
977 /* According to the OMAP3 TRM the input mode only affects SYNC
978 * mode, enabling BT.656 mode should take precedence. However,
979 * in practice setting the input mode to YCbCr data on 8 bits
980 * seems to be required in BT.656 mode. In SYNC mode set it to
981 * YCbCr on 16 bits as the bridge is enabled in that case.
982 */
983 if (ccdc->bt656)
984 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
985 else
986 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
987 }
988
989 switch (data_size) {
990 case 8:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
992 break;
993 case 10:
994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
995 break;
996 case 11:
997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
998 break;
999 case 12:
1000 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
1001 break;
1002 }
1003
1004 if (parcfg && parcfg->data_pol)
1005 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1006
1007 if (parcfg && parcfg->hs_pol)
1008 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1009
1010 /* The polarity of the vertical sync signal output by the BT.656
1011 * decoder is not documented and seems to be active low.
1012 */
1013 if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1014 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1015
1016 if (parcfg && parcfg->fld_pol)
1017 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1018
1019 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1020
1021 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1022 * hardware seems to ignore it in all other input modes.
1023 */
1024 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1025 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1026 ISPCCDC_CFG_Y8POS);
1027 else
1028 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1029 ISPCCDC_CFG_Y8POS);
1030
1031 /* Enable or disable BT.656 mode, including error correction for the
1032 * synchronization codes.
1033 */
1034 if (ccdc->bt656)
1035 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1036 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1037 else
1038 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1039 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1040
1041 }
1042
1043 /* CCDC formats descriptions */
1044 static const u32 ccdc_sgrbg_pattern =
1045 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1046 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1047 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1048 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1049 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1050 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1051 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1052 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1053 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1054 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1055 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1056 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1057 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1058 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1059 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1060 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1061
1062 static const u32 ccdc_srggb_pattern =
1063 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1064 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1065 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1066 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1067 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1068 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1069 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1070 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1071 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1072 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1073 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1074 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1075 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1076 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1077 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1078 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1079
1080 static const u32 ccdc_sbggr_pattern =
1081 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1082 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1083 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1084 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1085 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1086 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1087 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1088 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1089 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1090 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1091 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1092 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1093 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1094 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1095 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1096 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1097
1098 static const u32 ccdc_sgbrg_pattern =
1099 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1100 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1101 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1102 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1103 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1104 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1105 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1106 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1107 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1108 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1109 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1110 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1111 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1112 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1113 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1114 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1115
1116 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1117 {
1118 struct isp_device *isp = to_isp_device(ccdc);
1119 struct isp_parallel_cfg *parcfg = NULL;
1120 struct v4l2_subdev *sensor;
1121 struct v4l2_mbus_framefmt *format;
1122 const struct v4l2_rect *crop;
1123 const struct isp_format_info *fmt_info;
1124 struct v4l2_subdev_format fmt_src;
1125 unsigned int depth_out;
1126 unsigned int depth_in = 0;
1127 struct media_pad *pad;
1128 unsigned long flags;
1129 unsigned int bridge;
1130 unsigned int shift;
1131 unsigned int nph;
1132 unsigned int sph;
1133 u32 syn_mode;
1134 u32 ccdc_pattern;
1135
1136 ccdc->bt656 = false;
1137 ccdc->fields = 0;
1138
1139 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
1140 sensor = media_entity_to_v4l2_subdev(pad->entity);
1141 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1142 struct v4l2_subdev *sd =
1143 to_isp_pipeline(&ccdc->subdev.entity)->external;
1144
1145 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel;
1146 ccdc->bt656 = parcfg->bt656;
1147 }
1148
1149 /* CCDC_PAD_SINK */
1150 format = &ccdc->formats[CCDC_PAD_SINK];
1151
1152 /* Compute the lane shifter shift value and enable the bridge when the
1153 * input format is a non-BT.656 YUV variant.
1154 */
1155 fmt_src.pad = pad->index;
1156 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1157 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1158 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1159 depth_in = fmt_info->width;
1160 }
1161
1162 fmt_info = omap3isp_video_format_info(format->code);
1163 depth_out = fmt_info->width;
1164 shift = depth_in - depth_out;
1165
1166 if (ccdc->bt656)
1167 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1168 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1169 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1170 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1171 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1172 else
1173 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1174
1175 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1176
1177 /* Configure the sync interface. */
1178 ccdc_config_sync_if(ccdc, parcfg, depth_out);
1179
1180 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1181
1182 /* Use the raw, unprocessed data when writing to memory. The H3A and
1183 * histogram modules are still fed with lens shading corrected data.
1184 */
1185 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1186
1187 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1188 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1189 else
1190 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1191
1192 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1193 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1194 else
1195 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1196
1197 /* Mosaic filter */
1198 switch (format->code) {
1199 case MEDIA_BUS_FMT_SRGGB10_1X10:
1200 case MEDIA_BUS_FMT_SRGGB12_1X12:
1201 ccdc_pattern = ccdc_srggb_pattern;
1202 break;
1203 case MEDIA_BUS_FMT_SBGGR10_1X10:
1204 case MEDIA_BUS_FMT_SBGGR12_1X12:
1205 ccdc_pattern = ccdc_sbggr_pattern;
1206 break;
1207 case MEDIA_BUS_FMT_SGBRG10_1X10:
1208 case MEDIA_BUS_FMT_SGBRG12_1X12:
1209 ccdc_pattern = ccdc_sgbrg_pattern;
1210 break;
1211 default:
1212 /* Use GRBG */
1213 ccdc_pattern = ccdc_sgrbg_pattern;
1214 break;
1215 }
1216 ccdc_config_imgattr(ccdc, ccdc_pattern);
1217
1218 /* Generate VD0 on the last line of the image and VD1 on the
1219 * 2/3 height line.
1220 */
1221 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1222 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1223 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1224
1225 /* CCDC_PAD_SOURCE_OF */
1226 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1227 crop = &ccdc->crop;
1228
1229 /* The horizontal coordinates are expressed in pixel clock cycles. We
1230 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1231 * SYNC mode regardless of the format as the bridge is enabled for YUV
1232 * formats in that case.
1233 */
1234 if (ccdc->bt656) {
1235 sph = crop->left * 2;
1236 nph = crop->width * 2 - 1;
1237 } else {
1238 sph = crop->left;
1239 nph = crop->width - 1;
1240 }
1241
1242 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1243 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1244 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1245 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1246 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1248 isp_reg_writel(isp, (crop->height - 1)
1249 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1250 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1251
1252 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1253 format->field);
1254
1255 /* When interleaving fields enable processing of the field input signal.
1256 * This will cause the line output control module to apply the field
1257 * offset to field 1.
1258 */
1259 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1260 (format->field == V4L2_FIELD_INTERLACED_TB ||
1261 format->field == V4L2_FIELD_INTERLACED_BT))
1262 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1263
1264 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1265 * YUYV.
1266 */
1267 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1268 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1269 ISPCCDC_CFG_BSWD);
1270 else
1271 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1272 ISPCCDC_CFG_BSWD);
1273
1274 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1275 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1276 * for simplicity.
1277 */
1278 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1279 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1280 else
1281 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1282
1283 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1284
1285 /* CCDC_PAD_SOURCE_VP */
1286 ccdc_config_vp(ccdc);
1287
1288 /* Lens shading correction. */
1289 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1290 if (ccdc->lsc.request == NULL)
1291 goto unlock;
1292
1293 WARN_ON(ccdc->lsc.active);
1294
1295 /* Get last good LSC configuration. If it is not supported for
1296 * the current active resolution discard it.
1297 */
1298 if (ccdc->lsc.active == NULL &&
1299 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1300 ccdc->lsc.active = ccdc->lsc.request;
1301 } else {
1302 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1303 schedule_work(&ccdc->lsc.table_work);
1304 }
1305
1306 ccdc->lsc.request = NULL;
1307
1308 unlock:
1309 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1310
1311 ccdc_apply_controls(ccdc);
1312 }
1313
1314 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1315 {
1316 struct isp_device *isp = to_isp_device(ccdc);
1317
1318 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1319 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1320
1321 ccdc->running = enable;
1322 }
1323
1324 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1325 {
1326 unsigned long flags;
1327 int ret = 0;
1328
1329 spin_lock_irqsave(&ccdc->lock, flags);
1330 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1331 ccdc->stopping = CCDC_STOP_REQUEST;
1332 if (!ccdc->running)
1333 ccdc->stopping = CCDC_STOP_FINISHED;
1334 spin_unlock_irqrestore(&ccdc->lock, flags);
1335
1336 ret = wait_event_timeout(ccdc->wait,
1337 ccdc->stopping == CCDC_STOP_FINISHED,
1338 msecs_to_jiffies(2000));
1339 if (ret == 0) {
1340 ret = -ETIMEDOUT;
1341 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1342 }
1343
1344 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1345
1346 mutex_lock(&ccdc->ioctl_lock);
1347 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1348 ccdc->lsc.request = ccdc->lsc.active;
1349 ccdc->lsc.active = NULL;
1350 cancel_work_sync(&ccdc->lsc.table_work);
1351 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1352 mutex_unlock(&ccdc->ioctl_lock);
1353
1354 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1355
1356 return ret > 0 ? 0 : ret;
1357 }
1358
1359 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1360 {
1361 if (ccdc_lsc_is_configured(ccdc))
1362 __ccdc_lsc_enable(ccdc, 1);
1363 __ccdc_enable(ccdc, 1);
1364 }
1365
1366 /* -----------------------------------------------------------------------------
1367 * Interrupt handling
1368 */
1369
1370 /*
1371 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1372 * @ccdc: Pointer to ISP CCDC device.
1373 *
1374 * Returns zero if the CCDC is idle and the image has been written to
1375 * memory, too.
1376 */
1377 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1378 {
1379 struct isp_device *isp = to_isp_device(ccdc);
1380
1381 return omap3isp_ccdc_busy(ccdc)
1382 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1383 ISPSBL_CCDC_WR_0_DATA_READY)
1384 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1385 ISPSBL_CCDC_WR_0_DATA_READY)
1386 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1387 ISPSBL_CCDC_WR_0_DATA_READY)
1388 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1389 ISPSBL_CCDC_WR_0_DATA_READY);
1390 }
1391
1392 /*
1393 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1394 * @ccdc: Pointer to ISP CCDC device.
1395 * @max_wait: Max retry count in us for wait for idle/busy transition.
1396 */
1397 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1398 unsigned int max_wait)
1399 {
1400 unsigned int wait = 0;
1401
1402 if (max_wait == 0)
1403 max_wait = 10000; /* 10 ms */
1404
1405 for (wait = 0; wait <= max_wait; wait++) {
1406 if (!ccdc_sbl_busy(ccdc))
1407 return 0;
1408
1409 rmb();
1410 udelay(1);
1411 }
1412
1413 return -EBUSY;
1414 }
1415
1416 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1417 * @ccdc: Pointer to ISP CCDC device.
1418 * @event: Pointing which event trigger handler
1419 *
1420 * Return 1 when the event and stopping request combination is satisfied,
1421 * zero otherwise.
1422 */
1423 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1424 {
1425 int rval = 0;
1426
1427 switch ((ccdc->stopping & 3) | event) {
1428 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1429 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1430 __ccdc_lsc_enable(ccdc, 0);
1431 __ccdc_enable(ccdc, 0);
1432 ccdc->stopping = CCDC_STOP_EXECUTED;
1433 return 1;
1434
1435 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1436 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1437 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1438 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1439 rval = 1;
1440 break;
1441
1442 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1443 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1444 rval = 1;
1445 break;
1446
1447 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1448 return 1;
1449 }
1450
1451 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1452 wake_up(&ccdc->wait);
1453 rval = 1;
1454 }
1455
1456 return rval;
1457 }
1458
1459 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1460 {
1461 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1462 struct video_device *vdev = ccdc->subdev.devnode;
1463 struct v4l2_event event;
1464
1465 /* Frame number propagation */
1466 atomic_inc(&pipe->frame_number);
1467
1468 memset(&event, 0, sizeof(event));
1469 event.type = V4L2_EVENT_FRAME_SYNC;
1470 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1471
1472 v4l2_event_queue(vdev, &event);
1473 }
1474
1475 /*
1476 * ccdc_lsc_isr - Handle LSC events
1477 * @ccdc: Pointer to ISP CCDC device.
1478 * @events: LSC events
1479 */
1480 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1481 {
1482 unsigned long flags;
1483
1484 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1485 struct isp_pipeline *pipe =
1486 to_isp_pipeline(&ccdc->subdev.entity);
1487
1488 ccdc_lsc_error_handler(ccdc);
1489 pipe->error = true;
1490 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1491 }
1492
1493 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1494 return;
1495
1496 /* LSC_DONE interrupt occur, there are two cases
1497 * 1. stopping for reconfiguration
1498 * 2. stopping because of STREAM OFF command
1499 */
1500 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1501
1502 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1503 ccdc->lsc.state = LSC_STATE_STOPPED;
1504
1505 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1506 goto done;
1507
1508 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1509 goto done;
1510
1511 /* LSC is in STOPPING state, change to the new state */
1512 ccdc->lsc.state = LSC_STATE_STOPPED;
1513
1514 /* This is an exception. Start of frame and LSC_DONE interrupt
1515 * have been received on the same time. Skip this event and wait
1516 * for better times.
1517 */
1518 if (events & IRQ0STATUS_HS_VS_IRQ)
1519 goto done;
1520
1521 /* The LSC engine is stopped at this point. Enable it if there's a
1522 * pending request.
1523 */
1524 if (ccdc->lsc.request == NULL)
1525 goto done;
1526
1527 ccdc_lsc_enable(ccdc);
1528
1529 done:
1530 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1531 }
1532
1533 /*
1534 * Check whether the CCDC has captured all fields necessary to complete the
1535 * buffer.
1536 */
1537 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1538 {
1539 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1540 struct isp_device *isp = to_isp_device(ccdc);
1541 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1542 enum v4l2_field field;
1543
1544 /* When the input is progressive fields don't matter. */
1545 if (of_field == V4L2_FIELD_NONE)
1546 return true;
1547
1548 /* Read the current field identifier. */
1549 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1550 & ISPCCDC_SYN_MODE_FLDSTAT
1551 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1552
1553 /* When capturing fields in alternate order just store the current field
1554 * identifier in the pipeline.
1555 */
1556 if (of_field == V4L2_FIELD_ALTERNATE) {
1557 pipe->field = field;
1558 return true;
1559 }
1560
1561 /* The format is interlaced. Make sure we've captured both fields. */
1562 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1563 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1564
1565 if (ccdc->fields != CCDC_FIELD_BOTH)
1566 return false;
1567
1568 /* Verify that the field just captured corresponds to the last field
1569 * needed based on the desired field order.
1570 */
1571 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1572 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1573 return false;
1574
1575 /* The buffer can be completed, reset the fields for the next buffer. */
1576 ccdc->fields = 0;
1577
1578 return true;
1579 }
1580
1581 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1582 {
1583 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1584 struct isp_device *isp = to_isp_device(ccdc);
1585 struct isp_buffer *buffer;
1586
1587 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1588 * doesn't explicitly state if that's supposed to happen or not, so it
1589 * can be considered as a hardware bug or as a feature, but we have to
1590 * deal with it anyway). Disabling the CCDC when no buffer is available
1591 * would thus not be enough, we need to handle the situation explicitly.
1592 */
1593 if (list_empty(&ccdc->video_out.dmaqueue))
1594 return 0;
1595
1596 /* We're in continuous mode, and memory writes were disabled due to a
1597 * buffer underrun. Reenable them now that we have a buffer. The buffer
1598 * address has been set in ccdc_video_queue.
1599 */
1600 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1601 ccdc->underrun = 0;
1602 return 1;
1603 }
1604
1605 /* Wait for the CCDC to become idle. */
1606 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1607 dev_info(isp->dev, "CCDC won't become idle!\n");
1608 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1609 omap3isp_pipeline_cancel_stream(pipe);
1610 return 0;
1611 }
1612
1613 if (!ccdc_has_all_fields(ccdc))
1614 return 1;
1615
1616 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1617 if (buffer != NULL)
1618 ccdc_set_outaddr(ccdc, buffer->dma);
1619
1620 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1621
1622 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1623 isp_pipeline_ready(pipe))
1624 omap3isp_pipeline_set_stream(pipe,
1625 ISP_PIPELINE_STREAM_SINGLESHOT);
1626
1627 return buffer != NULL;
1628 }
1629
1630 /*
1631 * ccdc_vd0_isr - Handle VD0 event
1632 * @ccdc: Pointer to ISP CCDC device.
1633 *
1634 * Executes LSC deferred enablement before next frame starts.
1635 */
1636 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1637 {
1638 unsigned long flags;
1639 int restart = 0;
1640
1641 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1642 * need to increment the frame counter here.
1643 */
1644 if (ccdc->bt656) {
1645 struct isp_pipeline *pipe =
1646 to_isp_pipeline(&ccdc->subdev.entity);
1647
1648 atomic_inc(&pipe->frame_number);
1649 }
1650
1651 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1652 * the VD1 interrupt handler in that mode without risking a CCDC stall
1653 * if a short frame is received.
1654 */
1655 if (ccdc->bt656) {
1656 spin_lock_irqsave(&ccdc->lock, flags);
1657 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1658 ccdc->output & CCDC_OUTPUT_MEMORY) {
1659 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1660 __ccdc_lsc_enable(ccdc, 0);
1661 __ccdc_enable(ccdc, 0);
1662 }
1663 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1664 spin_unlock_irqrestore(&ccdc->lock, flags);
1665 }
1666
1667 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1668 restart = ccdc_isr_buffer(ccdc);
1669
1670 spin_lock_irqsave(&ccdc->lock, flags);
1671
1672 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1673 spin_unlock_irqrestore(&ccdc->lock, flags);
1674 return;
1675 }
1676
1677 if (!ccdc->shadow_update)
1678 ccdc_apply_controls(ccdc);
1679 spin_unlock_irqrestore(&ccdc->lock, flags);
1680
1681 if (restart)
1682 ccdc_enable(ccdc);
1683 }
1684
1685 /*
1686 * ccdc_vd1_isr - Handle VD1 event
1687 * @ccdc: Pointer to ISP CCDC device.
1688 */
1689 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1690 {
1691 unsigned long flags;
1692
1693 /* In BT.656 mode the synchronization signals are generated by the CCDC
1694 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1695 * only triggered when the CCDC is enabled, unlike external sync mode
1696 * where the line counter runs even when the CCDC is stopped. We can't
1697 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1698 * for a short frame, which would result in the CCDC being stopped and
1699 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1700 * interrupt handler instead for BT.656.
1701 */
1702 if (ccdc->bt656)
1703 return;
1704
1705 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1706
1707 /*
1708 * Depending on the CCDC pipeline state, CCDC stopping should be
1709 * handled differently. In SINGLESHOT we emulate an internal CCDC
1710 * stopping because the CCDC hw works only in continuous mode.
1711 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1712 * data to memory the CCDC and LSC are stopped immediately but
1713 * without change the CCDC stopping state machine. The CCDC
1714 * stopping state machine should be used only when user request
1715 * for stopping is received (SINGLESHOT is an exeption).
1716 */
1717 switch (ccdc->state) {
1718 case ISP_PIPELINE_STREAM_SINGLESHOT:
1719 ccdc->stopping = CCDC_STOP_REQUEST;
1720 break;
1721
1722 case ISP_PIPELINE_STREAM_CONTINUOUS:
1723 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1724 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1725 __ccdc_lsc_enable(ccdc, 0);
1726 __ccdc_enable(ccdc, 0);
1727 }
1728 break;
1729
1730 case ISP_PIPELINE_STREAM_STOPPED:
1731 break;
1732 }
1733
1734 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1735 goto done;
1736
1737 if (ccdc->lsc.request == NULL)
1738 goto done;
1739
1740 /*
1741 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1742 * do the appropriate changes in registers
1743 */
1744 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1745 __ccdc_lsc_enable(ccdc, 0);
1746 ccdc->lsc.state = LSC_STATE_RECONFIG;
1747 goto done;
1748 }
1749
1750 /* LSC has been in STOPPED state, enable it */
1751 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1752 ccdc_lsc_enable(ccdc);
1753
1754 done:
1755 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1756 }
1757
1758 /*
1759 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1760 * @ccdc: Pointer to ISP CCDC device.
1761 * @events: CCDC events
1762 */
1763 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1764 {
1765 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1766 return 0;
1767
1768 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1769 ccdc_vd1_isr(ccdc);
1770
1771 ccdc_lsc_isr(ccdc, events);
1772
1773 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1774 ccdc_vd0_isr(ccdc);
1775
1776 if (events & IRQ0STATUS_HS_VS_IRQ)
1777 ccdc_hs_vs_isr(ccdc);
1778
1779 return 0;
1780 }
1781
1782 /* -----------------------------------------------------------------------------
1783 * ISP video operations
1784 */
1785
1786 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1787 {
1788 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1789 unsigned long flags;
1790 bool restart = false;
1791
1792 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1793 return -ENODEV;
1794
1795 ccdc_set_outaddr(ccdc, buffer->dma);
1796
1797 /* We now have a buffer queued on the output, restart the pipeline
1798 * on the next CCDC interrupt if running in continuous mode (or when
1799 * starting the stream) in external sync mode, or immediately in BT.656
1800 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1801 * in that case.
1802 */
1803 spin_lock_irqsave(&ccdc->lock, flags);
1804 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1805 ccdc->bt656)
1806 restart = true;
1807 else
1808 ccdc->underrun = 1;
1809 spin_unlock_irqrestore(&ccdc->lock, flags);
1810
1811 if (restart)
1812 ccdc_enable(ccdc);
1813
1814 return 0;
1815 }
1816
1817 static const struct isp_video_operations ccdc_video_ops = {
1818 .queue = ccdc_video_queue,
1819 };
1820
1821 /* -----------------------------------------------------------------------------
1822 * V4L2 subdev operations
1823 */
1824
1825 /*
1826 * ccdc_ioctl - CCDC module private ioctl's
1827 * @sd: ISP CCDC V4L2 subdevice
1828 * @cmd: ioctl command
1829 * @arg: ioctl argument
1830 *
1831 * Return 0 on success or a negative error code otherwise.
1832 */
1833 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1834 {
1835 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1836 int ret;
1837
1838 switch (cmd) {
1839 case VIDIOC_OMAP3ISP_CCDC_CFG:
1840 mutex_lock(&ccdc->ioctl_lock);
1841 ret = ccdc_config(ccdc, arg);
1842 mutex_unlock(&ccdc->ioctl_lock);
1843 break;
1844
1845 default:
1846 return -ENOIOCTLCMD;
1847 }
1848
1849 return ret;
1850 }
1851
1852 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1853 struct v4l2_event_subscription *sub)
1854 {
1855 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1856 return -EINVAL;
1857
1858 /* line number is zero at frame start */
1859 if (sub->id != 0)
1860 return -EINVAL;
1861
1862 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1863 }
1864
1865 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1866 struct v4l2_event_subscription *sub)
1867 {
1868 return v4l2_event_unsubscribe(fh, sub);
1869 }
1870
1871 /*
1872 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1873 * @sd: ISP CCDC V4L2 subdevice
1874 * @enable: Enable/disable stream
1875 *
1876 * When writing to memory, the CCDC hardware can't be enabled without a memory
1877 * buffer to write to. As the s_stream operation is called in response to a
1878 * STREAMON call without any buffer queued yet, just update the enabled field
1879 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1880 *
1881 * When not writing to memory enable the CCDC immediately.
1882 */
1883 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1884 {
1885 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1886 struct isp_device *isp = to_isp_device(ccdc);
1887 int ret = 0;
1888
1889 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1890 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1891 return 0;
1892
1893 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1894 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1895 ISPCCDC_CFG_VDLC);
1896
1897 ccdc_configure(ccdc);
1898
1899 ccdc_print_status(ccdc);
1900 }
1901
1902 switch (enable) {
1903 case ISP_PIPELINE_STREAM_CONTINUOUS:
1904 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1905 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1906
1907 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1908 ccdc_enable(ccdc);
1909
1910 ccdc->underrun = 0;
1911 break;
1912
1913 case ISP_PIPELINE_STREAM_SINGLESHOT:
1914 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1915 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1916 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1917
1918 ccdc_enable(ccdc);
1919 break;
1920
1921 case ISP_PIPELINE_STREAM_STOPPED:
1922 ret = ccdc_disable(ccdc);
1923 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1924 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1925 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1926 ccdc->underrun = 0;
1927 break;
1928 }
1929
1930 ccdc->state = enable;
1931 return ret;
1932 }
1933
1934 static struct v4l2_mbus_framefmt *
1935 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1936 unsigned int pad, enum v4l2_subdev_format_whence which)
1937 {
1938 if (which == V4L2_SUBDEV_FORMAT_TRY)
1939 return v4l2_subdev_get_try_format(&ccdc->subdev, cfg, pad);
1940 else
1941 return &ccdc->formats[pad];
1942 }
1943
1944 static struct v4l2_rect *
1945 __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1946 enum v4l2_subdev_format_whence which)
1947 {
1948 if (which == V4L2_SUBDEV_FORMAT_TRY)
1949 return v4l2_subdev_get_try_crop(&ccdc->subdev, cfg, CCDC_PAD_SOURCE_OF);
1950 else
1951 return &ccdc->crop;
1952 }
1953
1954 /*
1955 * ccdc_try_format - Try video format on a pad
1956 * @ccdc: ISP CCDC device
1957 * @cfg : V4L2 subdev pad configuration
1958 * @pad: Pad number
1959 * @fmt: Format
1960 */
1961 static void
1962 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1963 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1964 enum v4l2_subdev_format_whence which)
1965 {
1966 const struct isp_format_info *info;
1967 u32 pixelcode;
1968 unsigned int width = fmt->width;
1969 unsigned int height = fmt->height;
1970 struct v4l2_rect *crop;
1971 enum v4l2_field field;
1972 unsigned int i;
1973
1974 switch (pad) {
1975 case CCDC_PAD_SINK:
1976 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1977 if (fmt->code == ccdc_fmts[i])
1978 break;
1979 }
1980
1981 /* If not found, use SGRBG10 as default */
1982 if (i >= ARRAY_SIZE(ccdc_fmts))
1983 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1984
1985 /* Clamp the input size. */
1986 fmt->width = clamp_t(u32, width, 32, 4096);
1987 fmt->height = clamp_t(u32, height, 32, 4096);
1988
1989 /* Default to progressive field order. */
1990 if (fmt->field == V4L2_FIELD_ANY)
1991 fmt->field = V4L2_FIELD_NONE;
1992
1993 break;
1994
1995 case CCDC_PAD_SOURCE_OF:
1996 pixelcode = fmt->code;
1997 field = fmt->field;
1998 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
1999
2000 /* In SYNC mode the bridge converts YUV formats from 2X8 to
2001 * 1X16. In BT.656 no such conversion occurs. As we don't know
2002 * at this point whether the source will use SYNC or BT.656 mode
2003 * let's pretend the conversion always occurs. The CCDC will be
2004 * configured to pack bytes in BT.656, hiding the inaccuracy.
2005 * In all cases bytes can be swapped.
2006 */
2007 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2008 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2009 /* Use the user requested format if YUV. */
2010 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2011 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2012 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2013 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2014 fmt->code = pixelcode;
2015
2016 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2017 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2018 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2019 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2020 }
2021
2022 /* Hardcode the output size to the crop rectangle size. */
2023 crop = __ccdc_get_crop(ccdc, cfg, which);
2024 fmt->width = crop->width;
2025 fmt->height = crop->height;
2026
2027 /* When input format is interlaced with alternating fields the
2028 * CCDC can interleave the fields.
2029 */
2030 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2031 (field == V4L2_FIELD_INTERLACED_TB ||
2032 field == V4L2_FIELD_INTERLACED_BT)) {
2033 fmt->field = field;
2034 fmt->height *= 2;
2035 }
2036
2037 break;
2038
2039 case CCDC_PAD_SOURCE_VP:
2040 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2041
2042 /* The video port interface truncates the data to 10 bits. */
2043 info = omap3isp_video_format_info(fmt->code);
2044 fmt->code = info->truncated;
2045
2046 /* YUV formats are not supported by the video port. */
2047 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2048 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2049 fmt->code = 0;
2050
2051 /* The number of lines that can be clocked out from the video
2052 * port output must be at least one line less than the number
2053 * of input lines.
2054 */
2055 fmt->width = clamp_t(u32, width, 32, fmt->width);
2056 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2057 break;
2058 }
2059
2060 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2061 * stored on 2 bytes.
2062 */
2063 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2064 }
2065
2066 /*
2067 * ccdc_try_crop - Validate a crop rectangle
2068 * @ccdc: ISP CCDC device
2069 * @sink: format on the sink pad
2070 * @crop: crop rectangle to be validated
2071 */
2072 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2073 const struct v4l2_mbus_framefmt *sink,
2074 struct v4l2_rect *crop)
2075 {
2076 const struct isp_format_info *info;
2077 unsigned int max_width;
2078
2079 /* For Bayer formats, restrict left/top and width/height to even values
2080 * to keep the Bayer pattern.
2081 */
2082 info = omap3isp_video_format_info(sink->code);
2083 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2084 crop->left &= ~1;
2085 crop->top &= ~1;
2086 }
2087
2088 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2089 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2090
2091 /* The data formatter truncates the number of horizontal output pixels
2092 * to a multiple of 16. To avoid clipping data, allow callers to request
2093 * an output size bigger than the input size up to the nearest multiple
2094 * of 16.
2095 */
2096 max_width = (sink->width - crop->left + 15) & ~15;
2097 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2098 & ~15;
2099 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2100 sink->height - crop->top);
2101
2102 /* Odd width/height values don't make sense for Bayer formats. */
2103 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2104 crop->width &= ~1;
2105 crop->height &= ~1;
2106 }
2107 }
2108
2109 /*
2110 * ccdc_enum_mbus_code - Handle pixel format enumeration
2111 * @sd : pointer to v4l2 subdev structure
2112 * @cfg : V4L2 subdev pad configuration
2113 * @code : pointer to v4l2_subdev_mbus_code_enum structure
2114 * return -EINVAL or zero on success
2115 */
2116 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2117 struct v4l2_subdev_pad_config *cfg,
2118 struct v4l2_subdev_mbus_code_enum *code)
2119 {
2120 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2121 struct v4l2_mbus_framefmt *format;
2122
2123 switch (code->pad) {
2124 case CCDC_PAD_SINK:
2125 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2126 return -EINVAL;
2127
2128 code->code = ccdc_fmts[code->index];
2129 break;
2130
2131 case CCDC_PAD_SOURCE_OF:
2132 format = __ccdc_get_format(ccdc, cfg, code->pad,
2133 code->which);
2134
2135 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2136 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2137 /* In YUV mode the CCDC can swap bytes. */
2138 if (code->index == 0)
2139 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2140 else if (code->index == 1)
2141 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2142 else
2143 return -EINVAL;
2144 } else {
2145 /* In raw mode, no configurable format confversion is
2146 * available.
2147 */
2148 if (code->index == 0)
2149 code->code = format->code;
2150 else
2151 return -EINVAL;
2152 }
2153 break;
2154
2155 case CCDC_PAD_SOURCE_VP:
2156 /* The CCDC supports no configurable format conversion
2157 * compatible with the video port. Enumerate a single output
2158 * format code.
2159 */
2160 if (code->index != 0)
2161 return -EINVAL;
2162
2163 format = __ccdc_get_format(ccdc, cfg, code->pad,
2164 code->which);
2165
2166 /* A pixel code equal to 0 means that the video port doesn't
2167 * support the input format. Don't enumerate any pixel code.
2168 */
2169 if (format->code == 0)
2170 return -EINVAL;
2171
2172 code->code = format->code;
2173 break;
2174
2175 default:
2176 return -EINVAL;
2177 }
2178
2179 return 0;
2180 }
2181
2182 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2183 struct v4l2_subdev_pad_config *cfg,
2184 struct v4l2_subdev_frame_size_enum *fse)
2185 {
2186 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2187 struct v4l2_mbus_framefmt format;
2188
2189 if (fse->index != 0)
2190 return -EINVAL;
2191
2192 format.code = fse->code;
2193 format.width = 1;
2194 format.height = 1;
2195 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2196 fse->min_width = format.width;
2197 fse->min_height = format.height;
2198
2199 if (format.code != fse->code)
2200 return -EINVAL;
2201
2202 format.code = fse->code;
2203 format.width = -1;
2204 format.height = -1;
2205 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2206 fse->max_width = format.width;
2207 fse->max_height = format.height;
2208
2209 return 0;
2210 }
2211
2212 /*
2213 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2214 * @sd: ISP CCDC V4L2 subdevice
2215 * @cfg: V4L2 subdev pad configuration
2216 * @sel: Selection rectangle
2217 *
2218 * The only supported rectangles are the crop rectangles on the output formatter
2219 * source pad.
2220 *
2221 * Return 0 on success or a negative error code otherwise.
2222 */
2223 static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2224 struct v4l2_subdev_selection *sel)
2225 {
2226 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2227 struct v4l2_mbus_framefmt *format;
2228
2229 if (sel->pad != CCDC_PAD_SOURCE_OF)
2230 return -EINVAL;
2231
2232 switch (sel->target) {
2233 case V4L2_SEL_TGT_CROP_BOUNDS:
2234 sel->r.left = 0;
2235 sel->r.top = 0;
2236 sel->r.width = INT_MAX;
2237 sel->r.height = INT_MAX;
2238
2239 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2240 ccdc_try_crop(ccdc, format, &sel->r);
2241 break;
2242
2243 case V4L2_SEL_TGT_CROP:
2244 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2245 break;
2246
2247 default:
2248 return -EINVAL;
2249 }
2250
2251 return 0;
2252 }
2253
2254 /*
2255 * ccdc_set_selection - Set a selection rectangle on a pad
2256 * @sd: ISP CCDC V4L2 subdevice
2257 * @cfg: V4L2 subdev pad configuration
2258 * @sel: Selection rectangle
2259 *
2260 * The only supported rectangle is the actual crop rectangle on the output
2261 * formatter source pad.
2262 *
2263 * Return 0 on success or a negative error code otherwise.
2264 */
2265 static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2266 struct v4l2_subdev_selection *sel)
2267 {
2268 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2269 struct v4l2_mbus_framefmt *format;
2270
2271 if (sel->target != V4L2_SEL_TGT_CROP ||
2272 sel->pad != CCDC_PAD_SOURCE_OF)
2273 return -EINVAL;
2274
2275 /* The crop rectangle can't be changed while streaming. */
2276 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2277 return -EBUSY;
2278
2279 /* Modifying the crop rectangle always changes the format on the source
2280 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2281 * rectangle.
2282 */
2283 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2284 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2285 return 0;
2286 }
2287
2288 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2289 ccdc_try_crop(ccdc, format, &sel->r);
2290 *__ccdc_get_crop(ccdc, cfg, sel->which) = sel->r;
2291
2292 /* Update the source format. */
2293 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, sel->which);
2294 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format, sel->which);
2295
2296 return 0;
2297 }
2298
2299 /*
2300 * ccdc_get_format - Retrieve the video format on a pad
2301 * @sd : ISP CCDC V4L2 subdevice
2302 * @cfg: V4L2 subdev pad configuration
2303 * @fmt: Format
2304 *
2305 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2306 * to the format type.
2307 */
2308 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2309 struct v4l2_subdev_format *fmt)
2310 {
2311 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2312 struct v4l2_mbus_framefmt *format;
2313
2314 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2315 if (format == NULL)
2316 return -EINVAL;
2317
2318 fmt->format = *format;
2319 return 0;
2320 }
2321
2322 /*
2323 * ccdc_set_format - Set the video format on a pad
2324 * @sd : ISP CCDC V4L2 subdevice
2325 * @cfg: V4L2 subdev pad configuration
2326 * @fmt: Format
2327 *
2328 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2329 * to the format type.
2330 */
2331 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2332 struct v4l2_subdev_format *fmt)
2333 {
2334 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2335 struct v4l2_mbus_framefmt *format;
2336 struct v4l2_rect *crop;
2337
2338 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2339 if (format == NULL)
2340 return -EINVAL;
2341
2342 ccdc_try_format(ccdc, cfg, fmt->pad, &fmt->format, fmt->which);
2343 *format = fmt->format;
2344
2345 /* Propagate the format from sink to source */
2346 if (fmt->pad == CCDC_PAD_SINK) {
2347 /* Reset the crop rectangle. */
2348 crop = __ccdc_get_crop(ccdc, cfg, fmt->which);
2349 crop->left = 0;
2350 crop->top = 0;
2351 crop->width = fmt->format.width;
2352 crop->height = fmt->format.height;
2353
2354 ccdc_try_crop(ccdc, &fmt->format, crop);
2355
2356 /* Update the source formats. */
2357 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF,
2358 fmt->which);
2359 *format = fmt->format;
2360 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format,
2361 fmt->which);
2362
2363 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_VP,
2364 fmt->which);
2365 *format = fmt->format;
2366 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_VP, format,
2367 fmt->which);
2368 }
2369
2370 return 0;
2371 }
2372
2373 /*
2374 * Decide whether desired output pixel code can be obtained with
2375 * the lane shifter by shifting the input pixel code.
2376 * @in: input pixelcode to shifter
2377 * @out: output pixelcode from shifter
2378 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2379 *
2380 * return true if the combination is possible
2381 * return false otherwise
2382 */
2383 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2384 {
2385 const struct isp_format_info *in_info, *out_info;
2386
2387 if (in == out)
2388 return true;
2389
2390 in_info = omap3isp_video_format_info(in);
2391 out_info = omap3isp_video_format_info(out);
2392
2393 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2394 return false;
2395
2396 if (in_info->flavor != out_info->flavor)
2397 return false;
2398
2399 return in_info->width - out_info->width + additional_shift <= 6;
2400 }
2401
2402 static int ccdc_link_validate(struct v4l2_subdev *sd,
2403 struct media_link *link,
2404 struct v4l2_subdev_format *source_fmt,
2405 struct v4l2_subdev_format *sink_fmt)
2406 {
2407 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2408 unsigned long parallel_shift;
2409
2410 /* Check if the two ends match */
2411 if (source_fmt->format.width != sink_fmt->format.width ||
2412 source_fmt->format.height != sink_fmt->format.height)
2413 return -EPIPE;
2414
2415 /* We've got a parallel sensor here. */
2416 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2417 struct v4l2_subdev *sd =
2418 media_entity_to_v4l2_subdev(link->source->entity);
2419 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2420
2421 parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2422 } else {
2423 parallel_shift = 0;
2424 }
2425
2426 /* Lane shifter may be used to drop bits on CCDC sink pad */
2427 if (!ccdc_is_shiftable(source_fmt->format.code,
2428 sink_fmt->format.code, parallel_shift))
2429 return -EPIPE;
2430
2431 return 0;
2432 }
2433
2434 /*
2435 * ccdc_init_formats - Initialize formats on all pads
2436 * @sd: ISP CCDC V4L2 subdevice
2437 * @fh: V4L2 subdev file handle
2438 *
2439 * Initialize all pad formats with default values. If fh is not NULL, try
2440 * formats are initialized on the file handle. Otherwise active formats are
2441 * initialized on the device.
2442 */
2443 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2444 {
2445 struct v4l2_subdev_format format;
2446
2447 memset(&format, 0, sizeof(format));
2448 format.pad = CCDC_PAD_SINK;
2449 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2450 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2451 format.format.width = 4096;
2452 format.format.height = 4096;
2453 ccdc_set_format(sd, fh ? fh->pad : NULL, &format);
2454
2455 return 0;
2456 }
2457
2458 /* V4L2 subdev core operations */
2459 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2460 .ioctl = ccdc_ioctl,
2461 .subscribe_event = ccdc_subscribe_event,
2462 .unsubscribe_event = ccdc_unsubscribe_event,
2463 };
2464
2465 /* V4L2 subdev video operations */
2466 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2467 .s_stream = ccdc_set_stream,
2468 };
2469
2470 /* V4L2 subdev pad operations */
2471 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2472 .enum_mbus_code = ccdc_enum_mbus_code,
2473 .enum_frame_size = ccdc_enum_frame_size,
2474 .get_fmt = ccdc_get_format,
2475 .set_fmt = ccdc_set_format,
2476 .get_selection = ccdc_get_selection,
2477 .set_selection = ccdc_set_selection,
2478 .link_validate = ccdc_link_validate,
2479 };
2480
2481 /* V4L2 subdev operations */
2482 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2483 .core = &ccdc_v4l2_core_ops,
2484 .video = &ccdc_v4l2_video_ops,
2485 .pad = &ccdc_v4l2_pad_ops,
2486 };
2487
2488 /* V4L2 subdev internal operations */
2489 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2490 .open = ccdc_init_formats,
2491 };
2492
2493 /* -----------------------------------------------------------------------------
2494 * Media entity operations
2495 */
2496
2497 /*
2498 * ccdc_link_setup - Setup CCDC connections
2499 * @entity: CCDC media entity
2500 * @local: Pad at the local end of the link
2501 * @remote: Pad at the remote end of the link
2502 * @flags: Link flags
2503 *
2504 * return -EINVAL or zero on success
2505 */
2506 static int ccdc_link_setup(struct media_entity *entity,
2507 const struct media_pad *local,
2508 const struct media_pad *remote, u32 flags)
2509 {
2510 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2511 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2512 struct isp_device *isp = to_isp_device(ccdc);
2513 unsigned int index = local->index;
2514
2515 /* FIXME: this is actually a hack! */
2516 if (is_media_entity_v4l2_subdev(remote->entity))
2517 index |= 2 << 16;
2518
2519 switch (index) {
2520 case CCDC_PAD_SINK | 2 << 16:
2521 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2522 * CSI2c.
2523 */
2524 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2525 ccdc->input = CCDC_INPUT_NONE;
2526 break;
2527 }
2528
2529 if (ccdc->input != CCDC_INPUT_NONE)
2530 return -EBUSY;
2531
2532 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2533 ccdc->input = CCDC_INPUT_CCP2B;
2534 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2535 ccdc->input = CCDC_INPUT_CSI2A;
2536 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2537 ccdc->input = CCDC_INPUT_CSI2C;
2538 else
2539 ccdc->input = CCDC_INPUT_PARALLEL;
2540
2541 break;
2542
2543 /*
2544 * The ISP core doesn't support pipelines with multiple video outputs.
2545 * Revisit this when it will be implemented, and return -EBUSY for now.
2546 */
2547
2548 case CCDC_PAD_SOURCE_VP | 2 << 16:
2549 /* Write to preview engine, histogram and H3A. When none of
2550 * those links are active, the video port can be disabled.
2551 */
2552 if (flags & MEDIA_LNK_FL_ENABLED) {
2553 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2554 return -EBUSY;
2555 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2556 } else {
2557 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2558 }
2559 break;
2560
2561 case CCDC_PAD_SOURCE_OF:
2562 /* Write to memory */
2563 if (flags & MEDIA_LNK_FL_ENABLED) {
2564 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2565 return -EBUSY;
2566 ccdc->output |= CCDC_OUTPUT_MEMORY;
2567 } else {
2568 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2569 }
2570 break;
2571
2572 case CCDC_PAD_SOURCE_OF | 2 << 16:
2573 /* Write to resizer */
2574 if (flags & MEDIA_LNK_FL_ENABLED) {
2575 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2576 return -EBUSY;
2577 ccdc->output |= CCDC_OUTPUT_RESIZER;
2578 } else {
2579 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2580 }
2581 break;
2582
2583 default:
2584 return -EINVAL;
2585 }
2586
2587 return 0;
2588 }
2589
2590 /* media operations */
2591 static const struct media_entity_operations ccdc_media_ops = {
2592 .link_setup = ccdc_link_setup,
2593 .link_validate = v4l2_subdev_link_validate,
2594 };
2595
2596 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2597 {
2598 v4l2_device_unregister_subdev(&ccdc->subdev);
2599 omap3isp_video_unregister(&ccdc->video_out);
2600 }
2601
2602 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2603 struct v4l2_device *vdev)
2604 {
2605 int ret;
2606
2607 /* Register the subdev and video node. */
2608 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2609 if (ret < 0)
2610 goto error;
2611
2612 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2613 if (ret < 0)
2614 goto error;
2615
2616 return 0;
2617
2618 error:
2619 omap3isp_ccdc_unregister_entities(ccdc);
2620 return ret;
2621 }
2622
2623 /* -----------------------------------------------------------------------------
2624 * ISP CCDC initialisation and cleanup
2625 */
2626
2627 /*
2628 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2629 * @ccdc: ISP CCDC module
2630 *
2631 * Return 0 on success and a negative error code on failure.
2632 */
2633 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2634 {
2635 struct v4l2_subdev *sd = &ccdc->subdev;
2636 struct media_pad *pads = ccdc->pads;
2637 struct media_entity *me = &sd->entity;
2638 int ret;
2639
2640 ccdc->input = CCDC_INPUT_NONE;
2641
2642 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2643 sd->internal_ops = &ccdc_v4l2_internal_ops;
2644 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2645 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2646 v4l2_set_subdevdata(sd, ccdc);
2647 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2648
2649 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2650 | MEDIA_PAD_FL_MUST_CONNECT;
2651 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2652 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2653
2654 me->ops = &ccdc_media_ops;
2655 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2656 if (ret < 0)
2657 return ret;
2658
2659 ccdc_init_formats(sd, NULL);
2660
2661 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2662 ccdc->video_out.ops = &ccdc_video_ops;
2663 ccdc->video_out.isp = to_isp_device(ccdc);
2664 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2665 ccdc->video_out.bpl_alignment = 32;
2666
2667 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2668 if (ret < 0)
2669 goto error;
2670
2671 return 0;
2672
2673 error:
2674 media_entity_cleanup(me);
2675 return ret;
2676 }
2677
2678 /*
2679 * omap3isp_ccdc_init - CCDC module initialization.
2680 * @isp: Device pointer specific to the OMAP3 ISP.
2681 *
2682 * TODO: Get the initialisation values from platform data.
2683 *
2684 * Return 0 on success or a negative error code otherwise.
2685 */
2686 int omap3isp_ccdc_init(struct isp_device *isp)
2687 {
2688 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2689 int ret;
2690
2691 spin_lock_init(&ccdc->lock);
2692 init_waitqueue_head(&ccdc->wait);
2693 mutex_init(&ccdc->ioctl_lock);
2694
2695 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2696
2697 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2698 ccdc->lsc.state = LSC_STATE_STOPPED;
2699 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2700 spin_lock_init(&ccdc->lsc.req_lock);
2701
2702 ccdc->clamp.oblen = 0;
2703 ccdc->clamp.dcsubval = 0;
2704
2705 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2706 ccdc_apply_controls(ccdc);
2707
2708 ret = ccdc_init_entities(ccdc);
2709 if (ret < 0) {
2710 mutex_destroy(&ccdc->ioctl_lock);
2711 return ret;
2712 }
2713
2714 return 0;
2715 }
2716
2717 /*
2718 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2719 * @isp: Device pointer specific to the OMAP3 ISP.
2720 */
2721 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2722 {
2723 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2724
2725 omap3isp_video_cleanup(&ccdc->video_out);
2726 media_entity_cleanup(&ccdc->subdev.entity);
2727
2728 /* Free LSC requests. As the CCDC is stopped there's no active request,
2729 * so only the pending request and the free queue need to be handled.
2730 */
2731 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2732 cancel_work_sync(&ccdc->lsc.table_work);
2733 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2734
2735 if (ccdc->fpc.addr != NULL)
2736 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2737 ccdc->fpc.dma);
2738
2739 mutex_destroy(&ccdc->ioctl_lock);
2740 }
Linux with added FPC-III support