1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Gen3 Digital Radio Interface (DRIF) driver
5 * Copyright (C) 2017 Renesas Electronics Corporation
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
14 * The R-Car DRIF is a receive only MSIOF like controller with an
15 * external master device driving the SCK. It receives data into a FIFO,
16 * then this driver uses the SYS-DMAC engine to move the data from
17 * the device to memory.
19 * Each DRIF channel DRIFx (as per datasheet) contains two internal
20 * channels DRIFx0 & DRIFx1 within itself with each having its own resources
21 * like module clk, register set, irq and dma. These internal channels share
22 * common CLK & SYNC from master. The two data pins D0 & D1 shall be
23 * considered to represent the two internal channels. This internal split
24 * is not visible to the master device.
26 * Depending on the master device, a DRIF channel can use
27 * (1) both internal channels (D0 & D1) to receive data in parallel (or)
28 * (2) one internal channel (D0 or D1) to receive data
30 * The primary design goal of this controller is to act as a Digital Radio
31 * Interface that receives digital samples from a tuner device. Hence the
32 * driver exposes the device as a V4L2 SDR device. In order to qualify as
33 * a V4L2 SDR device, it should possess a tuner interface as mandated by the
34 * framework. This driver expects a tuner driver (sub-device) to bind
35 * asynchronously with this device and the combined drivers shall expose
36 * a V4L2 compliant SDR device. The DRIF driver is independent of the
39 * The DRIF h/w can support I2S mode and Frame start synchronization pulse mode.
40 * This driver is tested for I2S mode only because of the availability of
41 * suitable master devices. Hence, not all configurable options of DRIF h/w
42 * like lsb/msb first, syncdl, dtdl etc. are exposed via DT and I2S defaults
43 * are used. These can be exposed later if needed after testing.
45 #include <linux/bitops.h>
46 #include <linux/clk.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/dmaengine.h>
49 #include <linux/ioctl.h>
50 #include <linux/iopoll.h>
51 #include <linux/module.h>
52 #include <linux/of_graph.h>
53 #include <linux/of_device.h>
54 #include <linux/platform_device.h>
55 #include <linux/sched.h>
56 #include <media/v4l2-async.h>
57 #include <media/v4l2-ctrls.h>
58 #include <media/v4l2-device.h>
59 #include <media/v4l2-event.h>
60 #include <media/v4l2-fh.h>
61 #include <media/v4l2-ioctl.h>
62 #include <media/videobuf2-v4l2.h>
63 #include <media/videobuf2-vmalloc.h>
65 /* DRIF register offsets */
66 #define RCAR_DRIF_SITMDR1 0x00
67 #define RCAR_DRIF_SITMDR2 0x04
68 #define RCAR_DRIF_SITMDR3 0x08
69 #define RCAR_DRIF_SIRMDR1 0x10
70 #define RCAR_DRIF_SIRMDR2 0x14
71 #define RCAR_DRIF_SIRMDR3 0x18
72 #define RCAR_DRIF_SICTR 0x28
73 #define RCAR_DRIF_SIFCTR 0x30
74 #define RCAR_DRIF_SISTR 0x40
75 #define RCAR_DRIF_SIIER 0x44
76 #define RCAR_DRIF_SIRFDR 0x60
78 #define RCAR_DRIF_RFOVF BIT(3) /* Receive FIFO overflow */
79 #define RCAR_DRIF_RFUDF BIT(4) /* Receive FIFO underflow */
80 #define RCAR_DRIF_RFSERR BIT(5) /* Receive frame sync error */
81 #define RCAR_DRIF_REOF BIT(7) /* Frame reception end */
82 #define RCAR_DRIF_RDREQ BIT(12) /* Receive data xfer req */
83 #define RCAR_DRIF_RFFUL BIT(13) /* Receive FIFO full */
86 #define RCAR_DRIF_SIRMDR1_SYNCMD_FRAME (0 << 28)
87 #define RCAR_DRIF_SIRMDR1_SYNCMD_LR (3 << 28)
89 #define RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH (0 << 25)
90 #define RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW (1 << 25)
92 #define RCAR_DRIF_SIRMDR1_MSB_FIRST (0 << 24)
93 #define RCAR_DRIF_SIRMDR1_LSB_FIRST (1 << 24)
95 #define RCAR_DRIF_SIRMDR1_DTDL_0 (0 << 20)
96 #define RCAR_DRIF_SIRMDR1_DTDL_1 (1 << 20)
97 #define RCAR_DRIF_SIRMDR1_DTDL_2 (2 << 20)
98 #define RCAR_DRIF_SIRMDR1_DTDL_0PT5 (5 << 20)
99 #define RCAR_DRIF_SIRMDR1_DTDL_1PT5 (6 << 20)
101 #define RCAR_DRIF_SIRMDR1_SYNCDL_0 (0 << 20)
102 #define RCAR_DRIF_SIRMDR1_SYNCDL_1 (1 << 20)
103 #define RCAR_DRIF_SIRMDR1_SYNCDL_2 (2 << 20)
104 #define RCAR_DRIF_SIRMDR1_SYNCDL_3 (3 << 20)
105 #define RCAR_DRIF_SIRMDR1_SYNCDL_0PT5 (5 << 20)
106 #define RCAR_DRIF_SIRMDR1_SYNCDL_1PT5 (6 << 20)
108 #define RCAR_DRIF_MDR_GRPCNT(n) (((n) - 1) << 30)
109 #define RCAR_DRIF_MDR_BITLEN(n) (((n) - 1) << 24)
110 #define RCAR_DRIF_MDR_WDCNT(n) (((n) - 1) << 16)
112 /* Hidden Transmit register that controls CLK & SYNC */
113 #define RCAR_DRIF_SITMDR1_PCON BIT(30)
115 #define RCAR_DRIF_SICTR_RX_RISING_EDGE BIT(26)
116 #define RCAR_DRIF_SICTR_RX_EN BIT(8)
117 #define RCAR_DRIF_SICTR_RESET BIT(0)
120 #define RCAR_DRIF_NUM_HWBUFS 32
121 #define RCAR_DRIF_MAX_DEVS 4
122 #define RCAR_DRIF_DEFAULT_NUM_HWBUFS 16
123 #define RCAR_DRIF_DEFAULT_HWBUF_SIZE (4 * PAGE_SIZE)
124 #define RCAR_DRIF_MAX_CHANNEL 2
125 #define RCAR_SDR_BUFFER_SIZE SZ_64K
127 /* Internal buffer status flags */
128 #define RCAR_DRIF_BUF_DONE BIT(0) /* DMA completed */
129 #define RCAR_DRIF_BUF_OVERFLOW BIT(1) /* Overflow detected */
131 #define to_rcar_drif_buf_pair(sdr, ch_num, idx) \
132 (&((sdr)->ch[!(ch_num)]->buf[(idx)]))
134 #define for_each_rcar_drif_channel(ch, ch_mask) \
135 for_each_set_bit(ch, ch_mask, RCAR_DRIF_MAX_CHANNEL)
138 #define rdrif_dbg(sdr, fmt, arg...) \
139 dev_dbg(sdr->v4l2_dev.dev, fmt, ## arg)
141 #define rdrif_err(sdr, fmt, arg...) \
142 dev_err(sdr->v4l2_dev.dev, fmt, ## arg)
145 struct rcar_drif_format
{
153 /* Format descriptions for capture */
154 static const struct rcar_drif_format formats
[] = {
156 .pixelformat
= V4L2_SDR_FMT_PCU16BE
,
157 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
163 .pixelformat
= V4L2_SDR_FMT_PCU18BE
,
164 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
170 .pixelformat
= V4L2_SDR_FMT_PCU20BE
,
171 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
178 /* Buffer for a received frame from one or both internal channels */
179 struct rcar_drif_frame_buf
{
180 /* Common v4l buffer stuff -- must be first */
181 struct vb2_v4l2_buffer vb
;
182 struct list_head list
;
185 /* OF graph endpoint's V4L2 async data */
186 struct rcar_drif_graph_ep
{
187 struct v4l2_subdev
*subdev
; /* Async matched subdev */
188 struct v4l2_async_subdev asd
; /* Async sub-device descriptor */
192 struct rcar_drif_hwbuf
{
193 void *addr
; /* CPU-side address */
194 unsigned int status
; /* Buffer status flags */
197 /* Internal channel */
199 struct rcar_drif_sdr
*sdr
; /* Group device */
200 struct platform_device
*pdev
; /* Channel's pdev */
201 void __iomem
*base
; /* Base register address */
202 resource_size_t start
; /* I/O resource offset */
203 struct dma_chan
*dmach
; /* Reserved DMA channel */
204 struct clk
*clk
; /* Module clock */
205 struct rcar_drif_hwbuf buf
[RCAR_DRIF_NUM_HWBUFS
]; /* H/W bufs */
206 dma_addr_t dma_handle
; /* Handle for all bufs */
207 unsigned int num
; /* Channel number */
208 bool acting_sdr
; /* Channel acting as SDR device */
212 struct rcar_drif_sdr
{
213 struct device
*dev
; /* Platform device */
214 struct video_device
*vdev
; /* V4L2 SDR device */
215 struct v4l2_device v4l2_dev
; /* V4L2 device */
217 /* Videobuf2 queue and queued buffers list */
218 struct vb2_queue vb_queue
;
219 struct list_head queued_bufs
;
220 spinlock_t queued_bufs_lock
; /* Protects queued_bufs */
221 spinlock_t dma_lock
; /* To serialize DMA cb of channels */
223 struct mutex v4l2_mutex
; /* To serialize ioctls */
224 struct mutex vb_queue_mutex
; /* To serialize streaming ioctls */
225 struct v4l2_ctrl_handler ctrl_hdl
; /* SDR control handler */
226 struct v4l2_async_notifier notifier
; /* For subdev (tuner) */
227 struct rcar_drif_graph_ep ep
; /* Endpoint V4L2 async data */
229 /* Current V4L2 SDR format ptr */
230 const struct rcar_drif_format
*fmt
;
232 /* Device tree SYNC properties */
236 struct rcar_drif
*ch
[RCAR_DRIF_MAX_CHANNEL
]; /* DRIFx0,1 */
237 unsigned long hw_ch_mask
; /* Enabled channels per DT */
238 unsigned long cur_ch_mask
; /* Used channels for an SDR FMT */
239 u32 num_hw_ch
; /* Num of DT enabled channels */
240 u32 num_cur_ch
; /* Num of used channels */
241 u32 hwbuf_size
; /* Each DMA buffer size */
242 u32 produced
; /* Buffers produced by sdr dev */
245 /* Register access functions */
246 static void rcar_drif_write(struct rcar_drif
*ch
, u32 offset
, u32 data
)
248 writel(data
, ch
->base
+ offset
);
251 static u32
rcar_drif_read(struct rcar_drif
*ch
, u32 offset
)
253 return readl(ch
->base
+ offset
);
256 /* Release DMA channels */
257 static void rcar_drif_release_dmachannels(struct rcar_drif_sdr
*sdr
)
261 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
262 if (sdr
->ch
[i
]->dmach
) {
263 dma_release_channel(sdr
->ch
[i
]->dmach
);
264 sdr
->ch
[i
]->dmach
= NULL
;
268 /* Allocate DMA channels */
269 static int rcar_drif_alloc_dmachannels(struct rcar_drif_sdr
*sdr
)
271 struct dma_slave_config dma_cfg
;
275 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
276 struct rcar_drif
*ch
= sdr
->ch
[i
];
278 ch
->dmach
= dma_request_slave_channel(&ch
->pdev
->dev
, "rx");
280 rdrif_err(sdr
, "ch%u: dma channel req failed\n", i
);
285 /* Configure slave */
286 memset(&dma_cfg
, 0, sizeof(dma_cfg
));
287 dma_cfg
.src_addr
= (phys_addr_t
)(ch
->start
+ RCAR_DRIF_SIRFDR
);
288 dma_cfg
.src_addr_width
= DMA_SLAVE_BUSWIDTH_4_BYTES
;
289 ret
= dmaengine_slave_config(ch
->dmach
, &dma_cfg
);
291 rdrif_err(sdr
, "ch%u: dma slave config failed\n", i
);
298 rcar_drif_release_dmachannels(sdr
);
302 /* Release queued vb2 buffers */
303 static void rcar_drif_release_queued_bufs(struct rcar_drif_sdr
*sdr
,
304 enum vb2_buffer_state state
)
306 struct rcar_drif_frame_buf
*fbuf
, *tmp
;
309 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
310 list_for_each_entry_safe(fbuf
, tmp
, &sdr
->queued_bufs
, list
) {
311 list_del(&fbuf
->list
);
312 vb2_buffer_done(&fbuf
->vb
.vb2_buf
, state
);
314 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
317 /* Set MDR defaults */
318 static inline void rcar_drif_set_mdr1(struct rcar_drif_sdr
*sdr
)
322 /* Set defaults for enabled internal channels */
323 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
324 /* Refer MSIOF section in manual for this register setting */
325 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SITMDR1
,
326 RCAR_DRIF_SITMDR1_PCON
);
328 /* Setup MDR1 value */
329 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR1
, sdr
->mdr1
);
331 rdrif_dbg(sdr
, "ch%u: mdr1 = 0x%08x",
332 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR1
));
336 /* Set DRIF receive format */
337 static int rcar_drif_set_format(struct rcar_drif_sdr
*sdr
)
341 rdrif_dbg(sdr
, "setfmt: bitlen %u wdcnt %u num_ch %u\n",
342 sdr
->fmt
->bitlen
, sdr
->fmt
->wdcnt
, sdr
->fmt
->num_ch
);
345 if (sdr
->fmt
->num_ch
> sdr
->num_cur_ch
) {
346 rdrif_err(sdr
, "fmt num_ch %u cur_ch %u mismatch\n",
347 sdr
->fmt
->num_ch
, sdr
->num_cur_ch
);
351 /* Setup group, bitlen & wdcnt */
352 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
356 mdr
= RCAR_DRIF_MDR_GRPCNT(2) |
357 RCAR_DRIF_MDR_BITLEN(sdr
->fmt
->bitlen
) |
358 RCAR_DRIF_MDR_WDCNT(sdr
->fmt
->wdcnt
);
359 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR2
, mdr
);
361 mdr
= RCAR_DRIF_MDR_BITLEN(sdr
->fmt
->bitlen
) |
362 RCAR_DRIF_MDR_WDCNT(sdr
->fmt
->wdcnt
);
363 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR3
, mdr
);
365 rdrif_dbg(sdr
, "ch%u: new mdr[2,3] = 0x%08x, 0x%08x\n",
366 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR2
),
367 rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR3
));
372 /* Release DMA buffers */
373 static void rcar_drif_release_buf(struct rcar_drif_sdr
*sdr
)
377 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
378 struct rcar_drif
*ch
= sdr
->ch
[i
];
380 /* First entry contains the dma buf ptr */
381 if (ch
->buf
[0].addr
) {
382 dma_free_coherent(&ch
->pdev
->dev
,
383 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
384 ch
->buf
[0].addr
, ch
->dma_handle
);
385 ch
->buf
[0].addr
= NULL
;
390 /* Request DMA buffers */
391 static int rcar_drif_request_buf(struct rcar_drif_sdr
*sdr
)
397 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
398 struct rcar_drif
*ch
= sdr
->ch
[i
];
400 /* Allocate DMA buffers */
401 addr
= dma_alloc_coherent(&ch
->pdev
->dev
,
402 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
403 &ch
->dma_handle
, GFP_KERNEL
);
406 "ch%u: dma alloc failed. num hwbufs %u size %u\n",
407 i
, RCAR_DRIF_NUM_HWBUFS
, sdr
->hwbuf_size
);
411 /* Split the chunk and populate bufctxt */
412 for (j
= 0; j
< RCAR_DRIF_NUM_HWBUFS
; j
++) {
413 ch
->buf
[j
].addr
= addr
+ (j
* sdr
->hwbuf_size
);
414 ch
->buf
[j
].status
= 0;
422 /* Setup vb_queue minimum buffer requirements */
423 static int rcar_drif_queue_setup(struct vb2_queue
*vq
,
424 unsigned int *num_buffers
, unsigned int *num_planes
,
425 unsigned int sizes
[], struct device
*alloc_devs
[])
427 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
429 /* Need at least 16 buffers */
430 if (vq
->num_buffers
+ *num_buffers
< 16)
431 *num_buffers
= 16 - vq
->num_buffers
;
434 sizes
[0] = PAGE_ALIGN(sdr
->fmt
->buffersize
);
435 rdrif_dbg(sdr
, "num_bufs %d sizes[0] %d\n", *num_buffers
, sizes
[0]);
441 static void rcar_drif_buf_queue(struct vb2_buffer
*vb
)
443 struct vb2_v4l2_buffer
*vbuf
= to_vb2_v4l2_buffer(vb
);
444 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vb
->vb2_queue
);
445 struct rcar_drif_frame_buf
*fbuf
=
446 container_of(vbuf
, struct rcar_drif_frame_buf
, vb
);
449 rdrif_dbg(sdr
, "buf_queue idx %u\n", vb
->index
);
450 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
451 list_add_tail(&fbuf
->list
, &sdr
->queued_bufs
);
452 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
455 /* Get a frame buf from list */
456 static struct rcar_drif_frame_buf
*
457 rcar_drif_get_fbuf(struct rcar_drif_sdr
*sdr
)
459 struct rcar_drif_frame_buf
*fbuf
;
462 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
463 fbuf
= list_first_entry_or_null(&sdr
->queued_bufs
, struct
464 rcar_drif_frame_buf
, list
);
467 * App is late in enqueing buffers. Samples lost & there will
468 * be a gap in sequence number when app recovers
470 rdrif_dbg(sdr
, "\napp late: prod %u\n", sdr
->produced
);
471 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
474 list_del(&fbuf
->list
);
475 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
480 /* Helpers to set/clear buf pair status */
481 static inline bool rcar_drif_bufs_done(struct rcar_drif_hwbuf
**buf
)
483 return (buf
[0]->status
& buf
[1]->status
& RCAR_DRIF_BUF_DONE
);
486 static inline bool rcar_drif_bufs_overflow(struct rcar_drif_hwbuf
**buf
)
488 return ((buf
[0]->status
| buf
[1]->status
) & RCAR_DRIF_BUF_OVERFLOW
);
491 static inline void rcar_drif_bufs_clear(struct rcar_drif_hwbuf
**buf
,
496 for (i
= 0; i
< RCAR_DRIF_MAX_CHANNEL
; i
++)
497 buf
[i
]->status
&= ~bit
;
500 /* Channel DMA complete */
501 static void rcar_drif_channel_complete(struct rcar_drif
*ch
, u32 idx
)
505 ch
->buf
[idx
].status
|= RCAR_DRIF_BUF_DONE
;
507 /* Check for DRIF errors */
508 str
= rcar_drif_read(ch
, RCAR_DRIF_SISTR
);
509 if (unlikely(str
& RCAR_DRIF_RFOVF
)) {
510 /* Writing the same clears it */
511 rcar_drif_write(ch
, RCAR_DRIF_SISTR
, str
);
513 /* Overflow: some samples are lost */
514 ch
->buf
[idx
].status
|= RCAR_DRIF_BUF_OVERFLOW
;
518 /* DMA callback for each stage */
519 static void rcar_drif_dma_complete(void *dma_async_param
)
521 struct rcar_drif
*ch
= dma_async_param
;
522 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
523 struct rcar_drif_hwbuf
*buf
[RCAR_DRIF_MAX_CHANNEL
];
524 struct rcar_drif_frame_buf
*fbuf
;
525 bool overflow
= false;
529 spin_lock(&sdr
->dma_lock
);
531 /* DMA can be terminated while the callback was waiting on lock */
532 if (!vb2_is_streaming(&sdr
->vb_queue
)) {
533 spin_unlock(&sdr
->dma_lock
);
537 idx
= sdr
->produced
% RCAR_DRIF_NUM_HWBUFS
;
538 rcar_drif_channel_complete(ch
, idx
);
540 if (sdr
->num_cur_ch
== RCAR_DRIF_MAX_CHANNEL
) {
541 buf
[0] = ch
->num
? to_rcar_drif_buf_pair(sdr
, ch
->num
, idx
) :
543 buf
[1] = ch
->num
? &ch
->buf
[idx
] :
544 to_rcar_drif_buf_pair(sdr
, ch
->num
, idx
);
546 /* Check if both DMA buffers are done */
547 if (!rcar_drif_bufs_done(buf
)) {
548 spin_unlock(&sdr
->dma_lock
);
552 /* Clear buf done status */
553 rcar_drif_bufs_clear(buf
, RCAR_DRIF_BUF_DONE
);
555 if (rcar_drif_bufs_overflow(buf
)) {
557 /* Clear the flag in status */
558 rcar_drif_bufs_clear(buf
, RCAR_DRIF_BUF_OVERFLOW
);
561 buf
[0] = &ch
->buf
[idx
];
562 if (buf
[0]->status
& RCAR_DRIF_BUF_OVERFLOW
) {
564 /* Clear the flag in status */
565 buf
[0]->status
&= ~RCAR_DRIF_BUF_OVERFLOW
;
569 /* Buffer produced for consumption */
570 produced
= sdr
->produced
++;
571 spin_unlock(&sdr
->dma_lock
);
573 rdrif_dbg(sdr
, "ch%u: prod %u\n", ch
->num
, produced
);
576 fbuf
= rcar_drif_get_fbuf(sdr
);
580 for (i
= 0; i
< RCAR_DRIF_MAX_CHANNEL
; i
++)
581 memcpy(vb2_plane_vaddr(&fbuf
->vb
.vb2_buf
, 0) +
582 i
* sdr
->hwbuf_size
, buf
[i
]->addr
, sdr
->hwbuf_size
);
584 fbuf
->vb
.field
= V4L2_FIELD_NONE
;
585 fbuf
->vb
.sequence
= produced
;
586 fbuf
->vb
.vb2_buf
.timestamp
= ktime_get_ns();
587 vb2_set_plane_payload(&fbuf
->vb
.vb2_buf
, 0, sdr
->fmt
->buffersize
);
589 /* Set error state on overflow */
590 vb2_buffer_done(&fbuf
->vb
.vb2_buf
,
591 overflow
? VB2_BUF_STATE_ERROR
: VB2_BUF_STATE_DONE
);
594 static int rcar_drif_qbuf(struct rcar_drif
*ch
)
596 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
597 dma_addr_t addr
= ch
->dma_handle
;
598 struct dma_async_tx_descriptor
*rxd
;
602 /* Setup cyclic DMA with given buffers */
603 rxd
= dmaengine_prep_dma_cyclic(ch
->dmach
, addr
,
604 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
605 sdr
->hwbuf_size
, DMA_DEV_TO_MEM
,
606 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
608 rdrif_err(sdr
, "ch%u: prep dma cyclic failed\n", ch
->num
);
612 /* Submit descriptor */
613 rxd
->callback
= rcar_drif_dma_complete
;
614 rxd
->callback_param
= ch
;
615 cookie
= dmaengine_submit(rxd
);
616 if (dma_submit_error(cookie
)) {
617 rdrif_err(sdr
, "ch%u: dma submit failed\n", ch
->num
);
621 dma_async_issue_pending(ch
->dmach
);
625 /* Enable reception */
626 static int rcar_drif_enable_rx(struct rcar_drif_sdr
*sdr
)
633 * When both internal channels are enabled, they can be synchronized
638 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
639 ctr
= rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
);
640 ctr
|= (RCAR_DRIF_SICTR_RX_RISING_EDGE
|
641 RCAR_DRIF_SICTR_RX_EN
);
642 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SICTR
, ctr
);
645 /* Check receive enabled */
646 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
647 ret
= readl_poll_timeout(sdr
->ch
[i
]->base
+ RCAR_DRIF_SICTR
,
648 ctr
, ctr
& RCAR_DRIF_SICTR_RX_EN
, 7, 100000);
650 rdrif_err(sdr
, "ch%u: rx en failed. ctr 0x%08x\n", i
,
651 rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
));
658 /* Disable reception */
659 static void rcar_drif_disable_rx(struct rcar_drif_sdr
*sdr
)
665 /* Disable receive */
666 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
667 ctr
= rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
);
668 ctr
&= ~RCAR_DRIF_SICTR_RX_EN
;
669 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SICTR
, ctr
);
672 /* Check receive disabled */
673 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
674 ret
= readl_poll_timeout(sdr
->ch
[i
]->base
+ RCAR_DRIF_SICTR
,
675 ctr
, !(ctr
& RCAR_DRIF_SICTR_RX_EN
), 7, 100000);
677 dev_warn(&sdr
->vdev
->dev
,
678 "ch%u: failed to disable rx. ctr 0x%08x\n",
679 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
));
684 static void rcar_drif_stop_channel(struct rcar_drif
*ch
)
686 /* Disable DMA receive interrupt */
687 rcar_drif_write(ch
, RCAR_DRIF_SIIER
, 0x00000000);
689 /* Terminate all DMA transfers */
690 dmaengine_terminate_sync(ch
->dmach
);
693 /* Stop receive operation */
694 static void rcar_drif_stop(struct rcar_drif_sdr
*sdr
)
699 rcar_drif_disable_rx(sdr
);
701 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
702 rcar_drif_stop_channel(sdr
->ch
[i
]);
706 static int rcar_drif_start_channel(struct rcar_drif
*ch
)
708 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
713 rcar_drif_write(ch
, RCAR_DRIF_SICTR
, RCAR_DRIF_SICTR_RESET
);
714 ret
= readl_poll_timeout(ch
->base
+ RCAR_DRIF_SICTR
, ctr
,
715 !(ctr
& RCAR_DRIF_SICTR_RESET
), 7, 100000);
717 rdrif_err(sdr
, "ch%u: failed to reset rx. ctr 0x%08x\n",
718 ch
->num
, rcar_drif_read(ch
, RCAR_DRIF_SICTR
));
722 /* Queue buffers for DMA */
723 ret
= rcar_drif_qbuf(ch
);
727 /* Clear status register flags */
728 str
= RCAR_DRIF_RFFUL
| RCAR_DRIF_REOF
| RCAR_DRIF_RFSERR
|
729 RCAR_DRIF_RFUDF
| RCAR_DRIF_RFOVF
;
730 rcar_drif_write(ch
, RCAR_DRIF_SISTR
, str
);
732 /* Enable DMA receive interrupt */
733 rcar_drif_write(ch
, RCAR_DRIF_SIIER
, 0x00009000);
738 /* Start receive operation */
739 static int rcar_drif_start(struct rcar_drif_sdr
*sdr
)
741 unsigned long enabled
= 0;
745 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
746 ret
= rcar_drif_start_channel(sdr
->ch
[i
]);
752 ret
= rcar_drif_enable_rx(sdr
);
760 rcar_drif_disable_rx(sdr
);
762 for_each_rcar_drif_channel(i
, &enabled
)
763 rcar_drif_stop_channel(sdr
->ch
[i
]);
768 /* Start streaming */
769 static int rcar_drif_start_streaming(struct vb2_queue
*vq
, unsigned int count
)
771 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
772 unsigned long enabled
= 0;
776 mutex_lock(&sdr
->v4l2_mutex
);
778 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
779 ret
= clk_prepare_enable(sdr
->ch
[i
]->clk
);
785 /* Set default MDRx settings */
786 rcar_drif_set_mdr1(sdr
);
789 ret
= rcar_drif_set_format(sdr
);
793 if (sdr
->num_cur_ch
== RCAR_DRIF_MAX_CHANNEL
)
794 sdr
->hwbuf_size
= sdr
->fmt
->buffersize
/ RCAR_DRIF_MAX_CHANNEL
;
796 sdr
->hwbuf_size
= sdr
->fmt
->buffersize
;
798 rdrif_dbg(sdr
, "num hwbufs %u, hwbuf_size %u\n",
799 RCAR_DRIF_NUM_HWBUFS
, sdr
->hwbuf_size
);
801 /* Alloc DMA channel */
802 ret
= rcar_drif_alloc_dmachannels(sdr
);
806 /* Request buffers */
807 ret
= rcar_drif_request_buf(sdr
);
812 ret
= rcar_drif_start(sdr
);
816 mutex_unlock(&sdr
->v4l2_mutex
);
821 rcar_drif_release_queued_bufs(sdr
, VB2_BUF_STATE_QUEUED
);
822 rcar_drif_release_buf(sdr
);
823 rcar_drif_release_dmachannels(sdr
);
824 for_each_rcar_drif_channel(i
, &enabled
)
825 clk_disable_unprepare(sdr
->ch
[i
]->clk
);
827 mutex_unlock(&sdr
->v4l2_mutex
);
833 static void rcar_drif_stop_streaming(struct vb2_queue
*vq
)
835 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
838 mutex_lock(&sdr
->v4l2_mutex
);
840 /* Stop hardware streaming */
843 /* Return all queued buffers to vb2 */
844 rcar_drif_release_queued_bufs(sdr
, VB2_BUF_STATE_ERROR
);
847 rcar_drif_release_buf(sdr
);
849 /* Release DMA channel resources */
850 rcar_drif_release_dmachannels(sdr
);
852 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
853 clk_disable_unprepare(sdr
->ch
[i
]->clk
);
855 mutex_unlock(&sdr
->v4l2_mutex
);
859 static const struct vb2_ops rcar_drif_vb2_ops
= {
860 .queue_setup
= rcar_drif_queue_setup
,
861 .buf_queue
= rcar_drif_buf_queue
,
862 .start_streaming
= rcar_drif_start_streaming
,
863 .stop_streaming
= rcar_drif_stop_streaming
,
864 .wait_prepare
= vb2_ops_wait_prepare
,
865 .wait_finish
= vb2_ops_wait_finish
,
868 static int rcar_drif_querycap(struct file
*file
, void *fh
,
869 struct v4l2_capability
*cap
)
871 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
873 strlcpy(cap
->driver
, KBUILD_MODNAME
, sizeof(cap
->driver
));
874 strlcpy(cap
->card
, sdr
->vdev
->name
, sizeof(cap
->card
));
875 snprintf(cap
->bus_info
, sizeof(cap
->bus_info
), "platform:%s",
881 static int rcar_drif_set_default_format(struct rcar_drif_sdr
*sdr
)
885 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
886 /* Matching fmt based on required channels is set as default */
887 if (sdr
->num_hw_ch
== formats
[i
].num_ch
) {
888 sdr
->fmt
= &formats
[i
];
889 sdr
->cur_ch_mask
= sdr
->hw_ch_mask
;
890 sdr
->num_cur_ch
= sdr
->num_hw_ch
;
891 dev_dbg(sdr
->dev
, "default fmt[%u]: mask %lu num %u\n",
892 i
, sdr
->cur_ch_mask
, sdr
->num_cur_ch
);
899 static int rcar_drif_enum_fmt_sdr_cap(struct file
*file
, void *priv
,
900 struct v4l2_fmtdesc
*f
)
902 if (f
->index
>= ARRAY_SIZE(formats
))
905 f
->pixelformat
= formats
[f
->index
].pixelformat
;
910 static int rcar_drif_g_fmt_sdr_cap(struct file
*file
, void *priv
,
911 struct v4l2_format
*f
)
913 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
915 f
->fmt
.sdr
.pixelformat
= sdr
->fmt
->pixelformat
;
916 f
->fmt
.sdr
.buffersize
= sdr
->fmt
->buffersize
;
921 static int rcar_drif_s_fmt_sdr_cap(struct file
*file
, void *priv
,
922 struct v4l2_format
*f
)
924 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
925 struct vb2_queue
*q
= &sdr
->vb_queue
;
931 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
932 if (formats
[i
].pixelformat
== f
->fmt
.sdr
.pixelformat
)
936 if (i
== ARRAY_SIZE(formats
))
937 i
= 0; /* Set the 1st format as default on no match */
939 sdr
->fmt
= &formats
[i
];
940 f
->fmt
.sdr
.pixelformat
= sdr
->fmt
->pixelformat
;
941 f
->fmt
.sdr
.buffersize
= formats
[i
].buffersize
;
942 memset(f
->fmt
.sdr
.reserved
, 0, sizeof(f
->fmt
.sdr
.reserved
));
945 * If a format demands one channel only out of two
946 * enabled channels, pick the 0th channel.
948 if (formats
[i
].num_ch
< sdr
->num_hw_ch
) {
949 sdr
->cur_ch_mask
= BIT(0);
950 sdr
->num_cur_ch
= formats
[i
].num_ch
;
952 sdr
->cur_ch_mask
= sdr
->hw_ch_mask
;
953 sdr
->num_cur_ch
= sdr
->num_hw_ch
;
956 rdrif_dbg(sdr
, "cur: idx %u mask %lu num %u\n",
957 i
, sdr
->cur_ch_mask
, sdr
->num_cur_ch
);
962 static int rcar_drif_try_fmt_sdr_cap(struct file
*file
, void *priv
,
963 struct v4l2_format
*f
)
967 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
968 if (formats
[i
].pixelformat
== f
->fmt
.sdr
.pixelformat
) {
969 f
->fmt
.sdr
.buffersize
= formats
[i
].buffersize
;
974 f
->fmt
.sdr
.pixelformat
= formats
[0].pixelformat
;
975 f
->fmt
.sdr
.buffersize
= formats
[0].buffersize
;
976 memset(f
->fmt
.sdr
.reserved
, 0, sizeof(f
->fmt
.sdr
.reserved
));
981 /* Tuner subdev ioctls */
982 static int rcar_drif_enum_freq_bands(struct file
*file
, void *priv
,
983 struct v4l2_frequency_band
*band
)
985 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
987 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, enum_freq_bands
, band
);
990 static int rcar_drif_g_frequency(struct file
*file
, void *priv
,
991 struct v4l2_frequency
*f
)
993 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
995 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, g_frequency
, f
);
998 static int rcar_drif_s_frequency(struct file
*file
, void *priv
,
999 const struct v4l2_frequency
*f
)
1001 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1003 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, s_frequency
, f
);
1006 static int rcar_drif_g_tuner(struct file
*file
, void *priv
,
1007 struct v4l2_tuner
*vt
)
1009 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1011 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, g_tuner
, vt
);
1014 static int rcar_drif_s_tuner(struct file
*file
, void *priv
,
1015 const struct v4l2_tuner
*vt
)
1017 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1019 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, s_tuner
, vt
);
1022 static const struct v4l2_ioctl_ops rcar_drif_ioctl_ops
= {
1023 .vidioc_querycap
= rcar_drif_querycap
,
1025 .vidioc_enum_fmt_sdr_cap
= rcar_drif_enum_fmt_sdr_cap
,
1026 .vidioc_g_fmt_sdr_cap
= rcar_drif_g_fmt_sdr_cap
,
1027 .vidioc_s_fmt_sdr_cap
= rcar_drif_s_fmt_sdr_cap
,
1028 .vidioc_try_fmt_sdr_cap
= rcar_drif_try_fmt_sdr_cap
,
1030 .vidioc_reqbufs
= vb2_ioctl_reqbufs
,
1031 .vidioc_create_bufs
= vb2_ioctl_create_bufs
,
1032 .vidioc_prepare_buf
= vb2_ioctl_prepare_buf
,
1033 .vidioc_querybuf
= vb2_ioctl_querybuf
,
1034 .vidioc_qbuf
= vb2_ioctl_qbuf
,
1035 .vidioc_dqbuf
= vb2_ioctl_dqbuf
,
1037 .vidioc_streamon
= vb2_ioctl_streamon
,
1038 .vidioc_streamoff
= vb2_ioctl_streamoff
,
1040 .vidioc_s_frequency
= rcar_drif_s_frequency
,
1041 .vidioc_g_frequency
= rcar_drif_g_frequency
,
1042 .vidioc_s_tuner
= rcar_drif_s_tuner
,
1043 .vidioc_g_tuner
= rcar_drif_g_tuner
,
1044 .vidioc_enum_freq_bands
= rcar_drif_enum_freq_bands
,
1045 .vidioc_subscribe_event
= v4l2_ctrl_subscribe_event
,
1046 .vidioc_unsubscribe_event
= v4l2_event_unsubscribe
,
1047 .vidioc_log_status
= v4l2_ctrl_log_status
,
1050 static const struct v4l2_file_operations rcar_drif_fops
= {
1051 .owner
= THIS_MODULE
,
1052 .open
= v4l2_fh_open
,
1053 .release
= vb2_fop_release
,
1054 .read
= vb2_fop_read
,
1055 .poll
= vb2_fop_poll
,
1056 .mmap
= vb2_fop_mmap
,
1057 .unlocked_ioctl
= video_ioctl2
,
1060 static int rcar_drif_sdr_register(struct rcar_drif_sdr
*sdr
)
1064 /* Init video_device structure */
1065 sdr
->vdev
= video_device_alloc();
1069 snprintf(sdr
->vdev
->name
, sizeof(sdr
->vdev
->name
), "R-Car DRIF");
1070 sdr
->vdev
->fops
= &rcar_drif_fops
;
1071 sdr
->vdev
->ioctl_ops
= &rcar_drif_ioctl_ops
;
1072 sdr
->vdev
->release
= video_device_release
;
1073 sdr
->vdev
->lock
= &sdr
->v4l2_mutex
;
1074 sdr
->vdev
->queue
= &sdr
->vb_queue
;
1075 sdr
->vdev
->queue
->lock
= &sdr
->vb_queue_mutex
;
1076 sdr
->vdev
->ctrl_handler
= &sdr
->ctrl_hdl
;
1077 sdr
->vdev
->v4l2_dev
= &sdr
->v4l2_dev
;
1078 sdr
->vdev
->device_caps
= V4L2_CAP_SDR_CAPTURE
| V4L2_CAP_TUNER
|
1079 V4L2_CAP_STREAMING
| V4L2_CAP_READWRITE
;
1080 video_set_drvdata(sdr
->vdev
, sdr
);
1082 /* Register V4L2 SDR device */
1083 ret
= video_register_device(sdr
->vdev
, VFL_TYPE_SDR
, -1);
1085 video_device_release(sdr
->vdev
);
1087 dev_err(sdr
->dev
, "failed video_register_device (%d)\n", ret
);
1093 static void rcar_drif_sdr_unregister(struct rcar_drif_sdr
*sdr
)
1095 video_unregister_device(sdr
->vdev
);
1099 /* Sub-device bound callback */
1100 static int rcar_drif_notify_bound(struct v4l2_async_notifier
*notifier
,
1101 struct v4l2_subdev
*subdev
,
1102 struct v4l2_async_subdev
*asd
)
1104 struct rcar_drif_sdr
*sdr
=
1105 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1107 if (sdr
->ep
.asd
.match
.fwnode
!=
1108 of_fwnode_handle(subdev
->dev
->of_node
)) {
1109 rdrif_err(sdr
, "subdev %s cannot bind\n", subdev
->name
);
1113 v4l2_set_subdev_hostdata(subdev
, sdr
);
1114 sdr
->ep
.subdev
= subdev
;
1115 rdrif_dbg(sdr
, "bound asd %s\n", subdev
->name
);
1120 /* Sub-device unbind callback */
1121 static void rcar_drif_notify_unbind(struct v4l2_async_notifier
*notifier
,
1122 struct v4l2_subdev
*subdev
,
1123 struct v4l2_async_subdev
*asd
)
1125 struct rcar_drif_sdr
*sdr
=
1126 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1128 if (sdr
->ep
.subdev
!= subdev
) {
1129 rdrif_err(sdr
, "subdev %s is not bound\n", subdev
->name
);
1133 /* Free ctrl handler if initialized */
1134 v4l2_ctrl_handler_free(&sdr
->ctrl_hdl
);
1135 sdr
->v4l2_dev
.ctrl_handler
= NULL
;
1136 sdr
->ep
.subdev
= NULL
;
1138 rcar_drif_sdr_unregister(sdr
);
1139 rdrif_dbg(sdr
, "unbind asd %s\n", subdev
->name
);
1142 /* Sub-device registered notification callback */
1143 static int rcar_drif_notify_complete(struct v4l2_async_notifier
*notifier
)
1145 struct rcar_drif_sdr
*sdr
=
1146 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1150 * The subdev tested at this point uses 4 controls. Using 10 as a worst
1151 * case scenario hint. When less controls are needed there will be some
1152 * unused memory and when more controls are needed the framework uses
1153 * hash to manage controls within this number.
1155 ret
= v4l2_ctrl_handler_init(&sdr
->ctrl_hdl
, 10);
1159 sdr
->v4l2_dev
.ctrl_handler
= &sdr
->ctrl_hdl
;
1160 ret
= v4l2_device_register_subdev_nodes(&sdr
->v4l2_dev
);
1162 rdrif_err(sdr
, "failed: register subdev nodes ret %d\n", ret
);
1166 ret
= v4l2_ctrl_add_handler(&sdr
->ctrl_hdl
,
1167 sdr
->ep
.subdev
->ctrl_handler
, NULL
);
1169 rdrif_err(sdr
, "failed: ctrl add hdlr ret %d\n", ret
);
1173 ret
= rcar_drif_sdr_register(sdr
);
1180 v4l2_ctrl_handler_free(&sdr
->ctrl_hdl
);
1185 static const struct v4l2_async_notifier_operations rcar_drif_notify_ops
= {
1186 .bound
= rcar_drif_notify_bound
,
1187 .unbind
= rcar_drif_notify_unbind
,
1188 .complete
= rcar_drif_notify_complete
,
1191 /* Read endpoint properties */
1192 static void rcar_drif_get_ep_properties(struct rcar_drif_sdr
*sdr
,
1193 struct fwnode_handle
*fwnode
)
1197 /* Set the I2S defaults for SIRMDR1*/
1198 sdr
->mdr1
= RCAR_DRIF_SIRMDR1_SYNCMD_LR
| RCAR_DRIF_SIRMDR1_MSB_FIRST
|
1199 RCAR_DRIF_SIRMDR1_DTDL_1
| RCAR_DRIF_SIRMDR1_SYNCDL_0
;
1201 /* Parse sync polarity from endpoint */
1202 if (!fwnode_property_read_u32(fwnode
, "sync-active", &val
))
1203 sdr
->mdr1
|= val
? RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH
:
1204 RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW
;
1206 sdr
->mdr1
|= RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH
; /* default */
1208 dev_dbg(sdr
->dev
, "mdr1 0x%08x\n", sdr
->mdr1
);
1211 /* Parse sub-devs (tuner) to find a matching device */
1212 static int rcar_drif_parse_subdevs(struct rcar_drif_sdr
*sdr
)
1214 struct v4l2_async_notifier
*notifier
= &sdr
->notifier
;
1215 struct fwnode_handle
*fwnode
, *ep
;
1217 notifier
->subdevs
= devm_kzalloc(sdr
->dev
, sizeof(*notifier
->subdevs
),
1219 if (!notifier
->subdevs
)
1222 ep
= fwnode_graph_get_next_endpoint(of_fwnode_handle(sdr
->dev
->of_node
),
1227 notifier
->subdevs
[notifier
->num_subdevs
] = &sdr
->ep
.asd
;
1228 fwnode
= fwnode_graph_get_remote_port_parent(ep
);
1230 dev_warn(sdr
->dev
, "bad remote port parent\n");
1231 fwnode_handle_put(ep
);
1235 sdr
->ep
.asd
.match
.fwnode
= fwnode
;
1236 sdr
->ep
.asd
.match_type
= V4L2_ASYNC_MATCH_FWNODE
;
1237 notifier
->num_subdevs
++;
1239 /* Get the endpoint properties */
1240 rcar_drif_get_ep_properties(sdr
, ep
);
1242 fwnode_handle_put(fwnode
);
1243 fwnode_handle_put(ep
);
1248 /* Check if the given device is the primary bond */
1249 static bool rcar_drif_primary_bond(struct platform_device
*pdev
)
1251 return of_property_read_bool(pdev
->dev
.of_node
, "renesas,primary-bond");
1254 /* Check if both devices of the bond are enabled */
1255 static struct device_node
*rcar_drif_bond_enabled(struct platform_device
*p
)
1257 struct device_node
*np
;
1259 np
= of_parse_phandle(p
->dev
.of_node
, "renesas,bonding", 0);
1260 if (np
&& of_device_is_available(np
))
1266 /* Check if the bonded device is probed */
1267 static int rcar_drif_bond_available(struct rcar_drif_sdr
*sdr
,
1268 struct device_node
*np
)
1270 struct platform_device
*pdev
;
1271 struct rcar_drif
*ch
;
1274 pdev
= of_find_device_by_node(np
);
1276 dev_err(sdr
->dev
, "failed to get bonded device from node\n");
1280 device_lock(&pdev
->dev
);
1281 ch
= platform_get_drvdata(pdev
);
1283 /* Update sdr data in the bonded device */
1286 /* Update sdr with bonded device data */
1287 sdr
->ch
[ch
->num
] = ch
;
1288 sdr
->hw_ch_mask
|= BIT(ch
->num
);
1291 dev_info(sdr
->dev
, "defer probe\n");
1292 ret
= -EPROBE_DEFER
;
1294 device_unlock(&pdev
->dev
);
1296 put_device(&pdev
->dev
);
1301 /* V4L2 SDR device probe */
1302 static int rcar_drif_sdr_probe(struct rcar_drif_sdr
*sdr
)
1306 /* Validate any supported format for enabled channels */
1307 ret
= rcar_drif_set_default_format(sdr
);
1309 dev_err(sdr
->dev
, "failed to set default format\n");
1314 sdr
->hwbuf_size
= RCAR_DRIF_DEFAULT_HWBUF_SIZE
;
1316 mutex_init(&sdr
->v4l2_mutex
);
1317 mutex_init(&sdr
->vb_queue_mutex
);
1318 spin_lock_init(&sdr
->queued_bufs_lock
);
1319 spin_lock_init(&sdr
->dma_lock
);
1320 INIT_LIST_HEAD(&sdr
->queued_bufs
);
1322 /* Init videobuf2 queue structure */
1323 sdr
->vb_queue
.type
= V4L2_BUF_TYPE_SDR_CAPTURE
;
1324 sdr
->vb_queue
.io_modes
= VB2_READ
| VB2_MMAP
| VB2_DMABUF
;
1325 sdr
->vb_queue
.drv_priv
= sdr
;
1326 sdr
->vb_queue
.buf_struct_size
= sizeof(struct rcar_drif_frame_buf
);
1327 sdr
->vb_queue
.ops
= &rcar_drif_vb2_ops
;
1328 sdr
->vb_queue
.mem_ops
= &vb2_vmalloc_memops
;
1329 sdr
->vb_queue
.timestamp_flags
= V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC
;
1331 /* Init videobuf2 queue */
1332 ret
= vb2_queue_init(&sdr
->vb_queue
);
1334 dev_err(sdr
->dev
, "failed: vb2_queue_init ret %d\n", ret
);
1338 /* Register the v4l2_device */
1339 ret
= v4l2_device_register(sdr
->dev
, &sdr
->v4l2_dev
);
1341 dev_err(sdr
->dev
, "failed: v4l2_device_register ret %d\n", ret
);
1346 * Parse subdevs after v4l2_device_register because if the subdev
1347 * is already probed, bound and complete will be called immediately
1349 ret
= rcar_drif_parse_subdevs(sdr
);
1353 sdr
->notifier
.ops
= &rcar_drif_notify_ops
;
1355 /* Register notifier */
1356 ret
= v4l2_async_notifier_register(&sdr
->v4l2_dev
, &sdr
->notifier
);
1358 dev_err(sdr
->dev
, "failed: notifier register ret %d\n", ret
);
1365 v4l2_device_unregister(&sdr
->v4l2_dev
);
1370 /* V4L2 SDR device remove */
1371 static void rcar_drif_sdr_remove(struct rcar_drif_sdr
*sdr
)
1373 v4l2_async_notifier_unregister(&sdr
->notifier
);
1374 v4l2_device_unregister(&sdr
->v4l2_dev
);
1377 /* DRIF channel probe */
1378 static int rcar_drif_probe(struct platform_device
*pdev
)
1380 struct rcar_drif_sdr
*sdr
;
1381 struct device_node
*np
;
1382 struct rcar_drif
*ch
;
1383 struct resource
*res
;
1386 /* Reserve memory for enabled channel */
1387 ch
= devm_kzalloc(&pdev
->dev
, sizeof(*ch
), GFP_KERNEL
);
1394 ch
->clk
= devm_clk_get(&pdev
->dev
, "fck");
1395 if (IS_ERR(ch
->clk
)) {
1396 ret
= PTR_ERR(ch
->clk
);
1397 dev_err(&pdev
->dev
, "clk get failed (%d)\n", ret
);
1402 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1403 ch
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
1404 if (IS_ERR(ch
->base
)) {
1405 ret
= PTR_ERR(ch
->base
);
1406 dev_err(&pdev
->dev
, "ioremap failed (%d)\n", ret
);
1409 ch
->start
= res
->start
;
1410 platform_set_drvdata(pdev
, ch
);
1412 /* Check if both channels of the bond are enabled */
1413 np
= rcar_drif_bond_enabled(pdev
);
1415 /* Check if current channel acting as primary-bond */
1416 if (!rcar_drif_primary_bond(pdev
)) {
1417 ch
->num
= 1; /* Primary bond is channel 0 always */
1423 /* Reserve memory for SDR structure */
1424 sdr
= devm_kzalloc(&pdev
->dev
, sizeof(*sdr
), GFP_KERNEL
);
1430 sdr
->dev
= &pdev
->dev
;
1432 /* Establish links between SDR and channel(s) */
1433 sdr
->ch
[ch
->num
] = ch
;
1434 sdr
->hw_ch_mask
= BIT(ch
->num
);
1436 /* Check if bonded device is ready */
1437 ret
= rcar_drif_bond_available(sdr
, np
);
1442 sdr
->num_hw_ch
= hweight_long(sdr
->hw_ch_mask
);
1444 return rcar_drif_sdr_probe(sdr
);
1447 /* DRIF channel remove */
1448 static int rcar_drif_remove(struct platform_device
*pdev
)
1450 struct rcar_drif
*ch
= platform_get_drvdata(pdev
);
1451 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
1453 /* Channel 0 will be the SDR instance */
1458 rcar_drif_sdr_remove(sdr
);
1463 /* FIXME: Implement suspend/resume support */
1464 static int __maybe_unused
rcar_drif_suspend(struct device
*dev
)
1469 static int __maybe_unused
rcar_drif_resume(struct device
*dev
)
1474 static SIMPLE_DEV_PM_OPS(rcar_drif_pm_ops
, rcar_drif_suspend
,
1477 static const struct of_device_id rcar_drif_of_table
[] = {
1478 { .compatible
= "renesas,rcar-gen3-drif" },
1481 MODULE_DEVICE_TABLE(of
, rcar_drif_of_table
);
1483 #define RCAR_DRIF_DRV_NAME "rcar_drif"
1484 static struct platform_driver rcar_drif_driver
= {
1486 .name
= RCAR_DRIF_DRV_NAME
,
1487 .of_match_table
= of_match_ptr(rcar_drif_of_table
),
1488 .pm
= &rcar_drif_pm_ops
,
1490 .probe
= rcar_drif_probe
,
1491 .remove
= rcar_drif_remove
,
1494 module_platform_driver(rcar_drif_driver
);
1496 MODULE_DESCRIPTION("Renesas R-Car Gen3 DRIF driver");
1497 MODULE_ALIAS("platform:" RCAR_DRIF_DRV_NAME
);
1498 MODULE_LICENSE("GPL");
1499 MODULE_AUTHOR("Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>");