2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include "s5p_mfc_common.h"
15 #include "s5p_mfc_cmd.h"
16 #include "s5p_mfc_debug.h"
17 #include "s5p_mfc_intr.h"
18 #include "s5p_mfc_opr.h"
19 #include "s5p_mfc_cmd_v6.h"
21 static int s5p_mfc_cmd_host2risc_v6(struct s5p_mfc_dev
*dev
, int cmd
,
22 struct s5p_mfc_cmd_args
*args
)
24 mfc_debug(2, "Issue the command: %d\n", cmd
);
26 /* Reset RISC2HOST command */
27 mfc_write(dev
, 0x0, S5P_FIMV_RISC2HOST_CMD_V6
);
29 /* Issue the command */
30 mfc_write(dev
, cmd
, S5P_FIMV_HOST2RISC_CMD_V6
);
31 mfc_write(dev
, 0x1, S5P_FIMV_HOST2RISC_INT_V6
);
36 static int s5p_mfc_sys_init_cmd_v6(struct s5p_mfc_dev
*dev
)
38 struct s5p_mfc_cmd_args h2r_args
;
39 struct s5p_mfc_buf_size_v6
*buf_size
= dev
->variant
->buf_size
->priv
;
42 ret
= s5p_mfc_hw_call(dev
->mfc_ops
, alloc_dev_context_buffer
, dev
);
46 mfc_write(dev
, dev
->ctx_buf
.dma
, S5P_FIMV_CONTEXT_MEM_ADDR_V6
);
47 mfc_write(dev
, buf_size
->dev_ctx
, S5P_FIMV_CONTEXT_MEM_SIZE_V6
);
48 return s5p_mfc_cmd_host2risc_v6(dev
, S5P_FIMV_H2R_CMD_SYS_INIT_V6
,
52 static int s5p_mfc_sleep_cmd_v6(struct s5p_mfc_dev
*dev
)
54 struct s5p_mfc_cmd_args h2r_args
;
56 memset(&h2r_args
, 0, sizeof(struct s5p_mfc_cmd_args
));
57 return s5p_mfc_cmd_host2risc_v6(dev
, S5P_FIMV_H2R_CMD_SLEEP_V6
,
61 static int s5p_mfc_wakeup_cmd_v6(struct s5p_mfc_dev
*dev
)
63 struct s5p_mfc_cmd_args h2r_args
;
65 memset(&h2r_args
, 0, sizeof(struct s5p_mfc_cmd_args
));
66 return s5p_mfc_cmd_host2risc_v6(dev
, S5P_FIMV_H2R_CMD_WAKEUP_V6
,
70 /* Open a new instance and get its number */
71 static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx
*ctx
)
73 struct s5p_mfc_dev
*dev
= ctx
->dev
;
74 struct s5p_mfc_cmd_args h2r_args
;
77 mfc_debug(2, "Requested codec mode: %d\n", ctx
->codec_mode
);
78 dev
->curr_ctx
= ctx
->num
;
79 switch (ctx
->codec_mode
) {
80 case S5P_MFC_CODEC_H264_DEC
:
81 codec_type
= S5P_FIMV_CODEC_H264_DEC_V6
;
83 case S5P_MFC_CODEC_H264_MVC_DEC
:
84 codec_type
= S5P_FIMV_CODEC_H264_MVC_DEC_V6
;
86 case S5P_MFC_CODEC_VC1_DEC
:
87 codec_type
= S5P_FIMV_CODEC_VC1_DEC_V6
;
89 case S5P_MFC_CODEC_MPEG4_DEC
:
90 codec_type
= S5P_FIMV_CODEC_MPEG4_DEC_V6
;
92 case S5P_MFC_CODEC_MPEG2_DEC
:
93 codec_type
= S5P_FIMV_CODEC_MPEG2_DEC_V6
;
95 case S5P_MFC_CODEC_H263_DEC
:
96 codec_type
= S5P_FIMV_CODEC_H263_DEC_V6
;
98 case S5P_MFC_CODEC_VC1RCV_DEC
:
99 codec_type
= S5P_FIMV_CODEC_VC1RCV_DEC_V6
;
101 case S5P_MFC_CODEC_VP8_DEC
:
102 codec_type
= S5P_FIMV_CODEC_VP8_DEC_V6
;
104 case S5P_MFC_CODEC_HEVC_DEC
:
105 codec_type
= S5P_FIMV_CODEC_HEVC_DEC
;
107 case S5P_MFC_CODEC_VP9_DEC
:
108 codec_type
= S5P_FIMV_CODEC_VP9_DEC
;
110 case S5P_MFC_CODEC_H264_ENC
:
111 codec_type
= S5P_FIMV_CODEC_H264_ENC_V6
;
113 case S5P_MFC_CODEC_H264_MVC_ENC
:
114 codec_type
= S5P_FIMV_CODEC_H264_MVC_ENC_V6
;
116 case S5P_MFC_CODEC_MPEG4_ENC
:
117 codec_type
= S5P_FIMV_CODEC_MPEG4_ENC_V6
;
119 case S5P_MFC_CODEC_H263_ENC
:
120 codec_type
= S5P_FIMV_CODEC_H263_ENC_V6
;
122 case S5P_MFC_CODEC_VP8_ENC
:
123 codec_type
= S5P_FIMV_CODEC_VP8_ENC_V7
;
125 case S5P_MFC_CODEC_HEVC_ENC
:
126 codec_type
= S5P_FIMV_CODEC_HEVC_ENC
;
129 codec_type
= S5P_FIMV_CODEC_NONE_V6
;
131 mfc_write(dev
, codec_type
, S5P_FIMV_CODEC_TYPE_V6
);
132 mfc_write(dev
, ctx
->ctx
.dma
, S5P_FIMV_CONTEXT_MEM_ADDR_V6
);
133 mfc_write(dev
, ctx
->ctx
.size
, S5P_FIMV_CONTEXT_MEM_SIZE_V6
);
134 mfc_write(dev
, 0, S5P_FIMV_D_CRC_CTRL_V6
); /* no crc */
136 return s5p_mfc_cmd_host2risc_v6(dev
, S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V6
,
141 static int s5p_mfc_close_inst_cmd_v6(struct s5p_mfc_ctx
*ctx
)
143 struct s5p_mfc_dev
*dev
= ctx
->dev
;
144 struct s5p_mfc_cmd_args h2r_args
;
147 dev
->curr_ctx
= ctx
->num
;
148 if (ctx
->state
!= MFCINST_FREE
) {
149 mfc_write(dev
, ctx
->inst_no
, S5P_FIMV_INSTANCE_ID_V6
);
150 ret
= s5p_mfc_cmd_host2risc_v6(dev
,
151 S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6
,
160 /* Initialize cmd function pointers for MFC v6 */
161 static struct s5p_mfc_hw_cmds s5p_mfc_cmds_v6
= {
162 .cmd_host2risc
= s5p_mfc_cmd_host2risc_v6
,
163 .sys_init_cmd
= s5p_mfc_sys_init_cmd_v6
,
164 .sleep_cmd
= s5p_mfc_sleep_cmd_v6
,
165 .wakeup_cmd
= s5p_mfc_wakeup_cmd_v6
,
166 .open_inst_cmd
= s5p_mfc_open_inst_cmd_v6
,
167 .close_inst_cmd
= s5p_mfc_close_inst_cmd_v6
,
170 struct s5p_mfc_hw_cmds
*s5p_mfc_init_hw_cmds_v6(void)
172 return &s5p_mfc_cmds_v6
;