drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.h

   1 /*
   2  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef WCN3990_QMI_SVC_V01_H
  18 #define WCN3990_QMI_SVC_V01_H
  19
  20 #define WLFW_SERVICE_ID_V01 0x45
  21 #define WLFW_SERVICE_VERS_V01 0x01
  22
  23 #define QMI_WLFW_BDF_DOWNLOAD_REQ_V01 0x0025
  24 #define QMI_WLFW_MEM_READY_IND_V01 0x0037
  25 #define QMI_WLFW_DYNAMIC_FEATURE_MASK_RESP_V01 0x003B
  26 #define QMI_WLFW_INITIATE_CAL_UPDATE_IND_V01 0x002A
  27 #define QMI_WLFW_HOST_CAP_REQ_V01 0x0034
  28 #define QMI_WLFW_M3_INFO_REQ_V01 0x003C
  29 #define QMI_WLFW_CAP_REQ_V01 0x0024
  30 #define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038
  31 #define QMI_WLFW_CAL_REPORT_REQ_V01 0x0026
  32 #define QMI_WLFW_M3_INFO_RESP_V01 0x003C
  33 #define QMI_WLFW_CAL_UPDATE_RESP_V01 0x0029
  34 #define QMI_WLFW_CAL_DOWNLOAD_RESP_V01 0x0027
  35 #define QMI_WLFW_XO_CAL_IND_V01 0x003D
  36 #define QMI_WLFW_INI_RESP_V01 0x002F
  37 #define QMI_WLFW_CAL_REPORT_RESP_V01 0x0026
  38 #define QMI_WLFW_MAC_ADDR_RESP_V01 0x0033
  39 #define QMI_WLFW_INITIATE_CAL_DOWNLOAD_IND_V01 0x0028
  40 #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034
  41 #define QMI_WLFW_MSA_READY_IND_V01 0x002B
  42 #define QMI_WLFW_ATHDIAG_WRITE_RESP_V01 0x0031
  43 #define QMI_WLFW_WLAN_MODE_REQ_V01 0x0022
  44 #define QMI_WLFW_IND_REGISTER_REQ_V01 0x0020
  45 #define QMI_WLFW_WLAN_CFG_RESP_V01 0x0023
  46 #define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035
  47 #define QMI_WLFW_REJUVENATE_IND_V01 0x0039
  48 #define QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01 0x003B
  49 #define QMI_WLFW_ATHDIAG_WRITE_REQ_V01 0x0031
  50 #define QMI_WLFW_WLAN_MODE_RESP_V01 0x0022
  51 #define QMI_WLFW_RESPOND_MEM_REQ_V01 0x0036
  52 #define QMI_WLFW_PIN_CONNECT_RESULT_IND_V01 0x002C
  53 #define QMI_WLFW_FW_READY_IND_V01 0x0021
  54 #define QMI_WLFW_MSA_READY_RESP_V01 0x002E
  55 #define QMI_WLFW_CAL_UPDATE_REQ_V01 0x0029
  56 #define QMI_WLFW_INI_REQ_V01 0x002F
  57 #define QMI_WLFW_BDF_DOWNLOAD_RESP_V01 0x0025
  58 #define QMI_WLFW_REJUVENATE_ACK_RESP_V01 0x003A
  59 #define QMI_WLFW_MSA_INFO_RESP_V01 0x002D
  60 #define QMI_WLFW_MSA_READY_REQ_V01 0x002E
  61 #define QMI_WLFW_CAP_RESP_V01 0x0024
  62 #define QMI_WLFW_REJUVENATE_ACK_REQ_V01 0x003A
  63 #define QMI_WLFW_ATHDIAG_READ_RESP_V01 0x0030
  64 #define QMI_WLFW_VBATT_REQ_V01 0x0032
  65 #define QMI_WLFW_MAC_ADDR_REQ_V01 0x0033
  66 #define QMI_WLFW_RESPOND_MEM_RESP_V01 0x0036
  67 #define QMI_WLFW_VBATT_RESP_V01 0x0032
  68 #define QMI_WLFW_MSA_INFO_REQ_V01 0x002D
  69 #define QMI_WLFW_CAL_DOWNLOAD_REQ_V01 0x0027
  70 #define QMI_WLFW_ATHDIAG_READ_REQ_V01 0x0030
  71 #define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023
  72 #define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020
  73
  74 #define QMI_WLFW_MAX_MEM_REG_V01 2
  75 #define QMI_WLFW_MAX_NUM_MEM_SEG_V01 16
  76 #define QMI_WLFW_MAX_NUM_CAL_V01 5
  77 #define QMI_WLFW_MAX_DATA_SIZE_V01 6144
  78 #define QMI_WLFW_FUNCTION_NAME_LEN_V01 128
  79 #define QMI_WLFW_MAX_NUM_CE_V01 12
  80 #define QMI_WLFW_MAX_TIMESTAMP_LEN_V01 32
  81 #define QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01 6144
  82 #define QMI_WLFW_MAX_NUM_GPIO_V01 32
  83 #define QMI_WLFW_MAX_BUILD_ID_LEN_V01 128
  84 #define QMI_WLFW_MAX_NUM_MEM_CFG_V01 2
  85 #define QMI_WLFW_MAX_STR_LEN_V01 16
  86 #define QMI_WLFW_MAX_NUM_SHADOW_REG_V01 24
  87 #define QMI_WLFW_MAC_ADDR_SIZE_V01 6
  88 #define QMI_WLFW_MAX_SHADOW_REG_V2 36
  89 #define QMI_WLFW_MAX_NUM_SVC_V01 24
  90
  91 enum wlfw_driver_mode_enum_v01 {
  92         QMI_WLFW_MISSION_V01 = 0,
  93         QMI_WLFW_FTM_V01 = 1,
  94         QMI_WLFW_EPPING_V01 = 2,
  95         QMI_WLFW_WALTEST_V01 = 3,
  96         QMI_WLFW_OFF_V01 = 4,
  97         QMI_WLFW_CCPM_V01 = 5,
  98         QMI_WLFW_QVIT_V01 = 6,
  99         QMI_WLFW_CALIBRATION_V01 = 7,
 100 };
 101
 102 enum wlfw_cal_temp_id_enum_v01 {
 103         QMI_WLFW_CAL_TEMP_IDX_0_V01 = 0,
 104         QMI_WLFW_CAL_TEMP_IDX_1_V01 = 1,
 105         QMI_WLFW_CAL_TEMP_IDX_2_V01 = 2,
 106         QMI_WLFW_CAL_TEMP_IDX_3_V01 = 3,
 107         QMI_WLFW_CAL_TEMP_IDX_4_V01 = 4,
 108 };
 109
 110 enum wlfw_pipedir_enum_v01 {
 111         QMI_WLFW_PIPEDIR_NONE_V01 = 0,
 112         QMI_WLFW_PIPEDIR_IN_V01 = 1,
 113         QMI_WLFW_PIPEDIR_OUT_V01 = 2,
 114         QMI_WLFW_PIPEDIR_INOUT_V01 = 3,
 115 };
 116
 117 enum wlfw_mem_type_enum_v01 {
 118         QMI_WLFW_MEM_TYPE_MSA_V01 = 0,
 119         QMI_WLFW_MEM_TYPE_DDR_V01 = 1,
 120 };
 121
 122 #define QMI_WLFW_CE_ATTR_FLAGS_V01 ((u32)0x00)
 123 #define QMI_WLFW_CE_ATTR_NO_SNOOP_V01 ((u32)0x01)
 124 #define QMI_WLFW_CE_ATTR_BYTE_SWAP_DATA_V01 ((u32)0x02)
 125 #define QMI_WLFW_CE_ATTR_SWIZZLE_DESCRIPTORS_V01 ((u32)0x04)
 126 #define QMI_WLFW_CE_ATTR_DISABLE_INTR_V01 ((u32)0x08)
 127 #define QMI_WLFW_CE_ATTR_ENABLE_POLL_V01 ((u32)0x10)
 128
 129 #define QMI_WLFW_ALREADY_REGISTERED_V01 ((u64)0x01ULL)
 130 #define QMI_WLFW_FW_READY_V01 ((u64)0x02ULL)
 131 #define QMI_WLFW_MSA_READY_V01 ((u64)0x04ULL)
 132 #define QMI_WLFW_MEM_READY_V01 ((u64)0x08ULL)
 133 #define QMI_WLFW_FW_INIT_DONE_V01 ((u64)0x10ULL)
 134
 135 #define QMI_WLFW_FW_REJUVENATE_V01 ((u64)0x01ULL)
 136
 137 struct wlfw_ce_tgt_pipe_cfg_s_v01 {
 138         __le32 pipe_num;
 139         __le32 pipe_dir;
 140         __le32 nentries;
 141         __le32 nbytes_max;
 142         __le32 flags;
 143 };
 144
 145 struct wlfw_ce_svc_pipe_cfg_s_v01 {
 146         __le32 service_id;
 147         __le32 pipe_dir;
 148         __le32 pipe_num;
 149 };
 150
 151 struct wlfw_shadow_reg_cfg_s_v01 {
 152         u16 id;
 153         u16 offset;
 154 };
 155
 156 struct wlfw_shadow_reg_v2_cfg_s_v01 {
 157         u32 addr;
 158 };
 159
 160 struct wlfw_memory_region_info_s_v01 {
 161         u64 region_addr;
 162         u32 size;
 163         u8 secure_flag;
 164 };
 165
 166 struct wlfw_mem_cfg_s_v01 {
 167         u64 offset;
 168         u32 size;
 169         u8 secure_flag;
 170 };
 171
 172 struct wlfw_mem_seg_s_v01 {
 173         u32 size;
 174         enum wlfw_mem_type_enum_v01 type;
 175         u32 mem_cfg_len;
 176         struct wlfw_mem_cfg_s_v01 mem_cfg[QMI_WLFW_MAX_NUM_MEM_CFG_V01];
 177 };
 178
 179 struct wlfw_mem_seg_resp_s_v01 {
 180         u64 addr;
 181         u32 size;
 182         enum wlfw_mem_type_enum_v01 type;
 183 };
 184
 185 struct wlfw_rf_chip_info_s_v01 {
 186         u32 chip_id;
 187         u32 chip_family;
 188 };
 189
 190 struct wlfw_rf_board_info_s_v01 {
 191         u32 board_id;
 192 };
 193
 194 struct wlfw_soc_info_s_v01 {
 195         u32 soc_id;
 196 };
 197
 198 struct wlfw_fw_version_info_s_v01 {
 199         u32 fw_version;
 200         char fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN_V01 + 1];
 201 };
 202
 203 struct wlfw_ind_register_req_msg_v01 {
 204         u8 fw_ready_enable_valid;
 205         u8 fw_ready_enable;
 206         u8 initiate_cal_download_enable_valid;
 207         u8 initiate_cal_download_enable;
 208         u8 initiate_cal_update_enable_valid;
 209         u8 initiate_cal_update_enable;
 210         u8 msa_ready_enable_valid;
 211         u8 msa_ready_enable;
 212         u8 pin_connect_result_enable_valid;
 213         u8 pin_connect_result_enable;
 214         u8 client_id_valid;
 215         u32 client_id;
 216         u8 request_mem_enable_valid;
 217         u8 request_mem_enable;
 218         u8 mem_ready_enable_valid;
 219         u8 mem_ready_enable;
 220         u8 fw_init_done_enable_valid;
 221         u8 fw_init_done_enable;
 222         u8 rejuvenate_enable_valid;
 223         u32 rejuvenate_enable;
 224         u8 xo_cal_enable_valid;
 225         u8 xo_cal_enable;
 226 };
 227
 228 #define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 50
 229 extern struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[];
 230
 231 struct wlfw_ind_register_resp_msg_v01 {
 232         struct qmi_response_type_v01 resp;
 233         u8 fw_status_valid;
 234         u64 fw_status;
 235 };
 236
 237 #define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 18
 238 extern struct qmi_elem_info wlfw_ind_register_resp_msg_v01_ei[];
 239
 240 struct wlfw_fw_ready_ind_msg_v01 {
 241         char placeholder;
 242 };
 243
 244 #define WLFW_FW_READY_IND_MSG_V01_MAX_MSG_LEN 0
 245 extern struct qmi_elem_info wlfw_fw_ready_ind_msg_v01_ei[];
 246
 247 struct wlfw_msa_ready_ind_msg_v01 {
 248         char placeholder;
 249 };
 250
 251 #define WLFW_MSA_READY_IND_MSG_V01_MAX_MSG_LEN 0
 252 extern struct qmi_elem_info wlfw_msa_ready_ind_msg_v01_ei[];
 253
 254 struct wlfw_pin_connect_result_ind_msg_v01 {
 255         u8 pwr_pin_result_valid;
 256         u32 pwr_pin_result;
 257         u8 phy_io_pin_result_valid;
 258         u32 phy_io_pin_result;
 259         u8 rf_pin_result_valid;
 260         u32 rf_pin_result;
 261 };
 262
 263 #define WLFW_PIN_CONNECT_RESULT_IND_MSG_V01_MAX_MSG_LEN 21
 264 extern struct qmi_elem_info wlfw_pin_connect_result_ind_msg_v01_ei[];
 265
 266 struct wlfw_wlan_mode_req_msg_v01 {
 267         enum wlfw_driver_mode_enum_v01 mode;
 268         u8 hw_debug_valid;
 269         u8 hw_debug;
 270 };
 271
 272 #define WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN 11
 273 extern struct qmi_elem_info wlfw_wlan_mode_req_msg_v01_ei[];
 274
 275 struct wlfw_wlan_mode_resp_msg_v01 {
 276         struct qmi_response_type_v01 resp;
 277 };
 278
 279 #define WLFW_WLAN_MODE_RESP_MSG_V01_MAX_MSG_LEN 7
 280 extern struct qmi_elem_info wlfw_wlan_mode_resp_msg_v01_ei[];
 281
 282 struct wlfw_wlan_cfg_req_msg_v01 {
 283         u8 host_version_valid;
 284         char host_version[QMI_WLFW_MAX_STR_LEN_V01 + 1];
 285         u8 tgt_cfg_valid;
 286         u32 tgt_cfg_len;
 287         struct wlfw_ce_tgt_pipe_cfg_s_v01 tgt_cfg[QMI_WLFW_MAX_NUM_CE_V01];
 288         u8 svc_cfg_valid;
 289         u32 svc_cfg_len;
 290         struct wlfw_ce_svc_pipe_cfg_s_v01 svc_cfg[QMI_WLFW_MAX_NUM_SVC_V01];
 291         u8 shadow_reg_valid;
 292         u32 shadow_reg_len;
 293         struct wlfw_shadow_reg_cfg_s_v01 shadow_reg[QMI_WLFW_MAX_NUM_SHADOW_REG_V01];
 294         u8 shadow_reg_v2_valid;
 295         u32 shadow_reg_v2_len;
 296         struct wlfw_shadow_reg_v2_cfg_s_v01 shadow_reg_v2[QMI_WLFW_MAX_SHADOW_REG_V2];
 297 };
 298
 299 #define WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN 803
 300 extern struct qmi_elem_info wlfw_wlan_cfg_req_msg_v01_ei[];
 301
 302 struct wlfw_wlan_cfg_resp_msg_v01 {
 303         struct qmi_response_type_v01 resp;
 304 };
 305
 306 #define WLFW_WLAN_CFG_RESP_MSG_V01_MAX_MSG_LEN 7
 307 extern struct qmi_elem_info wlfw_wlan_cfg_resp_msg_v01_ei[];
 308
 309 struct wlfw_cap_req_msg_v01 {
 310         char placeholder;
 311 };
 312
 313 #define WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN 0
 314 extern struct qmi_elem_info wlfw_cap_req_msg_v01_ei[];
 315
 316 struct wlfw_cap_resp_msg_v01 {
 317         struct qmi_response_type_v01 resp;
 318         u8 chip_info_valid;
 319         struct wlfw_rf_chip_info_s_v01 chip_info;
 320         u8 board_info_valid;
 321         struct wlfw_rf_board_info_s_v01 board_info;
 322         u8 soc_info_valid;
 323         struct wlfw_soc_info_s_v01 soc_info;
 324         u8 fw_version_info_valid;
 325         struct wlfw_fw_version_info_s_v01 fw_version_info;
 326         u8 fw_build_id_valid;
 327         char fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN_V01 + 1];
 328         u8 num_macs_valid;
 329         u8 num_macs;
 330 };
 331
 332 #define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 207
 333 extern struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[];
 334
 335 struct wlfw_bdf_download_req_msg_v01 {
 336         u8 valid;
 337         u8 file_id_valid;
 338         enum wlfw_cal_temp_id_enum_v01 file_id;
 339         u8 total_size_valid;
 340         u32 total_size;
 341         u8 seg_id_valid;
 342         u32 seg_id;
 343         u8 data_valid;
 344         u32 data_len;
 345         u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
 346         u8 end_valid;
 347         u8 end;
 348         u8 bdf_type_valid;
 349         u8 bdf_type;
 350 };
 351
 352 #define WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6182
 353 extern struct qmi_elem_info wlfw_bdf_download_req_msg_v01_ei[];
 354
 355 struct wlfw_bdf_download_resp_msg_v01 {
 356         struct qmi_response_type_v01 resp;
 357 };
 358
 359 #define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
 360 extern struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[];
 361
 362 struct wlfw_cal_report_req_msg_v01 {
 363         u32 meta_data_len;
 364         enum wlfw_cal_temp_id_enum_v01 meta_data[QMI_WLFW_MAX_NUM_CAL_V01];
 365         u8 xo_cal_data_valid;
 366         u8 xo_cal_data;
 367 };
 368
 369 #define WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN 28
 370 extern struct qmi_elem_info wlfw_cal_report_req_msg_v01_ei[];
 371
 372 struct wlfw_cal_report_resp_msg_v01 {
 373         struct qmi_response_type_v01 resp;
 374 };
 375
 376 #define WLFW_CAL_REPORT_RESP_MSG_V01_MAX_MSG_LEN 7
 377 extern struct qmi_elem_info wlfw_cal_report_resp_msg_v01_ei[];
 378
 379 struct wlfw_initiate_cal_download_ind_msg_v01 {
 380         enum wlfw_cal_temp_id_enum_v01 cal_id;
 381 };
 382
 383 #define WLFW_INITIATE_CAL_DOWNLOAD_IND_MSG_V01_MAX_MSG_LEN 7
 384 extern struct qmi_elem_info wlfw_initiate_cal_download_ind_msg_v01_ei[];
 385
 386 struct wlfw_cal_download_req_msg_v01 {
 387         u8 valid;
 388         u8 file_id_valid;
 389         enum wlfw_cal_temp_id_enum_v01 file_id;
 390         u8 total_size_valid;
 391         u32 total_size;
 392         u8 seg_id_valid;
 393         u32 seg_id;
 394         u8 data_valid;
 395         u32 data_len;
 396         u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
 397         u8 end_valid;
 398         u8 end;
 399 };
 400
 401 #define WLFW_CAL_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6178
 402 extern struct qmi_elem_info wlfw_cal_download_req_msg_v01_ei[];
 403
 404 struct wlfw_cal_download_resp_msg_v01 {
 405         struct qmi_response_type_v01 resp;
 406 };
 407
 408 #define WLFW_CAL_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
 409 extern struct qmi_elem_info wlfw_cal_download_resp_msg_v01_ei[];
 410
 411 struct wlfw_initiate_cal_update_ind_msg_v01 {
 412         enum wlfw_cal_temp_id_enum_v01 cal_id;
 413         u32 total_size;
 414 };
 415
 416 #define WLFW_INITIATE_CAL_UPDATE_IND_MSG_V01_MAX_MSG_LEN 14
 417 extern struct qmi_elem_info wlfw_initiate_cal_update_ind_msg_v01_ei[];
 418
 419 struct wlfw_cal_update_req_msg_v01 {
 420         enum wlfw_cal_temp_id_enum_v01 cal_id;
 421         u32 seg_id;
 422 };
 423
 424 #define WLFW_CAL_UPDATE_REQ_MSG_V01_MAX_MSG_LEN 14
 425 extern struct qmi_elem_info wlfw_cal_update_req_msg_v01_ei[];
 426
 427 struct wlfw_cal_update_resp_msg_v01 {
 428         struct qmi_response_type_v01 resp;
 429         u8 file_id_valid;
 430         enum wlfw_cal_temp_id_enum_v01 file_id;
 431         u8 total_size_valid;
 432         u32 total_size;
 433         u8 seg_id_valid;
 434         u32 seg_id;
 435         u8 data_valid;
 436         u32 data_len;
 437         u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
 438         u8 end_valid;
 439         u8 end;
 440 };
 441
 442 #define WLFW_CAL_UPDATE_RESP_MSG_V01_MAX_MSG_LEN 6181
 443 extern struct qmi_elem_info wlfw_cal_update_resp_msg_v01_ei[];
 444
 445 struct wlfw_msa_info_req_msg_v01 {
 446         u64 msa_addr;
 447         u32 size;
 448 };
 449
 450 #define WLFW_MSA_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
 451 extern struct qmi_elem_info wlfw_msa_info_req_msg_v01_ei[];
 452
 453 struct wlfw_msa_info_resp_msg_v01 {
 454         struct qmi_response_type_v01 resp;
 455         u32 mem_region_info_len;
 456         struct wlfw_memory_region_info_s_v01 mem_region_info[QMI_WLFW_MAX_MEM_REG_V01];
 457 };
 458
 459 #define WLFW_MSA_INFO_RESP_MSG_V01_MAX_MSG_LEN 37
 460 extern struct qmi_elem_info wlfw_msa_info_resp_msg_v01_ei[];
 461
 462 struct wlfw_msa_ready_req_msg_v01 {
 463         char placeholder;
 464 };
 465
 466 #define WLFW_MSA_READY_REQ_MSG_V01_MAX_MSG_LEN 0
 467 extern struct qmi_elem_info wlfw_msa_ready_req_msg_v01_ei[];
 468
 469 struct wlfw_msa_ready_resp_msg_v01 {
 470         struct qmi_response_type_v01 resp;
 471 };
 472
 473 #define WLFW_MSA_READY_RESP_MSG_V01_MAX_MSG_LEN 7
 474 extern struct qmi_elem_info wlfw_msa_ready_resp_msg_v01_ei[];
 475
 476 struct wlfw_ini_req_msg_v01 {
 477         u8 enablefwlog_valid;
 478         u8 enablefwlog;
 479 };
 480
 481 #define WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN 4
 482 extern struct qmi_elem_info wlfw_ini_req_msg_v01_ei[];
 483
 484 struct wlfw_ini_resp_msg_v01 {
 485         struct qmi_response_type_v01 resp;
 486 };
 487
 488 #define WLFW_INI_RESP_MSG_V01_MAX_MSG_LEN 7
 489 extern struct qmi_elem_info wlfw_ini_resp_msg_v01_ei[];
 490
 491 struct wlfw_athdiag_read_req_msg_v01 {
 492         u32 offset;
 493         u32 mem_type;
 494         u32 data_len;
 495 };
 496
 497 #define WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN 21
 498 extern struct qmi_elem_info wlfw_athdiag_read_req_msg_v01_ei[];
 499
 500 struct wlfw_athdiag_read_resp_msg_v01 {
 501         struct qmi_response_type_v01 resp;
 502         u8 data_valid;
 503         u32 data_len;
 504         u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
 505 };
 506
 507 #define WLFW_ATHDIAG_READ_RESP_MSG_V01_MAX_MSG_LEN 6156
 508 extern struct qmi_elem_info wlfw_athdiag_read_resp_msg_v01_ei[];
 509
 510 struct wlfw_athdiag_write_req_msg_v01 {
 511         u32 offset;
 512         u32 mem_type;
 513         u32 data_len;
 514         u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
 515 };
 516
 517 #define WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN 6163
 518 extern struct qmi_elem_info wlfw_athdiag_write_req_msg_v01_ei[];
 519
 520 struct wlfw_athdiag_write_resp_msg_v01 {
 521         struct qmi_response_type_v01 resp;
 522 };
 523
 524 #define WLFW_ATHDIAG_WRITE_RESP_MSG_V01_MAX_MSG_LEN 7
 525 extern struct qmi_elem_info wlfw_athdiag_write_resp_msg_v01_ei[];
 526
 527 struct wlfw_vbatt_req_msg_v01 {
 528         u64 voltage_uv;
 529 };
 530
 531 #define WLFW_VBATT_REQ_MSG_V01_MAX_MSG_LEN 11
 532 extern struct qmi_elem_info wlfw_vbatt_req_msg_v01_ei[];
 533
 534 struct wlfw_vbatt_resp_msg_v01 {
 535         struct qmi_response_type_v01 resp;
 536 };
 537
 538 #define WLFW_VBATT_RESP_MSG_V01_MAX_MSG_LEN 7
 539 extern struct qmi_elem_info wlfw_vbatt_resp_msg_v01_ei[];
 540
 541 struct wlfw_mac_addr_req_msg_v01 {
 542         u8 mac_addr_valid;
 543         u8 mac_addr[QMI_WLFW_MAC_ADDR_SIZE_V01];
 544 };
 545
 546 #define WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN 9
 547 extern struct qmi_elem_info wlfw_mac_addr_req_msg_v01_ei[];
 548
 549 struct wlfw_mac_addr_resp_msg_v01 {
 550         struct qmi_response_type_v01 resp;
 551 };
 552
 553 #define WLFW_MAC_ADDR_RESP_MSG_V01_MAX_MSG_LEN 7
 554 extern struct qmi_elem_info wlfw_mac_addr_resp_msg_v01_ei[];
 555
 556 struct wlfw_host_cap_req_msg_v01 {
 557         u8 daemon_support_valid;
 558         u8 daemon_support;
 559 };
 560
 561 #define WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN 4
 562 extern struct qmi_elem_info wlfw_host_cap_req_msg_v01_ei[];
 563
 564 struct wlfw_host_cap_resp_msg_v01 {
 565         struct qmi_response_type_v01 resp;
 566 };
 567
 568 #define WLFW_HOST_CAP_RESP_MSG_V01_MAX_MSG_LEN 7
 569 extern struct qmi_elem_info wlfw_host_cap_resp_msg_v01_ei[];
 570
 571 struct wlfw_request_mem_ind_msg_v01 {
 572         u32 mem_seg_len;
 573         struct wlfw_mem_seg_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
 574 };
 575
 576 #define WLFW_REQUEST_MEM_IND_MSG_V01_MAX_MSG_LEN 564
 577 extern struct qmi_elem_info wlfw_request_mem_ind_msg_v01_ei[];
 578
 579 struct wlfw_respond_mem_req_msg_v01 {
 580         u32 mem_seg_len;
 581         struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
 582 };
 583
 584 #define WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN 260
 585 extern struct qmi_elem_info wlfw_respond_mem_req_msg_v01_ei[];
 586
 587 struct wlfw_respond_mem_resp_msg_v01 {
 588         struct qmi_response_type_v01 resp;
 589 };
 590
 591 #define WLFW_RESPOND_MEM_RESP_MSG_V01_MAX_MSG_LEN 7
 592 extern struct qmi_elem_info wlfw_respond_mem_resp_msg_v01_ei[];
 593
 594 struct wlfw_mem_ready_ind_msg_v01 {
 595         char placeholder;
 596 };
 597
 598 #define WLFW_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0
 599 extern struct qmi_elem_info wlfw_mem_ready_ind_msg_v01_ei[];
 600
 601 struct wlfw_fw_init_done_ind_msg_v01 {
 602         char placeholder;
 603 };
 604
 605 #define WLFW_FW_INIT_DONE_IND_MSG_V01_MAX_MSG_LEN 0
 606 extern struct qmi_elem_info wlfw_fw_init_done_ind_msg_v01_ei[];
 607
 608 struct wlfw_rejuvenate_ind_msg_v01 {
 609         u8 cause_for_rejuvenation_valid;
 610         u8 cause_for_rejuvenation;
 611         u8 requesting_sub_system_valid;
 612         u8 requesting_sub_system;
 613         u8 line_number_valid;
 614         u16 line_number;
 615         u8 function_name_valid;
 616         char function_name[QMI_WLFW_FUNCTION_NAME_LEN_V01 + 1];
 617 };
 618
 619 #define WLFW_REJUVENATE_IND_MSG_V01_MAX_MSG_LEN 144
 620 extern struct qmi_elem_info wlfw_rejuvenate_ind_msg_v01_ei[];
 621
 622 struct wlfw_rejuvenate_ack_req_msg_v01 {
 623         char placeholder;
 624 };
 625
 626 #define WLFW_REJUVENATE_ACK_REQ_MSG_V01_MAX_MSG_LEN 0
 627 extern struct qmi_elem_info wlfw_rejuvenate_ack_req_msg_v01_ei[];
 628
 629 struct wlfw_rejuvenate_ack_resp_msg_v01 {
 630         struct qmi_response_type_v01 resp;
 631 };
 632
 633 #define WLFW_REJUVENATE_ACK_RESP_MSG_V01_MAX_MSG_LEN 7
 634 extern struct qmi_elem_info wlfw_rejuvenate_ack_resp_msg_v01_ei[];
 635
 636 struct wlfw_dynamic_feature_mask_req_msg_v01 {
 637         u8 mask_valid;
 638         u64 mask;
 639 };
 640
 641 #define WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN 11
 642 extern struct qmi_elem_info wlfw_dynamic_feature_mask_req_msg_v01_ei[];
 643
 644 struct wlfw_dynamic_feature_mask_resp_msg_v01 {
 645         struct qmi_response_type_v01 resp;
 646         u8 prev_mask_valid;
 647         u64 prev_mask;
 648         u8 curr_mask_valid;
 649         u64 curr_mask;
 650 };
 651
 652 #define WLFW_DYNAMIC_FEATURE_MASK_RESP_MSG_V01_MAX_MSG_LEN 29
 653 extern struct qmi_elem_info wlfw_dynamic_feature_mask_resp_msg_v01_ei[];
 654
 655 struct wlfw_m3_info_req_msg_v01 {
 656         u64 addr;
 657         u32 size;
 658 };
 659
 660 #define WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
 661 extern struct qmi_elem_info wlfw_m3_info_req_msg_v01_ei[];
 662
 663 struct wlfw_m3_info_resp_msg_v01 {
 664         struct qmi_response_type_v01 resp;
 665 };
 666
 667 #define WLFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7
 668 extern struct qmi_elem_info wlfw_m3_info_resp_msg_v01_ei[];
 669
 670 struct wlfw_xo_cal_ind_msg_v01 {
 671         u8 xo_cal_data;
 672 };
 673
 674 #define WLFW_XO_CAL_IND_MSG_V01_MAX_MSG_LEN 4
 675 extern struct qmi_elem_info wlfw_xo_cal_ind_msg_v01_ei[];
 676
 677 #endif