perf tools: Don't clone maps from parent when synthesizing forks
[linux/fpc-iii.git] / drivers / nvme / host / nvme.h
blobcee79cb388aff0304909b99bd9f81523ba0da1ba
1 /*
2 * Copyright (c) 2011-2014, Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
14 #ifndef _NVME_H
15 #define _NVME_H
17 #include <linux/nvme.h>
18 #include <linux/cdev.h>
19 #include <linux/pci.h>
20 #include <linux/kref.h>
21 #include <linux/blk-mq.h>
22 #include <linux/lightnvm.h>
23 #include <linux/sed-opal.h>
24 #include <linux/fault-inject.h>
25 #include <linux/rcupdate.h>
27 extern unsigned int nvme_io_timeout;
28 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
30 extern unsigned int admin_timeout;
31 #define ADMIN_TIMEOUT (admin_timeout * HZ)
33 #define NVME_DEFAULT_KATO 5
34 #define NVME_KATO_GRACE 10
36 extern struct workqueue_struct *nvme_wq;
37 extern struct workqueue_struct *nvme_reset_wq;
38 extern struct workqueue_struct *nvme_delete_wq;
40 enum {
41 NVME_NS_LBA = 0,
42 NVME_NS_LIGHTNVM = 1,
46 * List of workarounds for devices that required behavior not specified in
47 * the standard.
49 enum nvme_quirks {
51 * Prefers I/O aligned to a stripe size specified in a vendor
52 * specific Identify field.
54 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
57 * The controller doesn't handle Identify value others than 0 or 1
58 * correctly.
60 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
63 * The controller deterministically returns O's on reads to
64 * logical blocks that deallocate was called on.
66 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
69 * The controller needs a delay before starts checking the device
70 * readiness, which is done by reading the NVME_CSTS_RDY bit.
72 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
75 * APST should not be used.
77 NVME_QUIRK_NO_APST = (1 << 4),
80 * The deepest sleep state should not be used.
82 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
85 * Supports the LighNVM command set if indicated in vs[1].
87 NVME_QUIRK_LIGHTNVM = (1 << 6),
90 * Set MEDIUM priority on SQ creation
92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
96 * Common request structure for NVMe passthrough. All drivers must have
97 * this structure as the first member of their request-private data.
99 struct nvme_request {
100 struct nvme_command *cmd;
101 union nvme_result result;
102 u8 retries;
103 u8 flags;
104 u16 status;
105 struct nvme_ctrl *ctrl;
109 * Mark a bio as coming in through the mpath node.
111 #define REQ_NVME_MPATH REQ_DRV
113 enum {
114 NVME_REQ_CANCELLED = (1 << 0),
115 NVME_REQ_USERCMD = (1 << 1),
118 static inline struct nvme_request *nvme_req(struct request *req)
120 return blk_mq_rq_to_pdu(req);
123 static inline u16 nvme_req_qid(struct request *req)
125 if (!req->rq_disk)
126 return 0;
127 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
130 /* The below value is the specific amount of delay needed before checking
131 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
132 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
133 * found empirically.
135 #define NVME_QUIRK_DELAY_AMOUNT 2300
137 enum nvme_ctrl_state {
138 NVME_CTRL_NEW,
139 NVME_CTRL_LIVE,
140 NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */
141 NVME_CTRL_RESETTING,
142 NVME_CTRL_CONNECTING,
143 NVME_CTRL_DELETING,
144 NVME_CTRL_DEAD,
147 struct nvme_ctrl {
148 enum nvme_ctrl_state state;
149 bool identified;
150 spinlock_t lock;
151 const struct nvme_ctrl_ops *ops;
152 struct request_queue *admin_q;
153 struct request_queue *connect_q;
154 struct device *dev;
155 int instance;
156 struct blk_mq_tag_set *tagset;
157 struct blk_mq_tag_set *admin_tagset;
158 struct list_head namespaces;
159 struct rw_semaphore namespaces_rwsem;
160 struct device ctrl_device;
161 struct device *device; /* char device */
162 struct cdev cdev;
163 struct work_struct reset_work;
164 struct work_struct delete_work;
166 struct nvme_subsystem *subsys;
167 struct list_head subsys_entry;
169 struct opal_dev *opal_dev;
171 char name[12];
172 u16 cntlid;
174 u32 ctrl_config;
175 u16 mtfa;
176 u32 queue_count;
178 u64 cap;
179 u32 page_size;
180 u32 max_hw_sectors;
181 u32 max_segments;
182 u16 oncs;
183 u16 oacs;
184 u16 nssa;
185 u16 nr_streams;
186 u32 max_namespaces;
187 atomic_t abort_limit;
188 u8 vwc;
189 u32 vs;
190 u32 sgls;
191 u16 kas;
192 u8 npss;
193 u8 apsta;
194 u32 oaes;
195 u32 aen_result;
196 unsigned int shutdown_timeout;
197 unsigned int kato;
198 bool subsystem;
199 unsigned long quirks;
200 struct nvme_id_power_state psd[32];
201 struct nvme_effects_log *effects;
202 struct work_struct scan_work;
203 struct work_struct async_event_work;
204 struct delayed_work ka_work;
205 struct nvme_command ka_cmd;
206 struct work_struct fw_act_work;
207 unsigned long events;
209 #ifdef CONFIG_NVME_MULTIPATH
210 /* asymmetric namespace access: */
211 u8 anacap;
212 u8 anatt;
213 u32 anagrpmax;
214 u32 nanagrpid;
215 struct mutex ana_lock;
216 struct nvme_ana_rsp_hdr *ana_log_buf;
217 size_t ana_log_size;
218 struct timer_list anatt_timer;
219 struct work_struct ana_work;
220 #endif
222 /* Power saving configuration */
223 u64 ps_max_latency_us;
224 bool apst_enabled;
226 /* PCIe only: */
227 u32 hmpre;
228 u32 hmmin;
229 u32 hmminds;
230 u16 hmmaxd;
232 /* Fabrics only */
233 u16 sqsize;
234 u32 ioccsz;
235 u32 iorcsz;
236 u16 icdoff;
237 u16 maxcmd;
238 int nr_reconnects;
239 struct nvmf_ctrl_options *opts;
242 struct nvme_subsystem {
243 int instance;
244 struct device dev;
246 * Because we unregister the device on the last put we need
247 * a separate refcount.
249 struct kref ref;
250 struct list_head entry;
251 struct mutex lock;
252 struct list_head ctrls;
253 struct list_head nsheads;
254 char subnqn[NVMF_NQN_SIZE];
255 char serial[20];
256 char model[40];
257 char firmware_rev[8];
258 u8 cmic;
259 u16 vendor_id;
260 struct ida ns_ida;
264 * Container structure for uniqueue namespace identifiers.
266 struct nvme_ns_ids {
267 u8 eui64[8];
268 u8 nguid[16];
269 uuid_t uuid;
273 * Anchor structure for namespaces. There is one for each namespace in a
274 * NVMe subsystem that any of our controllers can see, and the namespace
275 * structure for each controller is chained of it. For private namespaces
276 * there is a 1:1 relation to our namespace structures, that is ->list
277 * only ever has a single entry for private namespaces.
279 struct nvme_ns_head {
280 struct list_head list;
281 struct srcu_struct srcu;
282 struct nvme_subsystem *subsys;
283 unsigned ns_id;
284 struct nvme_ns_ids ids;
285 struct list_head entry;
286 struct kref ref;
287 int instance;
288 #ifdef CONFIG_NVME_MULTIPATH
289 struct gendisk *disk;
290 struct bio_list requeue_list;
291 spinlock_t requeue_lock;
292 struct work_struct requeue_work;
293 struct mutex lock;
294 struct nvme_ns __rcu *current_path[];
295 #endif
298 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
299 struct nvme_fault_inject {
300 struct fault_attr attr;
301 struct dentry *parent;
302 bool dont_retry; /* DNR, do not retry */
303 u16 status; /* status code */
305 #endif
307 struct nvme_ns {
308 struct list_head list;
310 struct nvme_ctrl *ctrl;
311 struct request_queue *queue;
312 struct gendisk *disk;
313 #ifdef CONFIG_NVME_MULTIPATH
314 enum nvme_ana_state ana_state;
315 u32 ana_grpid;
316 #endif
317 struct list_head siblings;
318 struct nvm_dev *ndev;
319 struct kref kref;
320 struct nvme_ns_head *head;
322 int lba_shift;
323 u16 ms;
324 u16 sgs;
325 u32 sws;
326 bool ext;
327 u8 pi_type;
328 unsigned long flags;
329 #define NVME_NS_REMOVING 0
330 #define NVME_NS_DEAD 1
331 #define NVME_NS_ANA_PENDING 2
332 u16 noiob;
334 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
335 struct nvme_fault_inject fault_inject;
336 #endif
340 struct nvme_ctrl_ops {
341 const char *name;
342 struct module *module;
343 unsigned int flags;
344 #define NVME_F_FABRICS (1 << 0)
345 #define NVME_F_METADATA_SUPPORTED (1 << 1)
346 #define NVME_F_PCI_P2PDMA (1 << 2)
347 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
348 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
349 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
350 void (*free_ctrl)(struct nvme_ctrl *ctrl);
351 void (*submit_async_event)(struct nvme_ctrl *ctrl);
352 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
353 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
354 void (*stop_ctrl)(struct nvme_ctrl *ctrl);
357 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
358 void nvme_fault_inject_init(struct nvme_ns *ns);
359 void nvme_fault_inject_fini(struct nvme_ns *ns);
360 void nvme_should_fail(struct request *req);
361 #else
362 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
363 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
364 static inline void nvme_should_fail(struct request *req) {}
365 #endif
367 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
369 u32 val = 0;
371 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
372 return false;
373 return val & NVME_CSTS_RDY;
376 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
378 if (!ctrl->subsystem)
379 return -ENOTTY;
380 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
383 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
385 return (sector >> (ns->lba_shift - 9));
388 static inline void nvme_end_request(struct request *req, __le16 status,
389 union nvme_result result)
391 struct nvme_request *rq = nvme_req(req);
393 rq->status = le16_to_cpu(status) >> 1;
394 rq->result = result;
395 /* inject error when permitted by fault injection framework */
396 nvme_should_fail(req);
397 blk_mq_complete_request(req);
400 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
402 get_device(ctrl->device);
405 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
407 put_device(ctrl->device);
410 void nvme_complete_rq(struct request *req);
411 void nvme_cancel_request(struct request *req, void *data, bool reserved);
412 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
413 enum nvme_ctrl_state new_state);
414 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
415 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
416 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
417 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
418 const struct nvme_ctrl_ops *ops, unsigned long quirks);
419 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
420 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
421 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
422 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
423 int nvme_init_identify(struct nvme_ctrl *ctrl);
425 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
427 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
428 bool send);
430 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
431 volatile union nvme_result *res);
433 void nvme_stop_queues(struct nvme_ctrl *ctrl);
434 void nvme_start_queues(struct nvme_ctrl *ctrl);
435 void nvme_kill_queues(struct nvme_ctrl *ctrl);
436 void nvme_unfreeze(struct nvme_ctrl *ctrl);
437 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
438 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
439 void nvme_start_freeze(struct nvme_ctrl *ctrl);
441 #define NVME_QID_ANY -1
442 struct request *nvme_alloc_request(struct request_queue *q,
443 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
444 void nvme_cleanup_cmd(struct request *req);
445 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
446 struct nvme_command *cmd);
447 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
448 void *buf, unsigned bufflen);
449 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
450 union nvme_result *result, void *buffer, unsigned bufflen,
451 unsigned timeout, int qid, int at_head,
452 blk_mq_req_flags_t flags);
453 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
454 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
455 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
456 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
457 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
458 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
460 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
461 void *log, size_t size, u64 offset);
463 extern const struct attribute_group *nvme_ns_id_attr_groups[];
464 extern const struct block_device_operations nvme_ns_head_ops;
466 #ifdef CONFIG_NVME_MULTIPATH
467 bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl);
468 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
469 struct nvme_ctrl *ctrl, int *flags);
470 void nvme_failover_req(struct request *req);
471 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
472 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
473 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
474 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
475 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
476 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
477 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
478 void nvme_mpath_clear_current_path(struct nvme_ns *ns);
479 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
481 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
483 struct nvme_ns_head *head = ns->head;
485 if (head->disk && list_empty(&head->list))
486 kblockd_schedule_work(&head->requeue_work);
489 extern struct device_attribute dev_attr_ana_grpid;
490 extern struct device_attribute dev_attr_ana_state;
492 #else
493 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
495 return false;
498 * Without the multipath code enabled, multiple controller per subsystems are
499 * visible as devices and thus we cannot use the subsystem instance.
501 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
502 struct nvme_ctrl *ctrl, int *flags)
504 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
507 static inline void nvme_failover_req(struct request *req)
510 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
513 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
514 struct nvme_ns_head *head)
516 return 0;
518 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
519 struct nvme_id_ns *id)
522 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
525 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
528 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
531 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
532 struct nvme_id_ctrl *id)
534 return 0;
536 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
539 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
542 #endif /* CONFIG_NVME_MULTIPATH */
544 #ifdef CONFIG_NVM
545 void nvme_nvm_update_nvm_info(struct nvme_ns *ns);
546 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
547 void nvme_nvm_unregister(struct nvme_ns *ns);
548 extern const struct attribute_group nvme_nvm_attr_group;
549 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
550 #else
551 static inline void nvme_nvm_update_nvm_info(struct nvme_ns *ns) {};
552 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
553 int node)
555 return 0;
558 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
559 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
560 unsigned long arg)
562 return -ENOTTY;
564 #endif /* CONFIG_NVM */
566 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
568 return dev_to_disk(dev)->private_data;
571 int __init nvme_core_init(void);
572 void nvme_core_exit(void);
574 #endif /* _NVME_H */