2 * Copyright (C) 2012 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/init.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/clockchips.h>
19 #include <linux/types.h>
20 #include <linux/clk.h>
23 #include <asm/mach/time.h>
26 #include <linux/of_address.h>
27 #include <linux/of_irq.h>
30 #define KONA_GPTIMER_STCS_OFFSET 0x00000000
31 #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
32 #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
33 #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
35 #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
36 #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
38 struct kona_bcm_timers
{
40 void __iomem
*tmr_regs
;
43 static struct kona_bcm_timers timers
;
45 static u32 arch_timer_rate
;
48 * We use the peripheral timers for system tick, the cpu global timer for
51 static void kona_timer_disable_and_clear(void __iomem
*base
)
56 * clear and disable interrupts
57 * We are using compare/match register 0 for our system interrupts
59 reg
= readl(base
+ KONA_GPTIMER_STCS_OFFSET
);
61 /* Clear compare (0) interrupt */
62 reg
|= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT
;
64 reg
&= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT
);
66 writel(reg
, base
+ KONA_GPTIMER_STCS_OFFSET
);
71 kona_timer_get_counter(void __iomem
*timer_base
, uint32_t *msw
, uint32_t *lsw
)
76 * Read 64-bit free running counter
79 * 3. Read hi-word again
81 * if new hi-word is not equal to previously read hi-word, then
84 * if new hi-word is equal to previously read hi-word then stop.
87 while (--loop_limit
) {
88 *msw
= readl(timer_base
+ KONA_GPTIMER_STCHI_OFFSET
);
89 *lsw
= readl(timer_base
+ KONA_GPTIMER_STCLO_OFFSET
);
90 if (*msw
== readl(timer_base
+ KONA_GPTIMER_STCHI_OFFSET
))
94 pr_err("bcm_kona_timer: getting counter failed.\n");
95 pr_err(" Timer will be impacted\n");
101 static int kona_timer_set_next_event(unsigned long clc
,
102 struct clock_event_device
*unused
)
105 * timer (0) is disabled by the timer interrupt already
106 * so, here we reload the next event value and re-enable
109 * This way, we are potentially losing the time between
110 * timer-interrupt->set_next_event. CPU local timers, when
111 * they come in should get rid of skew.
117 kona_timer_get_counter(timers
.tmr_regs
, &msw
, &lsw
);
119 /* Load the "next" event tick value */
120 writel(lsw
+ clc
, timers
.tmr_regs
+ KONA_GPTIMER_STCM0_OFFSET
);
123 reg
= readl(timers
.tmr_regs
+ KONA_GPTIMER_STCS_OFFSET
);
124 reg
|= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT
);
125 writel(reg
, timers
.tmr_regs
+ KONA_GPTIMER_STCS_OFFSET
);
130 static int kona_timer_shutdown(struct clock_event_device
*evt
)
132 kona_timer_disable_and_clear(timers
.tmr_regs
);
136 static struct clock_event_device kona_clockevent_timer
= {
138 .features
= CLOCK_EVT_FEAT_ONESHOT
,
139 .set_next_event
= kona_timer_set_next_event
,
140 .set_state_shutdown
= kona_timer_shutdown
,
141 .tick_resume
= kona_timer_shutdown
,
144 static void __init
kona_timer_clockevents_init(void)
146 kona_clockevent_timer
.cpumask
= cpumask_of(0);
147 clockevents_config_and_register(&kona_clockevent_timer
,
148 arch_timer_rate
, 6, 0xffffffff);
151 static irqreturn_t
kona_timer_interrupt(int irq
, void *dev_id
)
153 struct clock_event_device
*evt
= &kona_clockevent_timer
;
155 kona_timer_disable_and_clear(timers
.tmr_regs
);
156 evt
->event_handler(evt
);
160 static struct irqaction kona_timer_irq
= {
161 .name
= "Kona Timer Tick",
163 .handler
= kona_timer_interrupt
,
166 static void __init
kona_timer_init(struct device_node
*node
)
169 struct clk
*external_clk
;
171 if (!of_device_is_available(node
)) {
172 pr_info("Kona Timer v1 marked as disabled in device tree\n");
176 external_clk
= of_clk_get_by_name(node
, NULL
);
178 if (!IS_ERR(external_clk
)) {
179 arch_timer_rate
= clk_get_rate(external_clk
);
180 clk_prepare_enable(external_clk
);
181 } else if (!of_property_read_u32(node
, "clock-frequency", &freq
)) {
182 arch_timer_rate
= freq
;
184 pr_err("Kona Timer v1 unable to determine clock-frequency");
188 /* Setup IRQ numbers */
189 timers
.tmr_irq
= irq_of_parse_and_map(node
, 0);
191 /* Setup IO addresses */
192 timers
.tmr_regs
= of_iomap(node
, 0);
194 kona_timer_disable_and_clear(timers
.tmr_regs
);
196 kona_timer_clockevents_init();
197 setup_irq(timers
.tmr_irq
, &kona_timer_irq
);
198 kona_timer_set_next_event((arch_timer_rate
/ HZ
), NULL
);
201 CLOCKSOURCE_OF_DECLARE(brcm_kona
, "brcm,kona-timer", kona_timer_init
);
203 * bcm,kona-timer is deprecated by brcm,kona-timer
204 * being kept here for driver compatibility
206 CLOCKSOURCE_OF_DECLARE(bcm_kona
, "bcm,kona-timer", kona_timer_init
);