drivers/pcmcia/soc_common.h

   1 /*
   2  * linux/drivers/pcmcia/soc_common.h
   3  *
   4  * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
   5  *
   6  * This file contains definitions for the PCMCIA support code common to
   7  * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
   8  */
   9 #ifndef _ASM_ARCH_PCMCIA
  10 #define _ASM_ARCH_PCMCIA
  11
  12 /* include the world */
  13 #include <linux/clk.h>
  14 #include <linux/cpufreq.h>
  15 #include <pcmcia/ss.h>
  16 #include <pcmcia/cistpl.h>
  17
  18
  19 struct device;
  20 struct pcmcia_low_level;
  21
  22 /*
  23  * This structure encapsulates per-socket state which we might need to
  24  * use when responding to a Card Services query of some kind.
  25  */
  26 struct soc_pcmcia_socket {
  27         struct pcmcia_socket    socket;
  28
  29         /*
  30          * Info from low level handler
  31          */
  32         unsigned int            nr;
  33         struct clk              *clk;
  34
  35         /*
  36          * Core PCMCIA state
  37          */
  38         const struct pcmcia_low_level *ops;
  39
  40         unsigned int            status;
  41         socket_state_t          cs_state;
  42
  43         unsigned short          spd_io[MAX_IO_WIN];
  44         unsigned short          spd_mem[MAX_WIN];
  45         unsigned short          spd_attr[MAX_WIN];
  46
  47         struct resource         res_skt;
  48         struct resource         res_io;
  49         struct resource         res_mem;
  50         struct resource         res_attr;
  51         void __iomem            *virt_io;
  52
  53         struct {
  54                 int             gpio;
  55                 unsigned int    irq;
  56                 const char      *name;
  57         } stat[4];
  58 #define SOC_STAT_CD             0       /* Card detect */
  59 #define SOC_STAT_BVD1           1       /* BATDEAD / IOSTSCHG */
  60 #define SOC_STAT_BVD2           2       /* BATWARN / IOSPKR */
  61 #define SOC_STAT_RDY            3       /* Ready / Interrupt */
  62
  63         unsigned int            irq_state;
  64
  65         struct timer_list       poll_timer;
  66         struct list_head        node;
  67 };
  68
  69 struct skt_dev_info {
  70         int nskt;
  71         struct soc_pcmcia_socket skt[0];
  72 };
  73
  74 struct pcmcia_state {
  75   unsigned detect: 1,
  76             ready: 1,
  77              bvd1: 1,
  78              bvd2: 1,
  79            wrprot: 1,
  80             vs_3v: 1,
  81             vs_Xv: 1;
  82 };
  83
  84 struct pcmcia_low_level {
  85         struct module *owner;
  86
  87         /* first socket in system */
  88         int first;
  89         /* nr of sockets */
  90         int nr;
  91
  92         int (*hw_init)(struct soc_pcmcia_socket *);
  93         void (*hw_shutdown)(struct soc_pcmcia_socket *);
  94
  95         void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  96         int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  97
  98         /*
  99          * Enable card status IRQs on (re-)initialisation.  This can
 100          * be called at initialisation, power management event, or
 101          * pcmcia event.
 102          */
 103         void (*socket_init)(struct soc_pcmcia_socket *);
 104
 105         /*
 106          * Disable card status IRQs and PCMCIA bus on suspend.
 107          */
 108         void (*socket_suspend)(struct soc_pcmcia_socket *);
 109
 110         /*
 111          * Hardware specific timing routines.
 112          * If provided, the get_timing routine overrides the SOC default.
 113          */
 114         unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
 115         int (*set_timing)(struct soc_pcmcia_socket *);
 116         int (*show_timing)(struct soc_pcmcia_socket *, char *);
 117
 118 #ifdef CONFIG_CPU_FREQ
 119         /*
 120          * CPUFREQ support.
 121          */
 122         int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
 123 #endif
 124 };
 125
 126
 127 struct soc_pcmcia_timing {
 128         unsigned short io;
 129         unsigned short mem;
 130         unsigned short attr;
 131 };
 132
 133 extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
 134
 135 void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
 136         struct pcmcia_low_level *ops, struct device *dev);
 137 void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
 138 int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
 139
 140
 141 #ifdef CONFIG_PCMCIA_DEBUG
 142
 143 extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
 144                              int lvl, const char *fmt, ...);
 145
 146 #define debug(skt, lvl, fmt, arg...) \
 147         soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
 148
 149 #else
 150 #define debug(skt, lvl, fmt, arg...) do { } while (0)
 151 #endif
 152
 153
 154 /*
 155  * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
 156  * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
 157  * a minimum value of 165ns, as well. Section 4.7.2 (describing
 158  * common and attribute memory write timing) says that twWE has a
 159  * minimum value of 150ns for a 250ns cycle time (for 5V operation;
 160  * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
 161  * operation, also section 4.7.4). Section 4.7.3 says that taOE
 162  * has a maximum value of 150ns for a 300ns cycle time (for 5V
 163  * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
 164  *
 165  * When configuring memory maps, Card Services appears to adopt the policy
 166  * that a memory access time of "0" means "use the default." The default
 167  * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
 168  * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
 169  * memory command width time is 300ns.
 170  */
 171 #define SOC_PCMCIA_IO_ACCESS            (165)
 172 #define SOC_PCMCIA_5V_MEM_ACCESS        (150)
 173 #define SOC_PCMCIA_3V_MEM_ACCESS        (300)
 174 #define SOC_PCMCIA_ATTR_MEM_ACCESS      (300)
 175
 176 /*
 177  * The socket driver actually works nicely in interrupt-driven form,
 178  * so the (relatively infrequent) polling is "just to be sure."
 179  */
 180 #define SOC_PCMCIA_POLL_PERIOD    (2*HZ)
 181
 182
 183 /* I/O pins replacing memory pins
 184  * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
 185  *
 186  * These signals change meaning when going from memory-only to
 187  * memory-or-I/O interface:
 188  */
 189 #define iostschg bvd1
 190 #define iospkr   bvd2
 191
 192 #endif