[CPUFREQ] CodingStyle nits in cpufreq_stats.c
[linux/fpc-iii.git] / drivers / pcmcia / sa1100_neponset.c
blob5e34b3e8e5db4acb3e3a3f888e1ce646421403ff
1 /*
2 * linux/drivers/pcmcia/sa1100_neponset.c
4 * Neponset PCMCIA specific routines
5 */
6 #include <linux/module.h>
7 #include <linux/kernel.h>
8 #include <linux/sched.h>
9 #include <linux/device.h>
10 #include <linux/errno.h>
11 #include <linux/init.h>
13 #include <asm/hardware.h>
14 #include <asm/mach-types.h>
15 #include <asm/arch/neponset.h>
16 #include <asm/hardware/sa1111.h>
18 #include "sa1111_generic.h"
21 * Neponset uses the Maxim MAX1600, with the following connections:
23 * MAX1600 Neponset
25 * A0VCC SA-1111 GPIO A<1>
26 * A1VCC SA-1111 GPIO A<0>
27 * A0VPP CPLD NCR A0VPP
28 * A1VPP CPLD NCR A1VPP
29 * B0VCC SA-1111 GPIO A<2>
30 * B1VCC SA-1111 GPIO A<3>
31 * B0VPP ground (slot B is CF)
32 * B1VPP ground (slot B is CF)
34 * VX VCC (5V)
35 * VY VCC3_3 (3.3V)
36 * 12INA 12V
37 * 12INB ground (slot B is CF)
39 * The MAX1600 CODE pin is tied to ground, placing the device in
40 * "Standard Intel code" mode. Refer to the Maxim data sheet for
41 * the corresponding truth table.
44 static int
45 neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
47 unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
48 int ret;
50 switch (skt->nr) {
51 case 0:
52 pa_dwr_mask = GPIO_A0 | GPIO_A1;
53 ncr_mask = NCR_A0VPP | NCR_A1VPP;
55 if (state->Vpp == 0)
56 ncr_set = 0;
57 else if (state->Vpp == 120)
58 ncr_set = NCR_A1VPP;
59 else if (state->Vpp == state->Vcc)
60 ncr_set = NCR_A0VPP;
61 else {
62 printk(KERN_ERR "%s(): unrecognized VPP %u\n",
63 __FUNCTION__, state->Vpp);
64 return -1;
66 break;
68 case 1:
69 pa_dwr_mask = GPIO_A2 | GPIO_A3;
70 ncr_mask = 0;
71 ncr_set = 0;
73 if (state->Vpp != state->Vcc && state->Vpp != 0) {
74 printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
75 __FUNCTION__, state->Vpp);
76 return -1;
78 break;
80 default:
81 return -1;
85 * pa_dwr_set is the mask for selecting Vcc on both sockets.
86 * pa_dwr_mask selects which bits (and therefore socket) we change.
88 switch (state->Vcc) {
89 default:
90 case 0: pa_dwr_set = 0; break;
91 case 33: pa_dwr_set = GPIO_A1|GPIO_A2; break;
92 case 50: pa_dwr_set = GPIO_A0|GPIO_A3; break;
95 ret = sa1111_pcmcia_configure_socket(skt, state);
96 if (ret == 0) {
97 unsigned long flags;
99 local_irq_save(flags);
100 NCR_0 = (NCR_0 & ~ncr_mask) | ncr_set;
102 local_irq_restore(flags);
103 sa1111_set_io(SA1111_DEV(skt->dev), pa_dwr_mask, pa_dwr_set);
106 return 0;
109 static void neponset_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
111 if (skt->nr == 0)
112 NCR_0 &= ~(NCR_A0VPP | NCR_A1VPP);
114 sa1111_pcmcia_socket_init(skt);
117 static struct pcmcia_low_level neponset_pcmcia_ops = {
118 .owner = THIS_MODULE,
119 .hw_init = sa1111_pcmcia_hw_init,
120 .hw_shutdown = sa1111_pcmcia_hw_shutdown,
121 .socket_state = sa1111_pcmcia_socket_state,
122 .configure_socket = neponset_pcmcia_configure_socket,
123 .socket_init = neponset_pcmcia_socket_init,
124 .socket_suspend = sa1111_pcmcia_socket_suspend,
127 int __init pcmcia_neponset_init(struct sa1111_dev *sadev)
129 int ret = -ENODEV;
131 if (machine_is_assabet()) {
133 * Set GPIO_A<3:0> to be outputs for the MAX1600,
134 * and switch to standby mode.
136 sa1111_set_io_dir(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
137 sa1111_set_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
138 sa1111_set_sleep_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
139 ret = sa11xx_drv_pcmcia_probe(&sadev->dev, &neponset_pcmcia_ops, 0, 2);
142 return ret;