tools/perf/pmu-events/arch/x86/amdzen1/branch.json

   1 [
   2   {
   3     "EventName": "bp_l1_btb_correct",
   4     "EventCode": "0x8a",
   5     "BriefDescription": "L1 BTB Correction."
   6   },
   7   {
   8     "EventName": "bp_l2_btb_correct",
   9     "EventCode": "0x8b",
  10     "BriefDescription": "L2 BTB Correction."
  11   },
  12   {
  13     "EventName": "bp_dyn_ind_pred",
  14     "EventCode": "0x8e",
  15     "BriefDescription": "Dynamic Indirect Predictions.",
  16     "PublicDescription": "Indirect Branch Prediction for potential multi-target branch (speculative)."
  17   },
  18   {
  19     "EventName": "bp_de_redirect",
  20     "EventCode": "0x91",
  21     "BriefDescription": "Decoder Overrides Existing Branch Prediction (speculative)."
  22   },
  23   {
  24     "EventName": "bp_l1_tlb_fetch_hit",
  25     "EventCode": "0x94",
  26     "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB."
  27   }
  28 ]