drivers/gpu/drm/i915/i915_pmu.h

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2017-2018 Intel Corporation
   5  */
   6
   7 #ifndef __I915_PMU_H__
   8 #define __I915_PMU_H__
   9
  10 #include <linux/hrtimer.h>
  11 #include <linux/perf_event.h>
  12 #include <linux/spinlock_types.h>
  13 #include <drm/i915_drm.h>
  14
  15 struct drm_i915_private;
  16
  17 enum {
  18         __I915_SAMPLE_FREQ_ACT = 0,
  19         __I915_SAMPLE_FREQ_REQ,
  20         __I915_SAMPLE_RC6,
  21         __I915_SAMPLE_RC6_ESTIMATED,
  22         __I915_NUM_PMU_SAMPLERS
  23 };
  24
  25 /**
  26  * How many different events we track in the global PMU mask.
  27  *
  28  * It is also used to know to needed number of event reference counters.
  29  */
  30 #define I915_PMU_MASK_BITS \
  31         ((1 << I915_PMU_SAMPLE_BITS) + \
  32          (I915_PMU_LAST + 1 - __I915_PMU_OTHER(0)))
  33
  34 struct i915_pmu_sample {
  35         u64 cur;
  36 };
  37
  38 struct i915_pmu {
  39         /**
  40          * @node: List node for CPU hotplug handling.
  41          */
  42         struct hlist_node node;
  43         /**
  44          * @base: PMU base.
  45          */
  46         struct pmu base;
  47         /**
  48          * @lock: Lock protecting enable mask and ref count handling.
  49          */
  50         spinlock_t lock;
  51         /**
  52          * @timer: Timer for internal i915 PMU sampling.
  53          */
  54         struct hrtimer timer;
  55         /**
  56          * @enable: Bitmask of all currently enabled events.
  57          *
  58          * Bits are derived from uAPI event numbers in a way that low 16 bits
  59          * correspond to engine event _sample_ _type_ (I915_SAMPLE_QUEUED is
  60          * bit 0), and higher bits correspond to other events (for instance
  61          * I915_PMU_ACTUAL_FREQUENCY is bit 16 etc).
  62          *
  63          * In other words, low 16 bits are not per engine but per engine
  64          * sampler type, while the upper bits are directly mapped to other
  65          * event types.
  66          */
  67         u64 enable;
  68
  69         /**
  70          * @timer_last:
  71          *
  72          * Timestmap of the previous timer invocation.
  73          */
  74         ktime_t timer_last;
  75
  76         /**
  77          * @enable_count: Reference counts for the enabled events.
  78          *
  79          * Array indices are mapped in the same way as bits in the @enable field
  80          * and they are used to control sampling on/off when multiple clients
  81          * are using the PMU API.
  82          */
  83         unsigned int enable_count[I915_PMU_MASK_BITS];
  84         /**
  85          * @timer_enabled: Should the internal sampling timer be running.
  86          */
  87         bool timer_enabled;
  88         /**
  89          * @sample: Current and previous (raw) counters for sampling events.
  90          *
  91          * These counters are updated from the i915 PMU sampling timer.
  92          *
  93          * Only global counters are held here, while the per-engine ones are in
  94          * struct intel_engine_cs.
  95          */
  96         struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
  97         /**
  98          * @suspended_jiffies_last: Cached suspend time from PM core.
  99          */
 100         unsigned long suspended_jiffies_last;
 101         /**
 102          * @i915_attr: Memory block holding device attributes.
 103          */
 104         void *i915_attr;
 105         /**
 106          * @pmu_attr: Memory block holding device attributes.
 107          */
 108         void *pmu_attr;
 109 };
 110
 111 #ifdef CONFIG_PERF_EVENTS
 112 void i915_pmu_register(struct drm_i915_private *i915);
 113 void i915_pmu_unregister(struct drm_i915_private *i915);
 114 void i915_pmu_gt_parked(struct drm_i915_private *i915);
 115 void i915_pmu_gt_unparked(struct drm_i915_private *i915);
 116 #else
 117 static inline void i915_pmu_register(struct drm_i915_private *i915) {}
 118 static inline void i915_pmu_unregister(struct drm_i915_private *i915) {}
 119 static inline void i915_pmu_gt_parked(struct drm_i915_private *i915) {}
 120 static inline void i915_pmu_gt_unparked(struct drm_i915_private *i915) {}
 121 #endif
 122
 123 #endif