2 * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
3 * Parts of this file were based on sources as follows:
5 * Copyright (C) 2006-2008 Intel Corporation
6 * Copyright (C) 2007 Amos Lee <amos_lee@storlinksemi.com>
7 * Copyright (C) 2007 Dave Airlie <airlied@linux.ie>
8 * Copyright (C) 2011 Texas Instruments
9 * Copyright (C) 2017 Eric Anholt
11 * This program is free software and is provided to you under the terms of the
12 * GNU General Public License version 2 as published by the Free Software
13 * Foundation, and any use by you of this program is subject to the terms of
17 #ifndef _TVE200_DRM_H_
18 #define _TVE200_DRM_H_
20 /* Bits 2-31 are valid physical base addresses */
21 #define TVE200_Y_FRAME_BASE_ADDR 0x00
22 #define TVE200_U_FRAME_BASE_ADDR 0x04
23 #define TVE200_V_FRAME_BASE_ADDR 0x08
25 #define TVE200_INT_EN 0x0C
26 #define TVE200_INT_CLR 0x10
27 #define TVE200_INT_STAT 0x14
28 #define TVE200_INT_BUS_ERR BIT(7)
29 #define TVE200_INT_V_STATUS BIT(6) /* vertical blank */
30 #define TVE200_INT_V_NEXT_FRAME BIT(5)
31 #define TVE200_INT_U_NEXT_FRAME BIT(4)
32 #define TVE200_INT_Y_NEXT_FRAME BIT(3)
33 #define TVE200_INT_V_FIFO_UNDERRUN BIT(2)
34 #define TVE200_INT_U_FIFO_UNDERRUN BIT(1)
35 #define TVE200_INT_Y_FIFO_UNDERRUN BIT(0)
36 #define TVE200_FIFO_UNDERRUNS (TVE200_INT_V_FIFO_UNDERRUN | \
37 TVE200_INT_U_FIFO_UNDERRUN | \
38 TVE200_INT_Y_FIFO_UNDERRUN)
40 #define TVE200_CTRL 0x18
41 #define TVE200_CTRL_YUV420 BIT(31)
42 #define TVE200_CTRL_CSMODE BIT(30)
43 #define TVE200_CTRL_NONINTERLACE BIT(28) /* 0 = non-interlace CCIR656 */
44 #define TVE200_CTRL_TVCLKP BIT(27) /* Inverted clock phase */
45 /* Bits 24..26 define the burst size after arbitration on the bus */
46 #define TVE200_CTRL_BURST_4_WORDS (0 << 24)
47 #define TVE200_CTRL_BURST_8_WORDS (1 << 24)
48 #define TVE200_CTRL_BURST_16_WORDS (2 << 24)
49 #define TVE200_CTRL_BURST_32_WORDS (3 << 24)
50 #define TVE200_CTRL_BURST_64_WORDS (4 << 24)
51 #define TVE200_CTRL_BURST_128_WORDS (5 << 24)
52 #define TVE200_CTRL_BURST_256_WORDS (6 << 24)
53 #define TVE200_CTRL_BURST_0_WORDS (7 << 24) /* ? */
55 * Bits 16..23 is the retry count*16 before issueing a new AHB transfer
58 #define TVE200_CTRL_RETRYCNT_MASK GENMASK(23, 16)
59 #define TVE200_CTRL_RETRYCNT_16 (1 << 16)
60 #define TVE200_CTRL_BBBP BIT(15) /* 0 = little-endian */
61 /* Bits 12..14 define the YCbCr ordering */
62 #define TVE200_CTRL_YCBCRODR_CB0Y0CR0Y1 (0 << 12)
63 #define TVE200_CTRL_YCBCRODR_Y0CB0Y1CR0 (1 << 12)
64 #define TVE200_CTRL_YCBCRODR_CR0Y0CB0Y1 (2 << 12)
65 #define TVE200_CTRL_YCBCRODR_Y1CB0Y0CR0 (3 << 12)
66 #define TVE200_CTRL_YCBCRODR_CR0Y1CB0Y0 (4 << 12)
67 #define TVE200_CTRL_YCBCRODR_Y1CR0Y0CB0 (5 << 12)
68 #define TVE200_CTRL_YCBCRODR_CB0Y1CR0Y0 (6 << 12)
69 #define TVE200_CTRL_YCBCRODR_Y0CR0Y1CB0 (7 << 12)
70 /* Bits 10..11 define the input resolution (framebuffer size) */
71 #define TVE200_CTRL_IPRESOL_CIF (0 << 10)
72 #define TVE200_CTRL_IPRESOL_VGA (1 << 10)
73 #define TVE200_CTRL_IPRESOL_D1 (2 << 10)
74 #define TVE200_CTRL_NTSC BIT(9) /* 0 = PAL, 1 = NTSC */
75 #define TVE200_CTRL_INTERLACE BIT(8) /* 1 = interlace, only for D1 */
76 #define TVE200_IPDMOD_RGB555 (0 << 6) /* TVE200_CTRL_YUV420 = 0 */
77 #define TVE200_IPDMOD_RGB565 (1 << 6)
78 #define TVE200_IPDMOD_RGB888 (2 << 6)
79 #define TVE200_IPDMOD_YUV420 (2 << 6) /* TVE200_CTRL_YUV420 = 1 */
80 #define TVE200_IPDMOD_YUV422 (3 << 6)
81 /* Bits 4 & 5 define when to fire the vblank IRQ */
82 #define TVE200_VSTSTYPE_VSYNC (0 << 4) /* start of vsync */
83 #define TVE200_VSTSTYPE_VBP (1 << 4) /* start of v back porch */
84 #define TVE200_VSTSTYPE_VAI (2 << 4) /* start of v active image */
85 #define TVE200_VSTSTYPE_VFP (3 << 4) /* start of v front porch */
86 #define TVE200_VSTSTYPE_BITS (BIT(4) | BIT(5))
87 #define TVE200_BGR BIT(1) /* 0 = RGB, 1 = BGR */
88 #define TVE200_TVEEN BIT(0) /* Enable TVE block */
90 #define TVE200_CTRL_2 0x1c
91 #define TVE200_CTRL_3 0x20
93 #define TVE200_CTRL_4 0x24
94 #define TVE200_CTRL_4_RESET BIT(0) /* triggers reset of TVE200 */
96 #include <drm/drm_gem.h>
97 #include <drm/drm_simple_kms_helper.h>
99 struct tve200_drm_dev_private
{
100 struct drm_device
*drm
;
102 struct drm_connector
*connector
;
103 struct drm_panel
*panel
;
104 struct drm_bridge
*bridge
;
105 struct drm_simple_display_pipe pipe
;
112 #define to_tve200_connector(x) \
113 container_of(x, struct tve200_drm_connector, connector)
115 int tve200_display_init(struct drm_device
*dev
);
116 irqreturn_t
tve200_irq(int irq
, void *data
);
117 int tve200_connector_init(struct drm_device
*dev
);
118 int tve200_encoder_init(struct drm_device
*dev
);
119 int tve200_dumb_create(struct drm_file
*file_priv
,
120 struct drm_device
*dev
,
121 struct drm_mode_create_dumb
*args
);
123 #endif /* _TVE200_DRM_H_ */