drivers/i2c/busses/i2c-jz4780.c

   1 /*
   2  * Ingenic JZ4780 I2C bus driver
   3  *
   4  * Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc.
   5  * Copyright (C) 2015 Imagination Technologies
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/bitops.h>
  19 #include <linux/clk.h>
  20 #include <linux/completion.h>
  21 #include <linux/delay.h>
  22 #include <linux/errno.h>
  23 #include <linux/i2c.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/sched.h>
  31 #include <linux/slab.h>
  32 #include <linux/time.h>
  33
  34 #define JZ4780_I2C_CTRL         0x00
  35 #define JZ4780_I2C_TAR          0x04
  36 #define JZ4780_I2C_SAR          0x08
  37 #define JZ4780_I2C_DC           0x10
  38 #define JZ4780_I2C_SHCNT        0x14
  39 #define JZ4780_I2C_SLCNT        0x18
  40 #define JZ4780_I2C_FHCNT        0x1C
  41 #define JZ4780_I2C_FLCNT        0x20
  42 #define JZ4780_I2C_INTST        0x2C
  43 #define JZ4780_I2C_INTM         0x30
  44 #define JZ4780_I2C_RXTL         0x38
  45 #define JZ4780_I2C_TXTL         0x3C
  46 #define JZ4780_I2C_CINTR        0x40
  47 #define JZ4780_I2C_CRXUF        0x44
  48 #define JZ4780_I2C_CRXOF        0x48
  49 #define JZ4780_I2C_CTXOF        0x4C
  50 #define JZ4780_I2C_CRXREQ       0x50
  51 #define JZ4780_I2C_CTXABRT      0x54
  52 #define JZ4780_I2C_CRXDONE      0x58
  53 #define JZ4780_I2C_CACT         0x5C
  54 #define JZ4780_I2C_CSTP         0x60
  55 #define JZ4780_I2C_CSTT         0x64
  56 #define JZ4780_I2C_CGC          0x68
  57 #define JZ4780_I2C_ENB          0x6C
  58 #define JZ4780_I2C_STA          0x70
  59 #define JZ4780_I2C_TXABRT       0x80
  60 #define JZ4780_I2C_DMACR        0x88
  61 #define JZ4780_I2C_DMATDLR      0x8C
  62 #define JZ4780_I2C_DMARDLR      0x90
  63 #define JZ4780_I2C_SDASU        0x94
  64 #define JZ4780_I2C_ACKGC        0x98
  65 #define JZ4780_I2C_ENSTA        0x9C
  66 #define JZ4780_I2C_SDAHD        0xD0
  67
  68 #define JZ4780_I2C_CTRL_STPHLD          BIT(7)
  69 #define JZ4780_I2C_CTRL_SLVDIS          BIT(6)
  70 #define JZ4780_I2C_CTRL_REST            BIT(5)
  71 #define JZ4780_I2C_CTRL_MATP            BIT(4)
  72 #define JZ4780_I2C_CTRL_SATP            BIT(3)
  73 #define JZ4780_I2C_CTRL_SPDF            BIT(2)
  74 #define JZ4780_I2C_CTRL_SPDS            BIT(1)
  75 #define JZ4780_I2C_CTRL_MD              BIT(0)
  76
  77 #define JZ4780_I2C_STA_SLVACT           BIT(6)
  78 #define JZ4780_I2C_STA_MSTACT           BIT(5)
  79 #define JZ4780_I2C_STA_RFF              BIT(4)
  80 #define JZ4780_I2C_STA_RFNE             BIT(3)
  81 #define JZ4780_I2C_STA_TFE              BIT(2)
  82 #define JZ4780_I2C_STA_TFNF             BIT(1)
  83 #define JZ4780_I2C_STA_ACT              BIT(0)
  84
  85 #define JZ4780_I2C_INTST_IGC            BIT(11)
  86 #define JZ4780_I2C_INTST_ISTT           BIT(10)
  87 #define JZ4780_I2C_INTST_ISTP           BIT(9)
  88 #define JZ4780_I2C_INTST_IACT           BIT(8)
  89 #define JZ4780_I2C_INTST_RXDN           BIT(7)
  90 #define JZ4780_I2C_INTST_TXABT          BIT(6)
  91 #define JZ4780_I2C_INTST_RDREQ          BIT(5)
  92 #define JZ4780_I2C_INTST_TXEMP          BIT(4)
  93 #define JZ4780_I2C_INTST_TXOF           BIT(3)
  94 #define JZ4780_I2C_INTST_RXFL           BIT(2)
  95 #define JZ4780_I2C_INTST_RXOF           BIT(1)
  96 #define JZ4780_I2C_INTST_RXUF           BIT(0)
  97
  98 #define JZ4780_I2C_INTM_MIGC            BIT(11)
  99 #define JZ4780_I2C_INTM_MISTT           BIT(10)
 100 #define JZ4780_I2C_INTM_MISTP           BIT(9)
 101 #define JZ4780_I2C_INTM_MIACT           BIT(8)
 102 #define JZ4780_I2C_INTM_MRXDN           BIT(7)
 103 #define JZ4780_I2C_INTM_MTXABT          BIT(6)
 104 #define JZ4780_I2C_INTM_MRDREQ          BIT(5)
 105 #define JZ4780_I2C_INTM_MTXEMP          BIT(4)
 106 #define JZ4780_I2C_INTM_MTXOF           BIT(3)
 107 #define JZ4780_I2C_INTM_MRXFL           BIT(2)
 108 #define JZ4780_I2C_INTM_MRXOF           BIT(1)
 109 #define JZ4780_I2C_INTM_MRXUF           BIT(0)
 110
 111 #define JZ4780_I2C_DC_READ              BIT(8)
 112
 113 #define JZ4780_I2C_SDAHD_HDENB          BIT(8)
 114
 115 #define JZ4780_I2C_ENB_I2C              BIT(0)
 116
 117 #define JZ4780_I2CSHCNT_ADJUST(n)       (((n) - 8) < 6 ? 6 : ((n) - 8))
 118 #define JZ4780_I2CSLCNT_ADJUST(n)       (((n) - 1) < 8 ? 8 : ((n) - 1))
 119 #define JZ4780_I2CFHCNT_ADJUST(n)       (((n) - 8) < 6 ? 6 : ((n) - 8))
 120 #define JZ4780_I2CFLCNT_ADJUST(n)       (((n) - 1) < 8 ? 8 : ((n) - 1))
 121
 122 #define JZ4780_I2C_FIFO_LEN     16
 123 #define TX_LEVEL                3
 124 #define RX_LEVEL                (JZ4780_I2C_FIFO_LEN - TX_LEVEL - 1)
 125
 126 #define JZ4780_I2C_TIMEOUT      300
 127
 128 #define BUFSIZE 200
 129
 130 struct jz4780_i2c {
 131         void __iomem            *iomem;
 132         int                      irq;
 133         struct clk              *clk;
 134         struct i2c_adapter       adap;
 135
 136         /* lock to protect rbuf and wbuf between xfer_rd/wr and irq handler */
 137         spinlock_t              lock;
 138
 139         /* beginning of lock scope */
 140         unsigned char           *rbuf;
 141         int                     rd_total_len;
 142         int                     rd_data_xfered;
 143         int                     rd_cmd_xfered;
 144
 145         unsigned char           *wbuf;
 146         int                     wt_len;
 147
 148         int                     is_write;
 149         int                     stop_hold;
 150         int                     speed;
 151
 152         int                     data_buf[BUFSIZE];
 153         int                     cmd_buf[BUFSIZE];
 154         int                     cmd;
 155
 156         /* end of lock scope */
 157         struct completion       trans_waitq;
 158 };
 159
 160 static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c,
 161                                               unsigned long offset)
 162 {
 163         return readw(i2c->iomem + offset);
 164 }
 165
 166 static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c,
 167                                      unsigned long offset, unsigned short val)
 168 {
 169         writew(val, i2c->iomem + offset);
 170 }
 171
 172 static int jz4780_i2c_disable(struct jz4780_i2c *i2c)
 173 {
 174         unsigned short regval;
 175         unsigned long loops = 5;
 176
 177         jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0);
 178
 179         do {
 180                 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
 181                 if (!(regval & JZ4780_I2C_ENB_I2C))
 182                         return 0;
 183
 184                 usleep_range(5000, 15000);
 185         } while (--loops);
 186
 187         dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval);
 188         return -ETIMEDOUT;
 189 }
 190
 191 static int jz4780_i2c_enable(struct jz4780_i2c *i2c)
 192 {
 193         unsigned short regval;
 194         unsigned long loops = 5;
 195
 196         jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1);
 197
 198         do {
 199                 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
 200                 if (regval & JZ4780_I2C_ENB_I2C)
 201                         return 0;
 202
 203                 usleep_range(5000, 15000);
 204         } while (--loops);
 205
 206         dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval);
 207         return -ETIMEDOUT;
 208 }
 209
 210 static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address)
 211 {
 212         unsigned short regval;
 213         unsigned long loops = 5;
 214
 215         do {
 216                 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 217                 if ((regval & JZ4780_I2C_STA_TFE) &&
 218                     !(regval & JZ4780_I2C_STA_MSTACT))
 219                         break;
 220
 221                 usleep_range(5000, 15000);
 222         } while (--loops);
 223
 224         if (loops) {
 225                 jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address);
 226                 return 0;
 227         }
 228
 229         dev_err(&i2c->adap.dev,
 230                 "set device to address 0x%02x failed, STA=0x%04x\n",
 231                 address, regval);
 232
 233         return -ENXIO;
 234 }
 235
 236 static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c)
 237 {
 238         int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;
 239         int cnt_high = 0;       /* HIGH period count of the SCL clock */
 240         int cnt_low = 0;        /* LOW period count of the SCL clock */
 241         int cnt_period = 0;     /* period count of the SCL clock */
 242         int setup_time = 0;
 243         int hold_time = 0;
 244         unsigned short tmp = 0;
 245         int i2c_clk = i2c->speed;
 246
 247         if (jz4780_i2c_disable(i2c))
 248                 dev_dbg(&i2c->adap.dev, "i2c not disabled\n");
 249
 250         /*
 251          * 1 JZ4780_I2C cycle equals to cnt_period PCLK(i2c_clk)
 252          * standard mode, min LOW and HIGH period are 4700 ns and 4000 ns
 253          * fast mode, min LOW and HIGH period are 1300 ns and 600 ns
 254          */
 255         cnt_period = dev_clk_khz / i2c_clk;
 256
 257         if (i2c_clk <= 100)
 258                 cnt_high = (cnt_period * 4000) / (4700 + 4000);
 259         else
 260                 cnt_high = (cnt_period * 600) / (1300 + 600);
 261
 262         cnt_low = cnt_period - cnt_high;
 263
 264         /*
 265          * NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because
 266          * normal read are 2 messages, we cannot disable i2c controller
 267          * between these two messages, this means that we must always set
 268          * JZ4780_I2C_CTRL_REST when init JZ4780_I2C_CTRL
 269          *
 270          */
 271         if (i2c_clk <= 100) {
 272                 tmp = JZ4780_I2C_CTRL_SPDS | JZ4780_I2C_CTRL_REST
 273                       | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
 274                 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 275
 276                 jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT,
 277                                   JZ4780_I2CSHCNT_ADJUST(cnt_high));
 278                 jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT,
 279                                   JZ4780_I2CSLCNT_ADJUST(cnt_low));
 280         } else {
 281                 tmp = JZ4780_I2C_CTRL_SPDF | JZ4780_I2C_CTRL_REST
 282                       | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
 283                 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 284
 285                 jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT,
 286                                   JZ4780_I2CFHCNT_ADJUST(cnt_high));
 287                 jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT,
 288                                   JZ4780_I2CFLCNT_ADJUST(cnt_low));
 289         }
 290
 291         /*
 292          * a i2c device must internally provide a hold time at least 300ns
 293          * tHD:DAT
 294          *      Standard Mode: min=300ns, max=3450ns
 295          *      Fast Mode: min=0ns, max=900ns
 296          * tSU:DAT
 297          *      Standard Mode: min=250ns, max=infinite
 298          *      Fast Mode: min=100(250ns is recommended), max=infinite
 299          *
 300          * 1i2c_clk = 10^6 / dev_clk_khz
 301          * on FPGA, dev_clk_khz = 12000, so 1i2c_clk = 1000/12 = 83ns
 302          * on Pisces(1008M), dev_clk_khz=126000, so 1i2c_clk = 1000 / 126 = 8ns
 303          *
 304          * The actual hold time is (SDAHD + 1) * (i2c_clk period).
 305          *
 306          * Length of setup time calculated using (SDASU - 1) * (ic_clk_period)
 307          *
 308          */
 309         if (i2c_clk <= 100) { /* standard mode */
 310                 setup_time = 300;
 311                 hold_time = 400;
 312         } else {
 313                 setup_time = 450;
 314                 hold_time = 450;
 315         }
 316
 317         hold_time = ((hold_time * dev_clk_khz) / 1000000) - 1;
 318         setup_time = ((setup_time * dev_clk_khz) / 1000000)  + 1;
 319
 320         if (setup_time > 255)
 321                 setup_time = 255;
 322
 323         if (setup_time <= 0)
 324                 setup_time = 1;
 325
 326         jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time);
 327
 328         if (hold_time > 255)
 329                 hold_time = 255;
 330
 331         if (hold_time >= 0) {
 332                 /*i2c hold time enable */
 333                 hold_time |= JZ4780_I2C_SDAHD_HDENB;
 334                 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time);
 335         } else {
 336                 /* disable hold time */
 337                 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0);
 338         }
 339
 340         return 0;
 341 }
 342
 343 static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c)
 344 {
 345         int ret;
 346         unsigned long flags;
 347         unsigned short tmp;
 348
 349         spin_lock_irqsave(&i2c->lock, flags);
 350
 351         /* can send stop now if need */
 352         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 353         tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 354         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 355
 356         /* disable all interrupts first */
 357         jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
 358
 359         /* then clear all interrupts */
 360         jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT);
 361         jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR);
 362
 363         /* then disable the controller */
 364         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 365         tmp &= ~JZ4780_I2C_ENB_I2C;
 366         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 367         udelay(10);
 368         tmp |= JZ4780_I2C_ENB_I2C;
 369         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 370
 371         spin_unlock_irqrestore(&i2c->lock, flags);
 372
 373         ret = jz4780_i2c_disable(i2c);
 374         if (ret)
 375                 dev_err(&i2c->adap.dev,
 376                         "unable to disable device during cleanup!\n");
 377
 378         if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM)
 379                      & jz4780_i2c_readw(i2c, JZ4780_I2C_INTST)))
 380                 dev_err(&i2c->adap.dev,
 381                         "device has interrupts after a complete cleanup!\n");
 382
 383         return ret;
 384 }
 385
 386 static int jz4780_i2c_prepare(struct jz4780_i2c *i2c)
 387 {
 388         jz4780_i2c_set_speed(i2c);
 389         return jz4780_i2c_enable(i2c);
 390 }
 391
 392 static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c, int cmd_count)
 393 {
 394         int i;
 395
 396         for (i = 0; i < cmd_count; i++)
 397                 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
 398 }
 399
 400 static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c)
 401 {
 402         jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
 403         complete(&i2c->trans_waitq);
 404 }
 405
 406 static irqreturn_t jz4780_i2c_irq(int irqno, void *dev_id)
 407 {
 408         unsigned short tmp;
 409         unsigned short intst;
 410         unsigned short intmsk;
 411         struct jz4780_i2c *i2c = dev_id;
 412         unsigned long flags;
 413
 414         spin_lock_irqsave(&i2c->lock, flags);
 415         intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
 416         intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST);
 417
 418         intst &= intmsk;
 419
 420         if (intst & JZ4780_I2C_INTST_TXABT) {
 421                 jz4780_i2c_trans_done(i2c);
 422                 goto done;
 423         }
 424
 425         if (intst & JZ4780_I2C_INTST_RXOF) {
 426                 dev_dbg(&i2c->adap.dev, "received fifo overflow!\n");
 427                 jz4780_i2c_trans_done(i2c);
 428                 goto done;
 429         }
 430
 431         /*
 432          * When reading, always drain RX FIFO before we send more Read
 433          * Commands to avoid fifo overrun
 434          */
 435         if (i2c->is_write == 0) {
 436                 int rd_left;
 437
 438                 while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA)
 439                                   & JZ4780_I2C_STA_RFNE)) {
 440                         *(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC)
 441                                          & 0xff;
 442                         i2c->rd_data_xfered++;
 443                         if (i2c->rd_data_xfered == i2c->rd_total_len) {
 444                                 jz4780_i2c_trans_done(i2c);
 445                                 goto done;
 446                         }
 447                 }
 448
 449                 rd_left = i2c->rd_total_len - i2c->rd_data_xfered;
 450
 451                 if (rd_left <= JZ4780_I2C_FIFO_LEN)
 452                         jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1);
 453         }
 454
 455         if (intst & JZ4780_I2C_INTST_TXEMP) {
 456                 if (i2c->is_write == 0) {
 457                         int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
 458                         int max_send = (JZ4780_I2C_FIFO_LEN - 1)
 459                                          - (i2c->rd_cmd_xfered
 460                                          - i2c->rd_data_xfered);
 461                         int cmd_to_send = min(cmd_left, max_send);
 462
 463                         if (i2c->rd_cmd_xfered != 0)
 464                                 cmd_to_send = min(cmd_to_send,
 465                                                   JZ4780_I2C_FIFO_LEN
 466                                                   - TX_LEVEL - 1);
 467
 468                         if (cmd_to_send) {
 469                                 jz4780_i2c_send_rcmd(i2c, cmd_to_send);
 470                                 i2c->rd_cmd_xfered += cmd_to_send;
 471                         }
 472
 473                         cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
 474                         if (cmd_left == 0) {
 475                                 intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
 476                                 intmsk &= ~JZ4780_I2C_INTM_MTXEMP;
 477                                 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk);
 478
 479                                 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 480                                 tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 481                                 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 482                         }
 483                 } else {
 484                         unsigned short data;
 485                         unsigned short i2c_sta;
 486
 487                         i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 488
 489                         while ((i2c_sta & JZ4780_I2C_STA_TFNF) &&
 490                                (i2c->wt_len > 0)) {
 491                                 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 492                                 data = *i2c->wbuf;
 493                                 data &= ~JZ4780_I2C_DC_READ;
 494                                 jz4780_i2c_writew(i2c, JZ4780_I2C_DC,
 495                                                   data);
 496                                 i2c->wbuf++;
 497                                 i2c->wt_len--;
 498                         }
 499
 500                         if (i2c->wt_len == 0) {
 501                                 if (!i2c->stop_hold) {
 502                                         tmp = jz4780_i2c_readw(i2c,
 503                                                                JZ4780_I2C_CTRL);
 504                                         tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 505                                         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL,
 506                                                           tmp);
 507                                 }
 508
 509                                 jz4780_i2c_trans_done(i2c);
 510                                 goto done;
 511                         }
 512                 }
 513         }
 514
 515 done:
 516         spin_unlock_irqrestore(&i2c->lock, flags);
 517         return IRQ_HANDLED;
 518 }
 519
 520 static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src)
 521 {
 522         dev_dbg(&i2c->adap.dev, "txabrt: 0x%08x, cmd: %d, send: %d, recv: %d\n",
 523                 src, i2c->cmd, i2c->cmd_buf[i2c->cmd], i2c->data_buf[i2c->cmd]);
 524 }
 525
 526 static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c,
 527                                        unsigned char *buf, int len, int cnt,
 528                                        int idx)
 529 {
 530         int ret = 0;
 531         long timeout;
 532         int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
 533         unsigned short tmp;
 534         unsigned long flags;
 535
 536         memset(buf, 0, len);
 537
 538         spin_lock_irqsave(&i2c->lock, flags);
 539
 540         i2c->stop_hold = 0;
 541         i2c->is_write = 0;
 542         i2c->rbuf = buf;
 543         i2c->rd_total_len = len;
 544         i2c->rd_data_xfered = 0;
 545         i2c->rd_cmd_xfered = 0;
 546
 547         if (len <= JZ4780_I2C_FIFO_LEN)
 548                 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1);
 549         else
 550                 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, RX_LEVEL);
 551
 552         jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
 553
 554         jz4780_i2c_writew(i2c, JZ4780_I2C_INTM,
 555                           JZ4780_I2C_INTM_MRXFL | JZ4780_I2C_INTM_MTXEMP
 556                           | JZ4780_I2C_INTM_MTXABT | JZ4780_I2C_INTM_MRXOF);
 557
 558         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 559         tmp |= JZ4780_I2C_CTRL_STPHLD;
 560         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 561
 562         spin_unlock_irqrestore(&i2c->lock, flags);
 563
 564         timeout = wait_for_completion_timeout(&i2c->trans_waitq,
 565                                               msecs_to_jiffies(wait_time));
 566
 567         if (!timeout) {
 568                 dev_err(&i2c->adap.dev, "irq read timeout\n");
 569                 dev_dbg(&i2c->adap.dev, "send cmd count:%d  %d\n",
 570                         i2c->cmd, i2c->cmd_buf[i2c->cmd]);
 571                 dev_dbg(&i2c->adap.dev, "receive data count:%d  %d\n",
 572                         i2c->cmd, i2c->data_buf[i2c->cmd]);
 573                 ret = -EIO;
 574         }
 575
 576         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
 577         if (tmp) {
 578                 jz4780_i2c_txabrt(i2c, tmp);
 579                 ret = -EIO;
 580         }
 581
 582         return ret;
 583 }
 584
 585 static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c,
 586                                         unsigned char *buf, int len,
 587                                         int cnt, int idx)
 588 {
 589         int ret = 0;
 590         int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
 591         long timeout;
 592         unsigned short tmp;
 593         unsigned long flags;
 594
 595         spin_lock_irqsave(&i2c->lock, flags);
 596
 597         if (idx < (cnt - 1))
 598                 i2c->stop_hold = 1;
 599         else
 600                 i2c->stop_hold = 0;
 601
 602         i2c->is_write = 1;
 603         i2c->wbuf = buf;
 604         i2c->wt_len = len;
 605
 606         jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
 607
 608         jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP
 609                                         | JZ4780_I2C_INTM_MTXABT);
 610
 611         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 612         tmp |= JZ4780_I2C_CTRL_STPHLD;
 613         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 614
 615         spin_unlock_irqrestore(&i2c->lock, flags);
 616
 617         timeout = wait_for_completion_timeout(&i2c->trans_waitq,
 618                                               msecs_to_jiffies(wait_time));
 619         if (timeout && !i2c->stop_hold) {
 620                 unsigned short i2c_sta;
 621                 int write_in_process;
 622
 623                 timeout = JZ4780_I2C_TIMEOUT * 100;
 624                 for (; timeout > 0; timeout--) {
 625                         i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 626
 627                         write_in_process = (i2c_sta & JZ4780_I2C_STA_MSTACT) ||
 628                                 !(i2c_sta & JZ4780_I2C_STA_TFE);
 629                         if (!write_in_process)
 630                                 break;
 631                         udelay(10);
 632                 }
 633         }
 634
 635         if (!timeout) {
 636                 dev_err(&i2c->adap.dev, "write wait timeout\n");
 637                 ret = -EIO;
 638         }
 639
 640         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
 641         if (tmp) {
 642                 jz4780_i2c_txabrt(i2c, tmp);
 643                 ret = -EIO;
 644         }
 645
 646         return ret;
 647 }
 648
 649 static int jz4780_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
 650                            int count)
 651 {
 652         int i = -EIO;
 653         int ret = 0;
 654         struct jz4780_i2c *i2c = adap->algo_data;
 655
 656         ret = jz4780_i2c_prepare(i2c);
 657         if (ret) {
 658                 dev_err(&i2c->adap.dev, "I2C prepare failed\n");
 659                 goto out;
 660         }
 661
 662         if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) {
 663                 ret = jz4780_i2c_set_target(i2c, msg->addr);
 664                 if (ret)
 665                         goto out;
 666         }
 667         for (i = 0; i < count; i++, msg++) {
 668                 if (msg->flags & I2C_M_RD)
 669                         ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len,
 670                                                    count, i);
 671                 else
 672                         ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len,
 673                                                     count, i);
 674
 675                 if (ret)
 676                         goto out;
 677         }
 678
 679         ret = i;
 680
 681 out:
 682         jz4780_i2c_cleanup(i2c);
 683         return ret;
 684 }
 685
 686 static u32 jz4780_i2c_functionality(struct i2c_adapter *adap)
 687 {
 688         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 689 }
 690
 691 static const struct i2c_algorithm jz4780_i2c_algorithm = {
 692         .master_xfer    = jz4780_i2c_xfer,
 693         .functionality  = jz4780_i2c_functionality,
 694 };
 695
 696 static const struct of_device_id jz4780_i2c_of_matches[] = {
 697         { .compatible = "ingenic,jz4780-i2c", },
 698         { /* sentinel */ }
 699 };
 700 MODULE_DEVICE_TABLE(of, jz4780_i2c_of_matches);
 701
 702 static int jz4780_i2c_probe(struct platform_device *pdev)
 703 {
 704         int ret = 0;
 705         unsigned int clk_freq = 0;
 706         unsigned short tmp;
 707         struct resource *r;
 708         struct jz4780_i2c *i2c;
 709
 710         i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL);
 711         if (!i2c)
 712                 return -ENOMEM;
 713
 714         i2c->adap.owner         = THIS_MODULE;
 715         i2c->adap.algo          = &jz4780_i2c_algorithm;
 716         i2c->adap.algo_data     = i2c;
 717         i2c->adap.retries       = 5;
 718         i2c->adap.dev.parent    = &pdev->dev;
 719         i2c->adap.dev.of_node   = pdev->dev.of_node;
 720         sprintf(i2c->adap.name, "%s", pdev->name);
 721
 722         init_completion(&i2c->trans_waitq);
 723         spin_lock_init(&i2c->lock);
 724
 725         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 726         i2c->iomem = devm_ioremap_resource(&pdev->dev, r);
 727         if (IS_ERR(i2c->iomem))
 728                 return PTR_ERR(i2c->iomem);
 729
 730         platform_set_drvdata(pdev, i2c);
 731
 732         i2c->clk = devm_clk_get(&pdev->dev, NULL);
 733         if (IS_ERR(i2c->clk))
 734                 return PTR_ERR(i2c->clk);
 735
 736         ret = clk_prepare_enable(i2c->clk);
 737         if (ret)
 738                 return ret;
 739
 740         ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 741                                    &clk_freq);
 742         if (ret) {
 743                 dev_err(&pdev->dev, "clock-frequency not specified in DT\n");
 744                 goto err;
 745         }
 746
 747         i2c->speed = clk_freq / 1000;
 748         if (i2c->speed == 0) {
 749                 ret = -EINVAL;
 750                 dev_err(&pdev->dev, "clock-frequency minimum is 1000\n");
 751                 goto err;
 752         }
 753         jz4780_i2c_set_speed(i2c);
 754
 755         dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed);
 756
 757         tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 758         tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 759         jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 760
 761         jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
 762
 763         i2c->irq = platform_get_irq(pdev, 0);
 764         ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
 765                                dev_name(&pdev->dev), i2c);
 766         if (ret)
 767                 goto err;
 768
 769         ret = i2c_add_adapter(&i2c->adap);
 770         if (ret < 0)
 771                 goto err;
 772
 773         return 0;
 774
 775 err:
 776         clk_disable_unprepare(i2c->clk);
 777         return ret;
 778 }
 779
 780 static int jz4780_i2c_remove(struct platform_device *pdev)
 781 {
 782         struct jz4780_i2c *i2c = platform_get_drvdata(pdev);
 783
 784         clk_disable_unprepare(i2c->clk);
 785         i2c_del_adapter(&i2c->adap);
 786         return 0;
 787 }
 788
 789 static struct platform_driver jz4780_i2c_driver = {
 790         .probe          = jz4780_i2c_probe,
 791         .remove         = jz4780_i2c_remove,
 792         .driver         = {
 793                 .name   = "jz4780-i2c",
 794                 .of_match_table = of_match_ptr(jz4780_i2c_of_matches),
 795         },
 796 };
 797
 798 module_platform_driver(jz4780_i2c_driver);
 799
 800 MODULE_LICENSE("GPL");
 801 MODULE_AUTHOR("ztyan<ztyan@ingenic.cn>");
 802 MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");