vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console
[linux/fpc-iii.git] / drivers / scsi / hisi_sas / hisi_sas.h
blobd499c446616612592be462a96c1e53e61454bdc0
1 /*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
12 #ifndef _HISI_SAS_H_
13 #define _HISI_SAS_H_
15 #include <linux/acpi.h>
16 #include <linux/clk.h>
17 #include <linux/dmapool.h>
18 #include <linux/iopoll.h>
19 #include <linux/lcm.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/module.h>
22 #include <linux/of_address.h>
23 #include <linux/pci.h>
24 #include <linux/platform_device.h>
25 #include <linux/property.h>
26 #include <linux/regmap.h>
27 #include <scsi/sas_ata.h>
28 #include <scsi/libsas.h>
30 #define HISI_SAS_MAX_PHYS 9
31 #define HISI_SAS_MAX_QUEUES 32
32 #define HISI_SAS_QUEUE_SLOTS 512
33 #define HISI_SAS_MAX_ITCT_ENTRIES 1024
34 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
35 #define HISI_SAS_RESET_BIT 0
36 #define HISI_SAS_REJECT_CMD_BIT 1
38 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
39 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
41 #define hisi_sas_status_buf_addr(buf) \
42 (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
43 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
44 #define hisi_sas_status_buf_addr_dma(slot) \
45 hisi_sas_status_buf_addr(slot->buf_dma)
47 #define hisi_sas_cmd_hdr_addr(buf) \
48 (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
49 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
50 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
52 #define hisi_sas_sge_addr(buf) \
53 (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
54 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
55 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
57 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
58 #define HISI_SAS_MAX_SMP_RESP_SZ 1028
59 #define HISI_SAS_MAX_STP_RESP_SZ 28
61 #define DEV_IS_EXPANDER(type) \
62 ((type == SAS_EDGE_EXPANDER_DEVICE) || \
63 (type == SAS_FANOUT_EXPANDER_DEVICE))
65 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
66 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
67 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
68 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
69 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
71 struct hisi_hba;
73 enum {
74 PORT_TYPE_SAS = (1U << 1),
75 PORT_TYPE_SATA = (1U << 0),
78 enum dev_status {
79 HISI_SAS_DEV_NORMAL,
80 HISI_SAS_DEV_EH,
83 enum {
84 HISI_SAS_INT_ABT_CMD = 0,
85 HISI_SAS_INT_ABT_DEV = 1,
88 enum hisi_sas_dev_type {
89 HISI_SAS_DEV_TYPE_STP = 0,
90 HISI_SAS_DEV_TYPE_SSP,
91 HISI_SAS_DEV_TYPE_SATA,
94 struct hisi_sas_hw_error {
95 u32 irq_msk;
96 u32 msk;
97 int shift;
98 const char *msg;
99 int reg;
100 const struct hisi_sas_hw_error *sub;
103 struct hisi_sas_rst {
104 struct hisi_hba *hisi_hba;
105 struct completion *completion;
106 struct work_struct work;
107 bool done;
110 #define HISI_SAS_RST_WORK_INIT(r, c) \
111 { .hisi_hba = hisi_hba, \
112 .completion = &c, \
113 .work = __WORK_INITIALIZER(r.work, \
114 hisi_sas_sync_rst_work_handler), \
115 .done = false, \
118 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
119 DECLARE_COMPLETION_ONSTACK(c); \
120 DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \
121 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
123 enum hisi_sas_bit_err_type {
124 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
125 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
128 enum hisi_sas_phy_event {
129 HISI_PHYE_PHY_UP = 0U,
130 HISI_PHYE_LINK_RESET,
131 HISI_PHYES_NUM,
134 struct hisi_sas_phy {
135 struct work_struct works[HISI_PHYES_NUM];
136 struct hisi_hba *hisi_hba;
137 struct hisi_sas_port *port;
138 struct asd_sas_phy sas_phy;
139 struct sas_identify identify;
140 struct completion *reset_completion;
141 spinlock_t lock;
142 u64 port_id; /* from hw */
143 u64 frame_rcvd_size;
144 u8 frame_rcvd[32];
145 u8 phy_attached;
146 u8 in_reset;
147 u8 reserved[2];
148 u32 phy_type;
149 enum sas_linkrate minimum_linkrate;
150 enum sas_linkrate maximum_linkrate;
153 struct hisi_sas_port {
154 struct asd_sas_port sas_port;
155 u8 port_attached;
156 u8 id; /* from hw */
159 struct hisi_sas_cq {
160 struct hisi_hba *hisi_hba;
161 struct tasklet_struct tasklet;
162 int rd_point;
163 int id;
166 struct hisi_sas_dq {
167 struct hisi_hba *hisi_hba;
168 struct list_head list;
169 spinlock_t lock;
170 int wr_point;
171 int id;
174 struct hisi_sas_device {
175 struct hisi_hba *hisi_hba;
176 struct domain_device *sas_device;
177 struct completion *completion;
178 struct hisi_sas_dq *dq;
179 struct list_head list;
180 enum sas_device_type dev_type;
181 int device_id;
182 int sata_idx;
183 u8 dev_status;
186 struct hisi_sas_tmf_task {
187 int force_phy;
188 int phy_id;
189 u8 tmf;
190 u16 tag_of_task_to_be_managed;
193 struct hisi_sas_slot {
194 struct list_head entry;
195 struct list_head delivery;
196 struct sas_task *task;
197 struct hisi_sas_port *port;
198 u64 n_elem;
199 int dlvry_queue;
200 int dlvry_queue_slot;
201 int cmplt_queue;
202 int cmplt_queue_slot;
203 int abort;
204 int ready;
205 void *cmd_hdr;
206 dma_addr_t cmd_hdr_dma;
207 struct timer_list internal_abort_timer;
208 bool is_internal;
209 struct hisi_sas_tmf_task *tmf;
210 /* Do not reorder/change members after here */
211 void *buf;
212 dma_addr_t buf_dma;
213 int idx;
216 struct hisi_sas_hw {
217 int (*hw_init)(struct hisi_hba *hisi_hba);
218 void (*setup_itct)(struct hisi_hba *hisi_hba,
219 struct hisi_sas_device *device);
220 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
221 struct domain_device *device);
222 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
223 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
224 int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
225 void (*start_delivery)(struct hisi_sas_dq *dq);
226 void (*prep_ssp)(struct hisi_hba *hisi_hba,
227 struct hisi_sas_slot *slot);
228 void (*prep_smp)(struct hisi_hba *hisi_hba,
229 struct hisi_sas_slot *slot);
230 void (*prep_stp)(struct hisi_hba *hisi_hba,
231 struct hisi_sas_slot *slot);
232 void (*prep_abort)(struct hisi_hba *hisi_hba,
233 struct hisi_sas_slot *slot,
234 int device_id, int abort_flag, int tag_to_abort);
235 int (*slot_complete)(struct hisi_hba *hisi_hba,
236 struct hisi_sas_slot *slot);
237 void (*phys_init)(struct hisi_hba *hisi_hba);
238 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
239 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
240 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
241 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
242 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
243 struct sas_phy_linkrates *linkrates);
244 enum sas_linkrate (*phy_get_max_linkrate)(void);
245 void (*clear_itct)(struct hisi_hba *hisi_hba,
246 struct hisi_sas_device *dev);
247 void (*free_device)(struct hisi_sas_device *sas_dev);
248 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
249 void (*dereg_device)(struct hisi_hba *hisi_hba,
250 struct domain_device *device);
251 int (*soft_reset)(struct hisi_hba *hisi_hba);
252 u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
253 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
254 u8 reg_index, u8 reg_count, u8 *write_data);
255 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba,
256 int delay_ms, int timeout_ms);
257 int max_command_entries;
258 int complete_hdr_size;
259 struct scsi_host_template *sht;
262 struct hisi_hba {
263 /* This must be the first element, used by SHOST_TO_SAS_HA */
264 struct sas_ha_struct *p;
266 struct platform_device *platform_dev;
267 struct pci_dev *pci_dev;
268 struct device *dev;
270 void __iomem *regs;
271 void __iomem *sgpio_regs;
272 struct regmap *ctrl;
273 u32 ctrl_reset_reg;
274 u32 ctrl_reset_sts_reg;
275 u32 ctrl_clock_ena_reg;
276 u32 refclk_frequency_mhz;
277 u8 sas_addr[SAS_ADDR_SIZE];
279 int n_phy;
280 spinlock_t lock;
281 struct semaphore sem;
283 struct timer_list timer;
284 struct workqueue_struct *wq;
286 int slot_index_count;
287 int last_slot_index;
288 int last_dev_id;
289 unsigned long *slot_index_tags;
290 unsigned long reject_stp_links_msk;
292 /* SCSI/SAS glue */
293 struct sas_ha_struct sha;
294 struct Scsi_Host *shost;
296 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
297 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
298 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
299 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
301 int queue_count;
303 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
304 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
305 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
306 void *complete_hdr[HISI_SAS_MAX_QUEUES];
307 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
308 struct hisi_sas_initial_fis *initial_fis;
309 dma_addr_t initial_fis_dma;
310 struct hisi_sas_itct *itct;
311 dma_addr_t itct_dma;
312 struct hisi_sas_iost *iost;
313 dma_addr_t iost_dma;
314 struct hisi_sas_breakpoint *breakpoint;
315 dma_addr_t breakpoint_dma;
316 struct hisi_sas_breakpoint *sata_breakpoint;
317 dma_addr_t sata_breakpoint_dma;
318 struct hisi_sas_slot *slot_info;
319 unsigned long flags;
320 const struct hisi_sas_hw *hw; /* Low level hw interface */
321 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
322 struct work_struct rst_work;
323 u32 phy_state;
326 /* Generic HW DMA host memory structures */
327 /* Delivery queue header */
328 struct hisi_sas_cmd_hdr {
329 /* dw0 */
330 __le32 dw0;
332 /* dw1 */
333 __le32 dw1;
335 /* dw2 */
336 __le32 dw2;
338 /* dw3 */
339 __le32 transfer_tags;
341 /* dw4 */
342 __le32 data_transfer_len;
344 /* dw5 */
345 __le32 first_burst_num;
347 /* dw6 */
348 __le32 sg_len;
350 /* dw7 */
351 __le32 dw7;
353 /* dw8-9 */
354 __le64 cmd_table_addr;
356 /* dw10-11 */
357 __le64 sts_buffer_addr;
359 /* dw12-13 */
360 __le64 prd_table_addr;
362 /* dw14-15 */
363 __le64 dif_prd_table_addr;
366 struct hisi_sas_itct {
367 __le64 qw0;
368 __le64 sas_addr;
369 __le64 qw2;
370 __le64 qw3;
371 __le64 qw4_15[12];
374 struct hisi_sas_iost {
375 __le64 qw0;
376 __le64 qw1;
377 __le64 qw2;
378 __le64 qw3;
381 struct hisi_sas_err_record {
382 u32 data[4];
385 struct hisi_sas_initial_fis {
386 struct hisi_sas_err_record err_record;
387 struct dev_to_host_fis fis;
388 u32 rsvd[3];
391 struct hisi_sas_breakpoint {
392 u8 data[128];
395 struct hisi_sas_sata_breakpoint {
396 struct hisi_sas_breakpoint tag[32];
399 struct hisi_sas_sge {
400 __le64 addr;
401 __le32 page_ctrl_0;
402 __le32 page_ctrl_1;
403 __le32 data_len;
404 __le32 data_off;
407 struct hisi_sas_command_table_smp {
408 u8 bytes[44];
411 struct hisi_sas_command_table_stp {
412 struct host_to_dev_fis command_fis;
413 u8 dummy[12];
414 u8 atapi_cdb[ATAPI_CDB_LEN];
417 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
418 struct hisi_sas_sge_page {
419 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
420 } __aligned(16);
422 struct hisi_sas_command_table_ssp {
423 struct ssp_frame_hdr hdr;
424 union {
425 struct {
426 struct ssp_command_iu task;
427 u32 prot[7];
429 struct ssp_tmf_iu ssp_task;
430 struct xfer_rdy_iu xfer_rdy;
431 struct ssp_response_iu ssp_res;
432 } u;
435 union hisi_sas_command_table {
436 struct hisi_sas_command_table_ssp ssp;
437 struct hisi_sas_command_table_smp smp;
438 struct hisi_sas_command_table_stp stp;
439 } __aligned(16);
441 struct hisi_sas_status_buffer {
442 struct hisi_sas_err_record err;
443 u8 iu[1024];
444 } __aligned(16);
446 struct hisi_sas_slot_buf_table {
447 struct hisi_sas_status_buffer status_buffer;
448 union hisi_sas_command_table command_header;
449 struct hisi_sas_sge_page sge_page;
452 extern struct scsi_transport_template *hisi_sas_stt;
453 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
454 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
455 extern void hisi_sas_free(struct hisi_hba *hisi_hba);
456 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
457 int direction);
458 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
459 extern void hisi_sas_sata_done(struct sas_task *task,
460 struct hisi_sas_slot *slot);
461 extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
462 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
463 extern int hisi_sas_probe(struct platform_device *pdev,
464 const struct hisi_sas_hw *ops);
465 extern int hisi_sas_remove(struct platform_device *pdev);
467 extern int hisi_sas_slave_configure(struct scsi_device *sdev);
468 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time);
469 extern void hisi_sas_scan_start(struct Scsi_Host *shost);
470 extern struct device_attribute *host_attrs[];
471 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type);
472 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
473 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
474 struct sas_task *task,
475 struct hisi_sas_slot *slot);
476 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
477 extern void hisi_sas_rst_work_handler(struct work_struct *work);
478 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
479 extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
480 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
481 enum hisi_sas_phy_event event);
482 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
483 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
484 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba);
485 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba);
486 #endif