arch/m68knommu/platform/5407/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5407/config.c
   5  *
   6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   7  *      Copyright (C) 2000, Lineo (www.lineo.com)
   8  */
   9
  10 /***************************************************************************/
  11
  12 #include <linux/kernel.h>
  13 #include <linux/param.h>
  14 #include <linux/init.h>
  15 #include <linux/io.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19 #include <asm/mcfuart.h>
  20
  21 /***************************************************************************/
  22
  23 extern unsigned int mcf_timervector;
  24 extern unsigned int mcf_profilevector;
  25 extern unsigned int mcf_timerlevel;
  26
  27 /***************************************************************************/
  28
  29 static struct mcf_platform_uart m5407_uart_platform[] = {
  30         {
  31                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  32                 .irq            = 73,
  33         },
  34         {
  35                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  36                 .irq            = 74,
  37         },
  38         { },
  39 };
  40
  41 static struct platform_device m5407_uart = {
  42         .name                   = "mcfuart",
  43         .id                     = 0,
  44         .dev.platform_data      = m5407_uart_platform,
  45 };
  46
  47 static struct platform_device *m5407_devices[] __initdata = {
  48         &m5407_uart,
  49 };
  50
  51 /***************************************************************************/
  52
  53 static void __init m5407_uart_init_line(int line, int irq)
  54 {
  55         if (line == 0) {
  56                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  57                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  58                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
  59         } else if (line == 1) {
  60                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  61                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  62                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
  63         }
  64 }
  65
  66 static void __init m5407_uarts_init(void)
  67 {
  68         const int nrlines = ARRAY_SIZE(m5407_uart_platform);
  69         int line;
  70
  71         for (line = 0; (line < nrlines); line++)
  72                 m5407_uart_init_line(line, m5407_uart_platform[line].irq);
  73 }
  74
  75 /***************************************************************************/
  76
  77 void mcf_autovector(unsigned int vec)
  78 {
  79         volatile unsigned char  *mbar;
  80
  81         if ((vec >= 25) && (vec <= 31)) {
  82                 mbar = (volatile unsigned char *) MCF_MBAR;
  83                 vec = 0x1 << (vec - 24);
  84                 *(mbar + MCFSIM_AVR) |= vec;
  85                 mcf_setimr(mcf_getimr() & ~vec);
  86         }
  87 }
  88
  89 /***************************************************************************/
  90
  91 void mcf_settimericr(unsigned int timer, unsigned int level)
  92 {
  93         volatile unsigned char *icrp;
  94         unsigned int icr, imr;
  95
  96         if (timer <= 2) {
  97                 switch (timer) {
  98                 case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
  99                 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
 100                 }
 101
 102                 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
 103                 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
 104                 mcf_setimr(mcf_getimr() & ~imr);
 105         }
 106 }
 107
 108 /***************************************************************************/
 109
 110 void m5407_cpu_reset(void)
 111 {
 112         local_irq_disable();
 113         /* set watchdog to soft reset, and enabled */
 114         __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
 115         for (;;)
 116                 /* wait for watchdog to timeout */;
 117 }
 118
 119 /***************************************************************************/
 120
 121 void __init config_BSP(char *commandp, int size)
 122 {
 123         mcf_setimr(MCFSIM_IMR_MASKALL);
 124
 125 #if defined(CONFIG_CLEOPATRA)
 126         /* Different timer setup - to prevent device clash */
 127         mcf_timervector = 30;
 128         mcf_profilevector = 31;
 129         mcf_timerlevel = 6;
 130 #endif
 131
 132         mach_reset = m5407_cpu_reset;
 133 }
 134
 135 /***************************************************************************/
 136
 137 static int __init init_BSP(void)
 138 {
 139         m5407_uarts_init();
 140         platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
 141         return 0;
 142 }
 143
 144 arch_initcall(init_BSP);
 145
 146 /***************************************************************************/