1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
4 * Copyright (c) 2019 Intel Corporation.
9 int isst_write_pm_config(int cpu
, int cp_state
)
11 unsigned int req
, resp
;
19 ret
= isst_send_mbox_command(cpu
, WRITE_PM_CONFIG
, PM_FEATURE
, 0, req
,
24 debug_printf("cpu:%d WRITE_PM_CONFIG resp:%x\n", cpu
, resp
);
29 int isst_read_pm_config(int cpu
, int *cp_state
, int *cp_cap
)
34 ret
= isst_send_mbox_command(cpu
, READ_PM_CONFIG
, PM_FEATURE
, 0, 0,
39 debug_printf("cpu:%d READ_PM_CONFIG resp:%x\n", cpu
, resp
);
41 *cp_state
= resp
& BIT(16);
42 *cp_cap
= resp
& BIT(0) ? 1 : 0;
47 int isst_get_ctdp_levels(int cpu
, struct isst_pkg_ctdp
*pkg_dev
)
52 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
53 CONFIG_TDP_GET_LEVELS_INFO
, 0, 0, &resp
);
57 pkg_dev
->current_level
= 0;
63 debug_printf("cpu:%d CONFIG_TDP_GET_LEVELS_INFO resp:%x\n", cpu
, resp
);
65 pkg_dev
->version
= resp
& 0xff;
66 pkg_dev
->levels
= (resp
>> 8) & 0xff;
67 pkg_dev
->current_level
= (resp
>> 16) & 0xff;
68 pkg_dev
->locked
= !!(resp
& BIT(24));
69 pkg_dev
->enabled
= !!(resp
& BIT(31));
74 int isst_get_ctdp_control(int cpu
, int config_index
,
75 struct isst_pkg_ctdp_level_info
*ctdp_level
)
81 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
82 CONFIG_TDP_GET_TDP_CONTROL
, 0,
87 ctdp_level
->fact_support
= resp
& BIT(0);
88 ctdp_level
->pbf_support
= !!(resp
& BIT(1));
89 ctdp_level
->fact_enabled
= !!(resp
& BIT(16));
90 ctdp_level
->pbf_enabled
= !!(resp
& BIT(17));
92 ret
= isst_read_pm_config(cpu
, &cp_state
, &cp_cap
);
94 debug_printf("cpu:%d pm_config is not supported \n", cpu
);
96 debug_printf("cpu:%d pm_config SST-CP state:%d cap:%d \n", cpu
, cp_state
, cp_cap
);
97 ctdp_level
->sst_cp_support
= cp_cap
;
98 ctdp_level
->sst_cp_enabled
= cp_state
;
102 "cpu:%d CONFIG_TDP_GET_TDP_CONTROL resp:%x fact_support:%d pbf_support: %d fact_enabled:%d pbf_enabled:%d\n",
103 cpu
, resp
, ctdp_level
->fact_support
, ctdp_level
->pbf_support
,
104 ctdp_level
->fact_enabled
, ctdp_level
->pbf_enabled
);
109 int isst_get_tdp_info(int cpu
, int config_index
,
110 struct isst_pkg_ctdp_level_info
*ctdp_level
)
115 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_GET_TDP_INFO
,
116 0, config_index
, &resp
);
118 isst_display_error_info_message(1, "Invalid level, Can't get TDP information at level", 1, config_index
);
122 ctdp_level
->pkg_tdp
= resp
& GENMASK(14, 0);
123 ctdp_level
->tdp_ratio
= (resp
& GENMASK(23, 16)) >> 16;
126 "cpu:%d ctdp:%d CONFIG_TDP_GET_TDP_INFO resp:%x tdp_ratio:%d pkg_tdp:%d\n",
127 cpu
, config_index
, resp
, ctdp_level
->tdp_ratio
,
128 ctdp_level
->pkg_tdp
);
132 int isst_get_pwr_info(int cpu
, int config_index
,
133 struct isst_pkg_ctdp_level_info
*ctdp_level
)
138 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_GET_PWR_INFO
,
139 0, config_index
, &resp
);
143 ctdp_level
->pkg_max_power
= resp
& GENMASK(14, 0);
144 ctdp_level
->pkg_min_power
= (resp
& GENMASK(30, 16)) >> 16;
147 "cpu:%d ctdp:%d CONFIG_TDP_GET_PWR_INFO resp:%x pkg_max_power:%d pkg_min_power:%d\n",
148 cpu
, config_index
, resp
, ctdp_level
->pkg_max_power
,
149 ctdp_level
->pkg_min_power
);
154 void isst_get_uncore_p0_p1_info(int cpu
, int config_index
,
155 struct isst_pkg_ctdp_level_info
*ctdp_level
)
159 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
160 CONFIG_TDP_GET_UNCORE_P0_P1_INFO
, 0,
161 config_index
, &resp
);
163 ctdp_level
->uncore_p0
= 0;
164 ctdp_level
->uncore_p1
= 0;
168 ctdp_level
->uncore_p0
= resp
& GENMASK(7, 0);
169 ctdp_level
->uncore_p1
= (resp
& GENMASK(15, 8)) >> 8;
171 "cpu:%d ctdp:%d CONFIG_TDP_GET_UNCORE_P0_P1_INFO resp:%x uncore p0:%d uncore p1:%d\n",
172 cpu
, config_index
, resp
, ctdp_level
->uncore_p0
,
173 ctdp_level
->uncore_p1
);
176 void isst_get_p1_info(int cpu
, int config_index
,
177 struct isst_pkg_ctdp_level_info
*ctdp_level
)
181 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_GET_P1_INFO
, 0,
182 config_index
, &resp
);
184 ctdp_level
->sse_p1
= 0;
185 ctdp_level
->avx2_p1
= 0;
186 ctdp_level
->avx512_p1
= 0;
190 ctdp_level
->sse_p1
= resp
& GENMASK(7, 0);
191 ctdp_level
->avx2_p1
= (resp
& GENMASK(15, 8)) >> 8;
192 ctdp_level
->avx512_p1
= (resp
& GENMASK(23, 16)) >> 16;
194 "cpu:%d ctdp:%d CONFIG_TDP_GET_P1_INFO resp:%x sse_p1:%d avx2_p1:%d avx512_p1:%d\n",
195 cpu
, config_index
, resp
, ctdp_level
->sse_p1
,
196 ctdp_level
->avx2_p1
, ctdp_level
->avx512_p1
);
199 void isst_get_uncore_mem_freq(int cpu
, int config_index
,
200 struct isst_pkg_ctdp_level_info
*ctdp_level
)
204 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_GET_MEM_FREQ
,
205 0, config_index
, &resp
);
207 ctdp_level
->mem_freq
= 0;
211 ctdp_level
->mem_freq
= resp
& GENMASK(7, 0);
213 "cpu:%d ctdp:%d CONFIG_TDP_GET_MEM_FREQ resp:%x uncore mem_freq:%d\n",
214 cpu
, config_index
, resp
, ctdp_level
->mem_freq
);
217 int isst_get_tjmax_info(int cpu
, int config_index
,
218 struct isst_pkg_ctdp_level_info
*ctdp_level
)
223 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_GET_TJMAX_INFO
,
224 0, config_index
, &resp
);
228 ctdp_level
->t_proc_hot
= resp
& GENMASK(7, 0);
231 "cpu:%d ctdp:%d CONFIG_TDP_GET_TJMAX_INFO resp:%x t_proc_hot:%d\n",
232 cpu
, config_index
, resp
, ctdp_level
->t_proc_hot
);
237 int isst_get_coremask_info(int cpu
, int config_index
,
238 struct isst_pkg_ctdp_level_info
*ctdp_level
)
243 ctdp_level
->cpu_count
= 0;
244 for (i
= 0; i
< 2; ++i
) {
245 unsigned long long mask
;
248 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
249 CONFIG_TDP_GET_CORE_MASK
, 0,
250 (i
<< 8) | config_index
, &resp
);
255 "cpu:%d ctdp:%d mask:%d CONFIG_TDP_GET_CORE_MASK resp:%x\n",
256 cpu
, config_index
, i
, resp
);
258 mask
= (unsigned long long)resp
<< (32 * i
);
259 set_cpu_mask_from_punit_coremask(cpu
, mask
,
260 ctdp_level
->core_cpumask_size
,
261 ctdp_level
->core_cpumask
,
263 ctdp_level
->cpu_count
+= cpu_count
;
264 debug_printf("cpu:%d ctdp:%d mask:%d cpu count:%d\n", cpu
,
265 config_index
, i
, ctdp_level
->cpu_count
);
271 int isst_get_get_trl_from_msr(int cpu
, int *trl
)
273 unsigned long long msr_trl
;
276 ret
= isst_send_msr_command(cpu
, 0x1AD, 0, &msr_trl
);
280 trl
[0] = msr_trl
& GENMASK(7, 0);
281 trl
[1] = (msr_trl
& GENMASK(15, 8)) >> 8;
282 trl
[2] = (msr_trl
& GENMASK(23, 16)) >> 16;
283 trl
[3] = (msr_trl
& GENMASK(31, 24)) >> 24;
284 trl
[4] = (msr_trl
& GENMASK(39, 32)) >> 32;
285 trl
[5] = (msr_trl
& GENMASK(47, 40)) >> 40;
286 trl
[6] = (msr_trl
& GENMASK(55, 48)) >> 48;
287 trl
[7] = (msr_trl
& GENMASK(63, 56)) >> 56;
292 int isst_get_get_trl(int cpu
, int level
, int avx_level
, int *trl
)
294 unsigned int req
, resp
;
297 req
= level
| (avx_level
<< 16);
298 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
299 CONFIG_TDP_GET_TURBO_LIMIT_RATIOS
, 0, req
,
305 "cpu:%d CONFIG_TDP_GET_TURBO_LIMIT_RATIOS req:%x resp:%x\n",
308 trl
[0] = resp
& GENMASK(7, 0);
309 trl
[1] = (resp
& GENMASK(15, 8)) >> 8;
310 trl
[2] = (resp
& GENMASK(23, 16)) >> 16;
311 trl
[3] = (resp
& GENMASK(31, 24)) >> 24;
313 req
= level
| BIT(8) | (avx_level
<< 16);
314 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
315 CONFIG_TDP_GET_TURBO_LIMIT_RATIOS
, 0, req
,
320 debug_printf("cpu:%d CONFIG_TDP_GET_TURBO_LIMIT req:%x resp:%x\n", cpu
,
323 trl
[4] = resp
& GENMASK(7, 0);
324 trl
[5] = (resp
& GENMASK(15, 8)) >> 8;
325 trl
[6] = (resp
& GENMASK(23, 16)) >> 16;
326 trl
[7] = (resp
& GENMASK(31, 24)) >> 24;
331 int isst_get_trl_bucket_info(int cpu
, unsigned long long *buckets_info
)
335 debug_printf("cpu:%d bucket info via MSR\n", cpu
);
339 ret
= isst_send_msr_command(cpu
, 0x1ae, 0, buckets_info
);
343 debug_printf("cpu:%d bucket info via MSR successful 0x%llx\n", cpu
,
349 int isst_set_tdp_level_msr(int cpu
, int tdp_level
)
351 unsigned long long level
= tdp_level
;
354 debug_printf("cpu: tdp_level via MSR %d\n", cpu
, tdp_level
);
356 if (isst_get_config_tdp_lock_status(cpu
)) {
357 isst_display_error_info_message(1, "tdp_locked", 0, 0);
362 return -1; /* invalid value */
364 ret
= isst_send_msr_command(cpu
, 0x64b, 1, &level
);
368 debug_printf("cpu: tdp_level via MSR successful %d\n", cpu
, tdp_level
);
373 int isst_set_tdp_level(int cpu
, int tdp_level
)
379 if (isst_get_config_tdp_lock_status(cpu
)) {
380 isst_display_error_info_message(1, "TDP is locked", 0, 0);
385 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
, CONFIG_TDP_SET_LEVEL
, 0,
388 isst_display_error_info_message(1, "Set TDP level failed for level", 1, tdp_level
);
395 int isst_get_pbf_info(int cpu
, int level
, struct isst_pbf_info
*pbf_info
)
397 struct isst_pkg_ctdp_level_info ctdp_level
;
398 struct isst_pkg_ctdp pkg_dev
;
399 int i
, ret
, max_punit_core
, max_mask_index
;
400 unsigned int req
, resp
;
402 ret
= isst_get_ctdp_levels(cpu
, &pkg_dev
);
404 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
408 if (level
> pkg_dev
.levels
) {
409 isst_display_error_info_message(1, "Invalid level", 1, level
);
413 ret
= isst_get_ctdp_control(cpu
, level
, &ctdp_level
);
417 if (!ctdp_level
.pbf_support
) {
418 isst_display_error_info_message(1, "base-freq feature is not present at this level", 1, level
);
422 pbf_info
->core_cpumask_size
= alloc_cpu_set(&pbf_info
->core_cpumask
);
424 max_punit_core
= get_max_punit_core_id(get_physical_package_id(cpu
), get_physical_die_id(cpu
));
425 max_mask_index
= max_punit_core
> 32 ? 2 : 1;
427 for (i
= 0; i
< max_mask_index
; ++i
) {
428 unsigned long long mask
;
431 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
432 CONFIG_TDP_PBF_GET_CORE_MASK_INFO
,
433 0, (i
<< 8) | level
, &resp
);
438 "cpu:%d CONFIG_TDP_PBF_GET_CORE_MASK_INFO resp:%x\n",
441 mask
= (unsigned long long)resp
<< (32 * i
);
442 set_cpu_mask_from_punit_coremask(cpu
, mask
,
443 pbf_info
->core_cpumask_size
,
444 pbf_info
->core_cpumask
,
449 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
450 CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO
, 0, req
,
455 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO resp:%x\n", cpu
,
458 pbf_info
->p1_low
= resp
& 0xff;
459 pbf_info
->p1_high
= (resp
& GENMASK(15, 8)) >> 8;
462 ret
= isst_send_mbox_command(
463 cpu
, CONFIG_TDP
, CONFIG_TDP_PBF_GET_TDP_INFO
, 0, req
, &resp
);
467 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TDP_INFO resp:%x\n", cpu
, resp
);
469 pbf_info
->tdp
= resp
& 0xffff;
472 ret
= isst_send_mbox_command(
473 cpu
, CONFIG_TDP
, CONFIG_TDP_PBF_GET_TJ_MAX_INFO
, 0, req
, &resp
);
477 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TJ_MAX_INFO resp:%x\n", cpu
,
479 pbf_info
->t_control
= (resp
>> 8) & 0xff;
480 pbf_info
->t_prochot
= resp
& 0xff;
485 void isst_get_pbf_info_complete(struct isst_pbf_info
*pbf_info
)
487 free_cpu_set(pbf_info
->core_cpumask
);
490 int isst_set_pbf_fact_status(int cpu
, int pbf
, int enable
)
492 struct isst_pkg_ctdp pkg_dev
;
493 struct isst_pkg_ctdp_level_info ctdp_level
;
495 unsigned int req
= 0, resp
;
498 ret
= isst_get_ctdp_levels(cpu
, &pkg_dev
);
500 debug_printf("cpu:%d No support for dynamic ISST\n", cpu
);
502 current_level
= pkg_dev
.current_level
;
504 ret
= isst_get_ctdp_control(cpu
, current_level
, &ctdp_level
);
509 if (ctdp_level
.fact_enabled
)
518 if (enable
&& !ctdp_level
.sst_cp_enabled
)
519 isst_display_error_info_message(0, "Make sure to execute before: core-power enable", 0, 0);
521 if (ctdp_level
.pbf_enabled
)
530 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
531 CONFIG_TDP_SET_TDP_CONTROL
, 0, req
, &resp
);
535 debug_printf("cpu:%d CONFIG_TDP_SET_TDP_CONTROL pbf/fact:%d req:%x\n",
541 int isst_get_fact_bucket_info(int cpu
, int level
,
542 struct isst_fact_bucket_info
*bucket_info
)
547 for (i
= 0; i
< 2; ++i
) {
550 ret
= isst_send_mbox_command(
552 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES
, 0,
553 (i
<< 8) | level
, &resp
);
558 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES index:%d level:%d resp:%x\n",
559 cpu
, i
, level
, resp
);
561 for (j
= 0; j
< 4; ++j
) {
562 bucket_info
[j
+ (i
* 4)].high_priority_cores_count
=
563 (resp
>> (j
* 8)) & 0xff;
567 for (k
= 0; k
< 3; ++k
) {
568 for (i
= 0; i
< 2; ++i
) {
571 ret
= isst_send_mbox_command(
573 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS
, 0,
574 (k
<< 16) | (i
<< 8) | level
, &resp
);
579 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS index:%d level:%d avx:%d resp:%x\n",
580 cpu
, i
, level
, k
, resp
);
582 for (j
= 0; j
< 4; ++j
) {
585 bucket_info
[j
+ (i
* 4)].sse_trl
=
586 (resp
>> (j
* 8)) & 0xff;
589 bucket_info
[j
+ (i
* 4)].avx_trl
=
590 (resp
>> (j
* 8)) & 0xff;
593 bucket_info
[j
+ (i
* 4)].avx512_trl
=
594 (resp
>> (j
* 8)) & 0xff;
606 int isst_get_fact_info(int cpu
, int level
, int fact_bucket
, struct isst_fact_info
*fact_info
)
608 struct isst_pkg_ctdp_level_info ctdp_level
;
609 struct isst_pkg_ctdp pkg_dev
;
613 ret
= isst_get_ctdp_levels(cpu
, &pkg_dev
);
615 isst_display_error_info_message(1, "Failed to get number of levels", 0, 0);
619 if (level
> pkg_dev
.levels
) {
620 isst_display_error_info_message(1, "Invalid level", 1, level
);
624 ret
= isst_get_ctdp_control(cpu
, level
, &ctdp_level
);
628 if (!ctdp_level
.fact_support
) {
629 isst_display_error_info_message(1, "turbo-freq feature is not present at this level", 1, level
);
633 ret
= isst_send_mbox_command(cpu
, CONFIG_TDP
,
634 CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO
, 0,
639 debug_printf("cpu:%d CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO resp:%x\n",
642 fact_info
->lp_clipping_ratio_license_sse
= resp
& 0xff;
643 fact_info
->lp_clipping_ratio_license_avx2
= (resp
>> 8) & 0xff;
644 fact_info
->lp_clipping_ratio_license_avx512
= (resp
>> 16) & 0xff;
646 ret
= isst_get_fact_bucket_info(cpu
, level
, fact_info
->bucket_info
);
651 for (j
= 0; j
< ISST_FACT_MAX_BUCKETS
; ++j
) {
652 if (fact_bucket
!= 0xff && fact_bucket
!= j
)
655 if (!fact_info
->bucket_info
[j
].high_priority_cores_count
)
661 isst_display_error_info_message(1, "Invalid bucket", 0, 0);
668 int isst_set_trl(int cpu
, unsigned long long trl
)
673 trl
= 0xFFFFFFFFFFFFFFFFULL
;
675 ret
= isst_send_msr_command(cpu
, 0x1AD, 1, &trl
);
682 int isst_set_trl_from_current_tdp(int cpu
, unsigned long long trl
)
684 unsigned long long msr_trl
;
690 struct isst_pkg_ctdp pkg_dev
;
694 ret
= isst_get_ctdp_levels(cpu
, &pkg_dev
);
698 ret
= isst_get_get_trl(cpu
, pkg_dev
.current_level
, 0, trl
);
703 for (i
= 0; i
< 8; ++i
) {
704 unsigned long long _trl
= trl
[i
];
706 msr_trl
|= (_trl
<< (i
* 8));
709 ret
= isst_send_msr_command(cpu
, 0x1AD, 1, &msr_trl
);
716 /* Return 1 if locked */
717 int isst_get_config_tdp_lock_status(int cpu
)
719 unsigned long long tdp_control
= 0;
722 ret
= isst_send_msr_command(cpu
, 0x64b, 0, &tdp_control
);
726 ret
= !!(tdp_control
& BIT(31));
731 void isst_get_process_ctdp_complete(int cpu
, struct isst_pkg_ctdp
*pkg_dev
)
735 if (!pkg_dev
->processed
)
738 for (i
= 0; i
< pkg_dev
->levels
; ++i
) {
739 struct isst_pkg_ctdp_level_info
*ctdp_level
;
741 ctdp_level
= &pkg_dev
->ctdp_level
[i
];
742 if (ctdp_level
->pbf_support
)
743 free_cpu_set(ctdp_level
->pbf_info
.core_cpumask
);
744 free_cpu_set(ctdp_level
->core_cpumask
);
748 int isst_get_process_ctdp(int cpu
, int tdp_level
, struct isst_pkg_ctdp
*pkg_dev
)
750 int i
, ret
, valid
= 0;
752 if (pkg_dev
->processed
)
755 ret
= isst_get_ctdp_levels(cpu
, pkg_dev
);
759 debug_printf("cpu: %d ctdp enable:%d current level: %d levels:%d\n",
760 cpu
, pkg_dev
->enabled
, pkg_dev
->current_level
,
763 if (tdp_level
!= 0xff && tdp_level
> pkg_dev
->levels
) {
764 isst_display_error_info_message(1, "Invalid level", 0, 0);
768 if (!pkg_dev
->enabled
)
769 isst_display_error_info_message(0, "perf-profile feature is not supported, just base-config level 0 is valid", 0, 0);
771 for (i
= 0; i
<= pkg_dev
->levels
; ++i
) {
772 struct isst_pkg_ctdp_level_info
*ctdp_level
;
774 if (tdp_level
!= 0xff && i
!= tdp_level
)
777 debug_printf("cpu:%d Get Information for TDP level:%d\n", cpu
,
779 ctdp_level
= &pkg_dev
->ctdp_level
[i
];
781 ctdp_level
->level
= i
;
782 ctdp_level
->control_cpu
= cpu
;
783 ctdp_level
->pkg_id
= get_physical_package_id(cpu
);
784 ctdp_level
->die_id
= get_physical_die_id(cpu
);
786 ret
= isst_get_ctdp_control(cpu
, i
, ctdp_level
);
791 pkg_dev
->processed
= 1;
792 ctdp_level
->processed
= 1;
794 if (ctdp_level
->pbf_support
) {
795 ret
= isst_get_pbf_info(cpu
, i
, &ctdp_level
->pbf_info
);
797 ctdp_level
->pbf_found
= 1;
800 if (ctdp_level
->fact_support
) {
801 ret
= isst_get_fact_info(cpu
, i
, 0xff,
802 &ctdp_level
->fact_info
);
807 if (!pkg_dev
->enabled
&& is_skx_based_platform()) {
810 freq
= get_cpufreq_base_freq(cpu
);
812 ctdp_level
->sse_p1
= freq
/ 100000;
813 ctdp_level
->tdp_ratio
= ctdp_level
->sse_p1
;
816 isst_get_get_trl_from_msr(cpu
, ctdp_level
->trl_sse_active_cores
);
817 isst_get_trl_bucket_info(cpu
, &ctdp_level
->buckets_info
);
821 ret
= isst_get_tdp_info(cpu
, i
, ctdp_level
);
825 ret
= isst_get_pwr_info(cpu
, i
, ctdp_level
);
829 ret
= isst_get_tjmax_info(cpu
, i
, ctdp_level
);
833 ctdp_level
->core_cpumask_size
=
834 alloc_cpu_set(&ctdp_level
->core_cpumask
);
835 ret
= isst_get_coremask_info(cpu
, i
, ctdp_level
);
839 ret
= isst_get_trl_bucket_info(cpu
, &ctdp_level
->buckets_info
);
843 ret
= isst_get_get_trl(cpu
, i
, 0,
844 ctdp_level
->trl_sse_active_cores
);
848 ret
= isst_get_get_trl(cpu
, i
, 1,
849 ctdp_level
->trl_avx_active_cores
);
853 ret
= isst_get_get_trl(cpu
, i
, 2,
854 ctdp_level
->trl_avx_512_active_cores
);
858 isst_get_uncore_p0_p1_info(cpu
, i
, ctdp_level
);
859 isst_get_p1_info(cpu
, i
, ctdp_level
);
860 isst_get_uncore_mem_freq(cpu
, i
, ctdp_level
);
864 isst_display_error_info_message(0, "Invalid level, Can't get TDP control information at specified levels on cpu", 1, cpu
);
869 int isst_clos_get_clos_information(int cpu
, int *enable
, int *type
)
874 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PM_QOS_CONFIG
, 0, 0,
879 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", cpu
, resp
);
894 int isst_pm_qos_config(int cpu
, int enable_clos
, int priority_type
)
896 unsigned int req
, resp
;
900 struct isst_pkg_ctdp pkg_dev
;
901 struct isst_pkg_ctdp_level_info ctdp_level
;
903 ret
= isst_get_ctdp_levels(cpu
, &pkg_dev
);
905 debug_printf("isst_get_ctdp_levels\n");
909 ret
= isst_get_ctdp_control(cpu
, pkg_dev
.current_level
,
914 if (ctdp_level
.fact_enabled
) {
915 isst_display_error_info_message(1, "Ignoring request, turbo-freq feature is still enabled", 0, 0);
918 ret
= isst_write_pm_config(cpu
, 0);
920 isst_display_error_info_message(0, "WRITE_PM_CONFIG command failed, ignoring error", 0, 0);
922 ret
= isst_write_pm_config(cpu
, 1);
924 isst_display_error_info_message(0, "WRITE_PM_CONFIG command failed, ignoring error", 0, 0);
927 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PM_QOS_CONFIG
, 0, 0,
930 isst_display_error_info_message(1, "CLOS_PM_QOS_CONFIG command failed", 0, 0);
934 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", cpu
, resp
);
943 if (priority_type
> 1)
944 isst_display_error_info_message(1, "Invalid priority type: Changing type to ordered", 0, 0);
951 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PM_QOS_CONFIG
,
952 BIT(MBOX_CMD_WRITE_BIT
), req
, &resp
);
956 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG priority type:%d req:%x\n", cpu
,
962 int isst_pm_get_clos(int cpu
, int clos
, struct isst_clos_config
*clos_config
)
967 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PM_CLOS
, clos
, 0,
972 clos_config
->pkg_id
= get_physical_package_id(cpu
);
973 clos_config
->die_id
= get_physical_die_id(cpu
);
975 clos_config
->epp
= resp
& 0x0f;
976 clos_config
->clos_prop_prio
= (resp
>> 4) & 0x0f;
977 clos_config
->clos_min
= (resp
>> 8) & 0xff;
978 clos_config
->clos_max
= (resp
>> 16) & 0xff;
979 clos_config
->clos_desired
= (resp
>> 24) & 0xff;
984 int isst_set_clos(int cpu
, int clos
, struct isst_clos_config
*clos_config
)
986 unsigned int req
, resp
;
990 req
= clos_config
->epp
& 0x0f;
991 req
|= (clos_config
->clos_prop_prio
& 0x0f) << 4;
992 req
|= (clos_config
->clos_min
& 0xff) << 8;
993 req
|= (clos_config
->clos_max
& 0xff) << 16;
994 req
|= (clos_config
->clos_desired
& 0xff) << 24;
996 param
= BIT(MBOX_CMD_WRITE_BIT
) | clos
;
998 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PM_CLOS
, param
, req
,
1003 debug_printf("cpu:%d CLOS_PM_CLOS param:%x req:%x\n", cpu
, param
, req
);
1008 int isst_clos_get_assoc_status(int cpu
, int *clos_id
)
1014 core_id
= find_phy_core_num(cpu
);
1017 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PQR_ASSOC
, param
, 0,
1022 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x resp:%x\n", cpu
, param
,
1024 *clos_id
= (resp
>> 16) & 0x03;
1029 int isst_clos_associate(int cpu
, int clos_id
)
1031 unsigned int req
, resp
;
1035 req
= (clos_id
& 0x03) << 16;
1036 core_id
= find_phy_core_num(cpu
);
1037 param
= BIT(MBOX_CMD_WRITE_BIT
) | core_id
;
1039 ret
= isst_send_mbox_command(cpu
, CONFIG_CLOS
, CLOS_PQR_ASSOC
, param
,
1044 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x req:%x\n", cpu
, param
,