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watchdog/core: Rename some softlockup_* functions
[linux/fpc-iii.git] / drivers / net / phy / marvell.c
blob15cbcdba618a81363765a78217f4d875518386cc
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E1318S_PHY_MSCR1_REG 16
100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
101
102 /* Copper Specific Interrupt Enable Register */
103 #define MII_88E1318S_PHY_CSIER 0x12
104 /* WOL Event Interrupt Enable */
105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
106
107 /* LED Timer Control Register */
108 #define MII_88E1318S_PHY_LED_TCR 0x12
109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
112
113 /* Magic Packet MAC address registers */
114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
117
118 #define MII_88E1318S_PHY_WOL_CTRL 0x10
119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
121
122 #define MII_88E1121_PHY_LED_CTRL 16
123 #define MII_88E1121_PHY_LED_DEF 0x0030
124
125 #define MII_M1011_PHY_STATUS 0x11
126 #define MII_M1011_PHY_STATUS_1000 0x8000
127 #define MII_M1011_PHY_STATUS_100 0x4000
128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131 #define MII_M1011_PHY_STATUS_LINK 0x0400
132
133 #define MII_88E3016_PHY_SPEC_CTRL 0x10
134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
136
137 #define MII_88E1510_GEN_CTRL_REG_1 0x14
138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
141
142 #define LPA_FIBER_1000HALF 0x40
143 #define LPA_FIBER_1000FULL 0x20
144
145 #define LPA_PAUSE_FIBER 0x180
146 #define LPA_PAUSE_ASYM_FIBER 0x100
147
148 #define ADVERTISE_FIBER_1000HALF 0x40
149 #define ADVERTISE_FIBER_1000FULL 0x20
150
151 #define ADVERTISE_PAUSE_FIBER 0x180
152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
153
154 #define REGISTER_LINK_STATUS 0x400
155 #define NB_FIBER_STATS 1
156
157 MODULE_DESCRIPTION("Marvell PHY driver");
158 MODULE_AUTHOR("Andy Fleming");
159 MODULE_LICENSE("GPL");
160
161 struct marvell_hw_stat {
162 const char *string;
163 u8 page;
164 u8 reg;
165 u8 bits;
166 };
167
168 static struct marvell_hw_stat marvell_hw_stats[] = {
169 { "phy_receive_errors_copper", 0, 21, 16},
170 { "phy_idle_errors", 0, 10, 8 },
171 { "phy_receive_errors_fiber", 1, 21, 16},
172 };
173
174 struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
176 char *hwmon_name;
177 struct device *hwmon_dev;
178 };
179
180 static int marvell_get_page(struct phy_device *phydev)
181 {
182 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
183 }
184
185 static int marvell_set_page(struct phy_device *phydev, int page)
186 {
187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
188 }
189
190 static int marvell_get_set_page(struct phy_device *phydev, int page)
191 {
192 int oldpage = marvell_get_page(phydev);
193
194 if (oldpage < 0)
195 return oldpage;
196
197 if (page != oldpage)
198 return marvell_set_page(phydev, page);
199
200 return 0;
201 }
202
203 static int marvell_ack_interrupt(struct phy_device *phydev)
204 {
205 int err;
206
207 /* Clear the interrupts by reading the reg */
208 err = phy_read(phydev, MII_M1011_IEVENT);
209
210 if (err < 0)
211 return err;
212
213 return 0;
214 }
215
216 static int marvell_config_intr(struct phy_device *phydev)
217 {
218 int err;
219
220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
221 err = phy_write(phydev, MII_M1011_IMASK,
222 MII_M1011_IMASK_INIT);
223 else
224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_CLEAR);
226
227 return err;
228 }
229
230 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
231 {
232 int reg;
233 int err;
234 int val;
235
236 /* get the current settings */
237 reg = phy_read(phydev, MII_M1011_PHY_SCR);
238 if (reg < 0)
239 return reg;
240
241 val = reg;
242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
243 switch (polarity) {
244 case ETH_TP_MDI:
245 val |= MII_M1011_PHY_SCR_MDI;
246 break;
247 case ETH_TP_MDI_X:
248 val |= MII_M1011_PHY_SCR_MDI_X;
249 break;
250 case ETH_TP_MDI_AUTO:
251 case ETH_TP_MDI_INVALID:
252 default:
253 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
254 break;
255 }
256
257 if (val != reg) {
258 /* Set the new polarity value in the register */
259 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
260 if (err)
261 return err;
262 }
263
264 return 0;
265 }
266
267 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
268 u8 retries)
269 {
270 int reg;
271
272 reg = phy_read(phydev, MII_M1011_PHY_SCR);
273 if (reg < 0)
274 return reg;
275
276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
278 if (enable)
279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
280
281 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
282 }
283
284 static int marvell_config_aneg(struct phy_device *phydev)
285 {
286 int err;
287
288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
289 if (err < 0)
290 return err;
291
292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
293 MII_M1111_PHY_LED_DIRECT);
294 if (err < 0)
295 return err;
296
297 err = genphy_config_aneg(phydev);
298 if (err < 0)
299 return err;
300
301 if (phydev->autoneg != AUTONEG_ENABLE) {
302 /* A write to speed/duplex bits (that is performed by
303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
305 */
306 err = genphy_soft_reset(phydev);
307 if (err < 0)
308 return err;
309 }
310
311 return 0;
312 }
313
314 static int m88e1101_config_aneg(struct phy_device *phydev)
315 {
316 int err;
317
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
321 */
322 err = genphy_soft_reset(phydev);
323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x1f);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0x200c);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1d, 0x5);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1e, 0);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0x100);
343 if (err < 0)
344 return err;
345
346 return marvell_config_aneg(phydev);
347 }
348
349 static int m88e1111_config_aneg(struct phy_device *phydev)
350 {
351 int err;
352
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
356 */
357 err = genphy_soft_reset(phydev);
358
359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
360 if (err < 0)
361 return err;
362
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
365 if (err < 0)
366 return err;
367
368 err = genphy_config_aneg(phydev);
369 if (err < 0)
370 return err;
371
372 if (phydev->autoneg != AUTONEG_ENABLE) {
373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
376 */
377 err = genphy_soft_reset(phydev);
378 if (err < 0)
379 return err;
380 }
381
382 return 0;
383 }
384
385 #ifdef CONFIG_OF_MDIO
386 /* Set and/or override some configuration registers based on the
387 * marvell,reg-init property stored in the of_node for the phydev.
388 *
389 * marvell,reg-init = <reg-page reg mask value>,...;
390 *
391 * There may be one or more sets of <reg-page reg mask value>:
392 *
393 * reg-page: which register bank to use.
394 * reg: the register.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
397 *
398 */
399 static int marvell_of_reg_init(struct phy_device *phydev)
400 {
401 const __be32 *paddr;
402 int len, i, saved_page, current_page, ret;
403
404 if (!phydev->mdio.dev.of_node)
405 return 0;
406
407 paddr = of_get_property(phydev->mdio.dev.of_node,
408 "marvell,reg-init", &len);
409 if (!paddr || len < (4 * sizeof(*paddr)))
410 return 0;
411
412 saved_page = marvell_get_page(phydev);
413 if (saved_page < 0)
414 return saved_page;
415 current_page = saved_page;
416
417 ret = 0;
418 len /= sizeof(*paddr);
419 for (i = 0; i < len - 3; i += 4) {
420 u16 page = be32_to_cpup(paddr + i);
421 u16 reg = be32_to_cpup(paddr + i + 1);
422 u16 mask = be32_to_cpup(paddr + i + 2);
423 u16 val_bits = be32_to_cpup(paddr + i + 3);
424 int val;
425
426 if (page != current_page) {
427 current_page = page;
428 ret = marvell_set_page(phydev, page);
429 if (ret < 0)
430 goto err;
431 }
432
433 val = 0;
434 if (mask) {
435 val = phy_read(phydev, reg);
436 if (val < 0) {
437 ret = val;
438 goto err;
439 }
440 val &= mask;
441 }
442 val |= val_bits;
443
444 ret = phy_write(phydev, reg, val);
445 if (ret < 0)
446 goto err;
447 }
448 err:
449 if (current_page != saved_page) {
450 i = marvell_set_page(phydev, saved_page);
451 if (ret == 0)
452 ret = i;
453 }
454 return ret;
455 }
456 #else
457 static int marvell_of_reg_init(struct phy_device *phydev)
458 {
459 return 0;
460 }
461 #endif /* CONFIG_OF_MDIO */
462
463 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
464 {
465 int err, oldpage, mscr;
466
467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
468 if (oldpage < 0)
469 return oldpage;
470
471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
472 if (mscr < 0) {
473 err = mscr;
474 goto out;
475 }
476
477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
478
479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
481 MII_88E1121_PHY_MSCR_TX_DELAY);
482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
486
487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
488
489 out:
490 marvell_set_page(phydev, oldpage);
491
492 return err;
493 }
494
495 static int m88e1121_config_aneg(struct phy_device *phydev)
496 {
497 int err = 0;
498
499 if (phy_interface_is_rgmii(phydev)) {
500 err = m88e1121_config_aneg_rgmii_delays(phydev);
501 if (err)
502 return err;
503 }
504
505 err = genphy_soft_reset(phydev);
506 if (err < 0)
507 return err;
508
509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
510 if (err < 0)
511 return err;
512
513 return genphy_config_aneg(phydev);
514 }
515
516 static int m88e1318_config_aneg(struct phy_device *phydev)
517 {
518 int err, oldpage, mscr;
519
520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
521 if (oldpage < 0)
522 return oldpage;
523
524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
526
527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
528 if (err < 0)
529 return err;
530
531 err = marvell_set_page(phydev, oldpage);
532 if (err < 0)
533 return err;
534
535 return m88e1121_config_aneg(phydev);
536 }
537
538 /**
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
541 *
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
545 */
546 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
547 {
548 u32 result = 0;
549
550 if (ethadv & ADVERTISED_1000baseT_Half)
551 result |= ADVERTISE_FIBER_1000HALF;
552 if (ethadv & ADVERTISED_1000baseT_Full)
553 result |= ADVERTISE_FIBER_1000FULL;
554
555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
556 result |= LPA_PAUSE_ASYM_FIBER;
557 else if (ethadv & ADVERTISE_PAUSE_CAP)
558 result |= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER));
560
561 return result;
562 }
563
564 /**
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
567 *
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
572 */
573 static int marvell_config_aneg_fiber(struct phy_device *phydev)
574 {
575 int changed = 0;
576 int err;
577 int adv, oldadv;
578 u32 advertise;
579
580 if (phydev->autoneg != AUTONEG_ENABLE)
581 return genphy_setup_forced(phydev);
582
583 /* Only allow advertising what this PHY supports */
584 phydev->advertising &= phydev->supported;
585 advertise = phydev->advertising;
586
587 /* Setup fiber advertisement */
588 adv = phy_read(phydev, MII_ADVERTISE);
589 if (adv < 0)
590 return adv;
591
592 oldadv = adv;
593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
594 | LPA_PAUSE_FIBER);
595 adv |= ethtool_adv_to_fiber_adv_t(advertise);
596
597 if (adv != oldadv) {
598 err = phy_write(phydev, MII_ADVERTISE, adv);
599 if (err < 0)
600 return err;
601
602 changed = 1;
603 }
604
605 if (changed == 0) {
606 /* Advertisement hasn't changed, but maybe aneg was never on to
607 * begin with? Or maybe phy was isolated?
608 */
609 int ctl = phy_read(phydev, MII_BMCR);
610
611 if (ctl < 0)
612 return ctl;
613
614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
615 changed = 1; /* do restart aneg */
616 }
617
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
620 */
621 if (changed > 0)
622 changed = genphy_restart_aneg(phydev);
623
624 return changed;
625 }
626
627 static int m88e1510_config_aneg(struct phy_device *phydev)
628 {
629 int err;
630
631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
632 if (err < 0)
633 goto error;
634
635 /* Configure the copper link first */
636 err = m88e1318_config_aneg(phydev);
637 if (err < 0)
638 goto error;
639
640 /* Then the fiber link */
641 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
642 if (err < 0)
643 goto error;
644
645 err = marvell_config_aneg_fiber(phydev);
646 if (err < 0)
647 goto error;
648
649 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
650
651 error:
652 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
653 return err;
654 }
655
656 static int marvell_config_init(struct phy_device *phydev)
657 {
658 /* Set registers from marvell,reg-init DT property */
659 return marvell_of_reg_init(phydev);
660 }
661
662 static int m88e1116r_config_init(struct phy_device *phydev)
663 {
664 int err;
665
666 err = genphy_soft_reset(phydev);
667 if (err < 0)
668 return err;
669
670 mdelay(500);
671
672 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
673 if (err < 0)
674 return err;
675
676 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
677 if (err < 0)
678 return err;
679
680 err = marvell_set_downshift(phydev, true, 8);
681 if (err < 0)
682 return err;
683
684 err = m88e1121_config_aneg_rgmii_delays(phydev);
685 if (err < 0)
686 return err;
687
688 err = genphy_soft_reset(phydev);
689 if (err < 0)
690 return err;
691
692 return marvell_config_init(phydev);
693 }
694
695 static int m88e3016_config_init(struct phy_device *phydev)
696 {
697 int reg;
698
699 /* Enable Scrambler and Auto-Crossover */
700 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
701 if (reg < 0)
702 return reg;
703
704 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
705 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
706
707 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
708 if (reg < 0)
709 return reg;
710
711 return marvell_config_init(phydev);
712 }
713
714 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
715 u16 mode,
716 int fibre_copper_auto)
717 {
718 int temp;
719
720 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
721 if (temp < 0)
722 return temp;
723
724 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
725 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
726 MII_M1111_HWCFG_FIBER_COPPER_RES);
727 temp |= mode;
728
729 if (fibre_copper_auto)
730 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
731
732 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
733 }
734
735 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
736 {
737 int temp;
738
739 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
740 if (temp < 0)
741 return temp;
742
743 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
744 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
745 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
746 temp &= ~MII_M1111_RGMII_TX_DELAY;
747 temp |= MII_M1111_RGMII_RX_DELAY;
748 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
749 temp &= ~MII_M1111_RGMII_RX_DELAY;
750 temp |= MII_M1111_RGMII_TX_DELAY;
751 }
752
753 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
754 }
755
756 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
757 {
758 int temp;
759 int err;
760
761 err = m88e1111_config_init_rgmii_delays(phydev);
762 if (err < 0)
763 return err;
764
765 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
766 if (temp < 0)
767 return temp;
768
769 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
770
771 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
772 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
773 else
774 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
775
776 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
777 }
778
779 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
780 {
781 int err;
782
783 err = m88e1111_config_init_hwcfg_mode(
784 phydev,
785 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
786 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
787 if (err < 0)
788 return err;
789
790 /* make sure copper is selected */
791 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
792 }
793
794 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
795 {
796 int err;
797
798 err = m88e1111_config_init_rgmii_delays(phydev);
799 if (err)
800 return err;
801
802 err = m88e1111_config_init_hwcfg_mode(
803 phydev,
804 MII_M1111_HWCFG_MODE_RTBI,
805 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
806 if (err < 0)
807 return err;
808
809 /* soft reset */
810 err = genphy_soft_reset(phydev);
811 if (err < 0)
812 return err;
813
814 return m88e1111_config_init_hwcfg_mode(
815 phydev,
816 MII_M1111_HWCFG_MODE_RTBI,
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
818 }
819
820 static int m88e1111_config_init(struct phy_device *phydev)
821 {
822 int err;
823
824 if (phy_interface_is_rgmii(phydev)) {
825 err = m88e1111_config_init_rgmii(phydev);
826 if (err)
827 return err;
828 }
829
830 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
831 err = m88e1111_config_init_sgmii(phydev);
832 if (err < 0)
833 return err;
834 }
835
836 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
837 err = m88e1111_config_init_rtbi(phydev);
838 if (err < 0)
839 return err;
840 }
841
842 err = marvell_of_reg_init(phydev);
843 if (err < 0)
844 return err;
845
846 return genphy_soft_reset(phydev);
847 }
848
849 static int m88e1121_config_init(struct phy_device *phydev)
850 {
851 int err, oldpage;
852
853 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
854 if (oldpage < 0)
855 return oldpage;
856
857 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
858 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
859 MII_88E1121_PHY_LED_DEF);
860 if (err < 0)
861 return err;
862
863 marvell_set_page(phydev, oldpage);
864
865 /* Set marvell,reg-init configuration from device tree */
866 return marvell_config_init(phydev);
867 }
868
869 static int m88e1510_config_init(struct phy_device *phydev)
870 {
871 int err;
872 int temp;
873
874 /* SGMII-to-Copper mode initialization */
875 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
876 /* Select page 18 */
877 err = marvell_set_page(phydev, 18);
878 if (err < 0)
879 return err;
880
881 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
882 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
883 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
884 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
885 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
886 if (err < 0)
887 return err;
888
889 /* PHY reset is necessary after changing MODE[2:0] */
890 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
891 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
892 if (err < 0)
893 return err;
894
895 /* Reset page selection */
896 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
897 if (err < 0)
898 return err;
899 }
900
901 return m88e1121_config_init(phydev);
902 }
903
904 static int m88e1118_config_aneg(struct phy_device *phydev)
905 {
906 int err;
907
908 err = genphy_soft_reset(phydev);
909 if (err < 0)
910 return err;
911
912 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
913 if (err < 0)
914 return err;
915
916 err = genphy_config_aneg(phydev);
917 return 0;
918 }
919
920 static int m88e1118_config_init(struct phy_device *phydev)
921 {
922 int err;
923
924 /* Change address */
925 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
926 if (err < 0)
927 return err;
928
929 /* Enable 1000 Mbit */
930 err = phy_write(phydev, 0x15, 0x1070);
931 if (err < 0)
932 return err;
933
934 /* Change address */
935 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
936 if (err < 0)
937 return err;
938
939 /* Adjust LED Control */
940 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
941 err = phy_write(phydev, 0x10, 0x1100);
942 else
943 err = phy_write(phydev, 0x10, 0x021e);
944 if (err < 0)
945 return err;
946
947 err = marvell_of_reg_init(phydev);
948 if (err < 0)
949 return err;
950
951 /* Reset address */
952 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
953 if (err < 0)
954 return err;
955
956 return genphy_soft_reset(phydev);
957 }
958
959 static int m88e1149_config_init(struct phy_device *phydev)
960 {
961 int err;
962
963 /* Change address */
964 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
965 if (err < 0)
966 return err;
967
968 /* Enable 1000 Mbit */
969 err = phy_write(phydev, 0x15, 0x1048);
970 if (err < 0)
971 return err;
972
973 err = marvell_of_reg_init(phydev);
974 if (err < 0)
975 return err;
976
977 /* Reset address */
978 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
979 if (err < 0)
980 return err;
981
982 return genphy_soft_reset(phydev);
983 }
984
985 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
986 {
987 int temp;
988 int err;
989
990 err = m88e1111_config_init_rgmii_delays(phydev);
991 if (err < 0)
992 return err;
993
994 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
995 err = phy_write(phydev, 0x1d, 0x0012);
996 if (err < 0)
997 return err;
998
999 temp = phy_read(phydev, 0x1e);
1000 if (temp < 0)
1001 return temp;
1002
1003 temp &= 0xf03f;
1004 temp |= 2 << 9; /* 36 ohm */
1005 temp |= 2 << 6; /* 39 ohm */
1006
1007 err = phy_write(phydev, 0x1e, temp);
1008 if (err < 0)
1009 return err;
1010
1011 err = phy_write(phydev, 0x1d, 0x3);
1012 if (err < 0)
1013 return err;
1014
1015 err = phy_write(phydev, 0x1e, 0x8000);
1016 }
1017 return err;
1018 }
1019
1020 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1021 {
1022 return m88e1111_config_init_hwcfg_mode(
1023 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1024 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1025 }
1026
1027 static int m88e1145_config_init(struct phy_device *phydev)
1028 {
1029 int err;
1030
1031 /* Take care of errata E0 & E1 */
1032 err = phy_write(phydev, 0x1d, 0x001b);
1033 if (err < 0)
1034 return err;
1035
1036 err = phy_write(phydev, 0x1e, 0x418f);
1037 if (err < 0)
1038 return err;
1039
1040 err = phy_write(phydev, 0x1d, 0x0016);
1041 if (err < 0)
1042 return err;
1043
1044 err = phy_write(phydev, 0x1e, 0xa2da);
1045 if (err < 0)
1046 return err;
1047
1048 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1049 err = m88e1145_config_init_rgmii(phydev);
1050 if (err < 0)
1051 return err;
1052 }
1053
1054 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1055 err = m88e1145_config_init_sgmii(phydev);
1056 if (err < 0)
1057 return err;
1058 }
1059
1060 err = marvell_of_reg_init(phydev);
1061 if (err < 0)
1062 return err;
1063
1064 return 0;
1065 }
1066
1067 /**
1068 * fiber_lpa_to_ethtool_lpa_t
1069 * @lpa: value of the MII_LPA register for fiber link
1070 *
1071 * A small helper function that translates MII_LPA
1072 * bits to ethtool LP advertisement settings.
1073 */
1074 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1075 {
1076 u32 result = 0;
1077
1078 if (lpa & LPA_FIBER_1000HALF)
1079 result |= ADVERTISED_1000baseT_Half;
1080 if (lpa & LPA_FIBER_1000FULL)
1081 result |= ADVERTISED_1000baseT_Full;
1082
1083 return result;
1084 }
1085
1086 /**
1087 * marvell_update_link - update link status in real time in @phydev
1088 * @phydev: target phy_device struct
1089 *
1090 * Description: Update the value in phydev->link to reflect the
1091 * current link value.
1092 */
1093 static int marvell_update_link(struct phy_device *phydev, int fiber)
1094 {
1095 int status;
1096
1097 /* Use the generic register for copper link, or specific
1098 * register for fiber case
1099 */
1100 if (fiber) {
1101 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1102 if (status < 0)
1103 return status;
1104
1105 if ((status & REGISTER_LINK_STATUS) == 0)
1106 phydev->link = 0;
1107 else
1108 phydev->link = 1;
1109 } else {
1110 return genphy_update_link(phydev);
1111 }
1112
1113 return 0;
1114 }
1115
1116 static int marvell_read_status_page_an(struct phy_device *phydev,
1117 int fiber)
1118 {
1119 int status;
1120 int lpa;
1121 int lpagb;
1122
1123 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1124 if (status < 0)
1125 return status;
1126
1127 lpa = phy_read(phydev, MII_LPA);
1128 if (lpa < 0)
1129 return lpa;
1130
1131 lpagb = phy_read(phydev, MII_STAT1000);
1132 if (lpagb < 0)
1133 return lpagb;
1134
1135 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1136 phydev->duplex = DUPLEX_FULL;
1137 else
1138 phydev->duplex = DUPLEX_HALF;
1139
1140 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1141 phydev->pause = 0;
1142 phydev->asym_pause = 0;
1143
1144 switch (status) {
1145 case MII_M1011_PHY_STATUS_1000:
1146 phydev->speed = SPEED_1000;
1147 break;
1148
1149 case MII_M1011_PHY_STATUS_100:
1150 phydev->speed = SPEED_100;
1151 break;
1152
1153 default:
1154 phydev->speed = SPEED_10;
1155 break;
1156 }
1157
1158 if (!fiber) {
1159 phydev->lp_advertising =
1160 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1161 mii_lpa_to_ethtool_lpa_t(lpa);
1162
1163 if (phydev->duplex == DUPLEX_FULL) {
1164 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1165 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1166 }
1167 } else {
1168 /* The fiber link is only 1000M capable */
1169 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1170
1171 if (phydev->duplex == DUPLEX_FULL) {
1172 if (!(lpa & LPA_PAUSE_FIBER)) {
1173 phydev->pause = 0;
1174 phydev->asym_pause = 0;
1175 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1176 phydev->pause = 1;
1177 phydev->asym_pause = 1;
1178 } else {
1179 phydev->pause = 1;
1180 phydev->asym_pause = 0;
1181 }
1182 }
1183 }
1184 return 0;
1185 }
1186
1187 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1188 {
1189 int bmcr = phy_read(phydev, MII_BMCR);
1190
1191 if (bmcr < 0)
1192 return bmcr;
1193
1194 if (bmcr & BMCR_FULLDPLX)
1195 phydev->duplex = DUPLEX_FULL;
1196 else
1197 phydev->duplex = DUPLEX_HALF;
1198
1199 if (bmcr & BMCR_SPEED1000)
1200 phydev->speed = SPEED_1000;
1201 else if (bmcr & BMCR_SPEED100)
1202 phydev->speed = SPEED_100;
1203 else
1204 phydev->speed = SPEED_10;
1205
1206 phydev->pause = 0;
1207 phydev->asym_pause = 0;
1208 phydev->lp_advertising = 0;
1209
1210 return 0;
1211 }
1212
1213 /* marvell_read_status_page
1214 *
1215 * Description:
1216 * Check the link, then figure out the current state
1217 * by comparing what we advertise with what the link partner
1218 * advertises. Start by checking the gigabit possibilities,
1219 * then move on to 10/100.
1220 */
1221 static int marvell_read_status_page(struct phy_device *phydev, int page)
1222 {
1223 int fiber;
1224 int err;
1225
1226 /* Detect and update the link, but return if there
1227 * was an error
1228 */
1229 if (page == MII_MARVELL_FIBER_PAGE)
1230 fiber = 1;
1231 else
1232 fiber = 0;
1233
1234 err = marvell_update_link(phydev, fiber);
1235 if (err)
1236 return err;
1237
1238 if (phydev->autoneg == AUTONEG_ENABLE)
1239 err = marvell_read_status_page_an(phydev, fiber);
1240 else
1241 err = marvell_read_status_page_fixed(phydev);
1242
1243 return err;
1244 }
1245
1246 /* marvell_read_status
1247 *
1248 * Some Marvell's phys have two modes: fiber and copper.
1249 * Both need status checked.
1250 * Description:
1251 * First, check the fiber link and status.
1252 * If the fiber link is down, check the copper link and status which
1253 * will be the default value if both link are down.
1254 */
1255 static int marvell_read_status(struct phy_device *phydev)
1256 {
1257 int err;
1258
1259 /* Check the fiber mode first */
1260 if (phydev->supported & SUPPORTED_FIBRE &&
1261 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1262 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1263 if (err < 0)
1264 goto error;
1265
1266 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1267 if (err < 0)
1268 goto error;
1269
1270 /* If the fiber link is up, it is the selected and
1271 * used link. In this case, we need to stay in the
1272 * fiber page. Please to be careful about that, avoid
1273 * to restore Copper page in other functions which
1274 * could break the behaviour for some fiber phy like
1275 * 88E1512.
1276 */
1277 if (phydev->link)
1278 return 0;
1279
1280 /* If fiber link is down, check and save copper mode state */
1281 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1282 if (err < 0)
1283 goto error;
1284 }
1285
1286 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1287
1288 error:
1289 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1290 return err;
1291 }
1292
1293 /* marvell_suspend
1294 *
1295 * Some Marvell's phys have two modes: fiber and copper.
1296 * Both need to be suspended
1297 */
1298 static int marvell_suspend(struct phy_device *phydev)
1299 {
1300 int err;
1301
1302 /* Suspend the fiber mode first */
1303 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1304 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1305 if (err < 0)
1306 goto error;
1307
1308 /* With the page set, use the generic suspend */
1309 err = genphy_suspend(phydev);
1310 if (err < 0)
1311 goto error;
1312
1313 /* Then, the copper link */
1314 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1315 if (err < 0)
1316 goto error;
1317 }
1318
1319 /* With the page set, use the generic suspend */
1320 return genphy_suspend(phydev);
1321
1322 error:
1323 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1324 return err;
1325 }
1326
1327 /* marvell_resume
1328 *
1329 * Some Marvell's phys have two modes: fiber and copper.
1330 * Both need to be resumed
1331 */
1332 static int marvell_resume(struct phy_device *phydev)
1333 {
1334 int err;
1335
1336 /* Resume the fiber mode first */
1337 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1338 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1339 if (err < 0)
1340 goto error;
1341
1342 /* With the page set, use the generic resume */
1343 err = genphy_resume(phydev);
1344 if (err < 0)
1345 goto error;
1346
1347 /* Then, the copper link */
1348 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1349 if (err < 0)
1350 goto error;
1351 }
1352
1353 /* With the page set, use the generic resume */
1354 return genphy_resume(phydev);
1355
1356 error:
1357 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1358 return err;
1359 }
1360
1361 static int marvell_aneg_done(struct phy_device *phydev)
1362 {
1363 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1364
1365 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1366 }
1367
1368 static int m88e1121_did_interrupt(struct phy_device *phydev)
1369 {
1370 int imask;
1371
1372 imask = phy_read(phydev, MII_M1011_IEVENT);
1373
1374 if (imask & MII_M1011_IMASK_INIT)
1375 return 1;
1376
1377 return 0;
1378 }
1379
1380 static void m88e1318_get_wol(struct phy_device *phydev,
1381 struct ethtool_wolinfo *wol)
1382 {
1383 wol->supported = WAKE_MAGIC;
1384 wol->wolopts = 0;
1385
1386 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
1387 return;
1388
1389 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1390 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1391 wol->wolopts |= WAKE_MAGIC;
1392
1393 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
1394 return;
1395 }
1396
1397 static int m88e1318_set_wol(struct phy_device *phydev,
1398 struct ethtool_wolinfo *wol)
1399 {
1400 int err, oldpage, temp;
1401
1402 oldpage = marvell_get_page(phydev);
1403
1404 if (wol->wolopts & WAKE_MAGIC) {
1405 /* Explicitly switch to page 0x00, just to be sure */
1406 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1407 if (err < 0)
1408 return err;
1409
1410 /* Enable the WOL interrupt */
1411 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1412 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1413 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1414 if (err < 0)
1415 return err;
1416
1417 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1418 if (err < 0)
1419 return err;
1420
1421 /* Setup LED[2] as interrupt pin (active low) */
1422 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1423 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1424 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1425 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1426 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1427 if (err < 0)
1428 return err;
1429
1430 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1431 if (err < 0)
1432 return err;
1433
1434 /* Store the device address for the magic packet */
1435 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1436 ((phydev->attached_dev->dev_addr[5] << 8) |
1437 phydev->attached_dev->dev_addr[4]));
1438 if (err < 0)
1439 return err;
1440 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1441 ((phydev->attached_dev->dev_addr[3] << 8) |
1442 phydev->attached_dev->dev_addr[2]));
1443 if (err < 0)
1444 return err;
1445 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1446 ((phydev->attached_dev->dev_addr[1] << 8) |
1447 phydev->attached_dev->dev_addr[0]));
1448 if (err < 0)
1449 return err;
1450
1451 /* Clear WOL status and enable magic packet matching */
1452 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1453 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1454 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1455 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1456 if (err < 0)
1457 return err;
1458 } else {
1459 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1460 if (err < 0)
1461 return err;
1462
1463 /* Clear WOL status and disable magic packet matching */
1464 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1465 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1466 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1467 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1468 if (err < 0)
1469 return err;
1470 }
1471
1472 err = marvell_set_page(phydev, oldpage);
1473 if (err < 0)
1474 return err;
1475
1476 return 0;
1477 }
1478
1479 static int marvell_get_sset_count(struct phy_device *phydev)
1480 {
1481 if (phydev->supported & SUPPORTED_FIBRE)
1482 return ARRAY_SIZE(marvell_hw_stats);
1483 else
1484 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1485 }
1486
1487 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1488 {
1489 int i;
1490
1491 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1492 memcpy(data + i * ETH_GSTRING_LEN,
1493 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1494 }
1495 }
1496
1497 #ifndef UINT64_MAX
1498 #define UINT64_MAX (u64)(~((u64)0))
1499 #endif
1500 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1501 {
1502 struct marvell_hw_stat stat = marvell_hw_stats[i];
1503 struct marvell_priv *priv = phydev->priv;
1504 int oldpage, val;
1505 u64 ret;
1506
1507 oldpage = marvell_get_set_page(phydev, stat.page);
1508 if (oldpage < 0)
1509 return UINT64_MAX;
1510
1511 val = phy_read(phydev, stat.reg);
1512 if (val < 0) {
1513 ret = UINT64_MAX;
1514 } else {
1515 val = val & ((1 << stat.bits) - 1);
1516 priv->stats[i] += val;
1517 ret = priv->stats[i];
1518 }
1519
1520 marvell_set_page(phydev, oldpage);
1521
1522 return ret;
1523 }
1524
1525 static void marvell_get_stats(struct phy_device *phydev,
1526 struct ethtool_stats *stats, u64 *data)
1527 {
1528 int i;
1529
1530 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1531 data[i] = marvell_get_stat(phydev, i);
1532 }
1533
1534 #ifdef CONFIG_HWMON
1535 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1536 {
1537 int oldpage;
1538 int ret;
1539 int val;
1540
1541 *temp = 0;
1542
1543 mutex_lock(&phydev->lock);
1544
1545 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1546 if (oldpage < 0) {
1547 mutex_unlock(&phydev->lock);
1548 return oldpage;
1549 }
1550
1551 /* Enable temperature sensor */
1552 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1553 if (ret < 0)
1554 goto error;
1555
1556 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1557 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1558 if (ret < 0)
1559 goto error;
1560
1561 /* Wait for temperature to stabilize */
1562 usleep_range(10000, 12000);
1563
1564 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1565 if (val < 0) {
1566 ret = val;
1567 goto error;
1568 }
1569
1570 /* Disable temperature sensor */
1571 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1572 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1573 if (ret < 0)
1574 goto error;
1575
1576 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1577
1578 error:
1579 marvell_set_page(phydev, oldpage);
1580 mutex_unlock(&phydev->lock);
1581
1582 return ret;
1583 }
1584
1585 static int m88e1121_hwmon_read(struct device *dev,
1586 enum hwmon_sensor_types type,
1587 u32 attr, int channel, long *temp)
1588 {
1589 struct phy_device *phydev = dev_get_drvdata(dev);
1590 int err;
1591
1592 switch (attr) {
1593 case hwmon_temp_input:
1594 err = m88e1121_get_temp(phydev, temp);
1595 break;
1596 default:
1597 return -EOPNOTSUPP;
1598 }
1599
1600 return err;
1601 }
1602
1603 static umode_t m88e1121_hwmon_is_visible(const void *data,
1604 enum hwmon_sensor_types type,
1605 u32 attr, int channel)
1606 {
1607 if (type != hwmon_temp)
1608 return 0;
1609
1610 switch (attr) {
1611 case hwmon_temp_input:
1612 return 0444;
1613 default:
1614 return 0;
1615 }
1616 }
1617
1618 static u32 m88e1121_hwmon_chip_config[] = {
1619 HWMON_C_REGISTER_TZ,
1620 0
1621 };
1622
1623 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1624 .type = hwmon_chip,
1625 .config = m88e1121_hwmon_chip_config,
1626 };
1627
1628 static u32 m88e1121_hwmon_temp_config[] = {
1629 HWMON_T_INPUT,
1630 0
1631 };
1632
1633 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1634 .type = hwmon_temp,
1635 .config = m88e1121_hwmon_temp_config,
1636 };
1637
1638 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1639 &m88e1121_hwmon_chip,
1640 &m88e1121_hwmon_temp,
1641 NULL
1642 };
1643
1644 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1645 .is_visible = m88e1121_hwmon_is_visible,
1646 .read = m88e1121_hwmon_read,
1647 };
1648
1649 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1650 .ops = &m88e1121_hwmon_hwmon_ops,
1651 .info = m88e1121_hwmon_info,
1652 };
1653
1654 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1655 {
1656 int oldpage;
1657 int ret;
1658
1659 *temp = 0;
1660
1661 mutex_lock(&phydev->lock);
1662
1663 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1664 if (oldpage < 0) {
1665 mutex_unlock(&phydev->lock);
1666 return oldpage;
1667 }
1668
1669 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1670 if (ret < 0)
1671 goto error;
1672
1673 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1674
1675 error:
1676 marvell_set_page(phydev, oldpage);
1677 mutex_unlock(&phydev->lock);
1678
1679 return ret;
1680 }
1681
1682 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1683 {
1684 int oldpage;
1685 int ret;
1686
1687 *temp = 0;
1688
1689 mutex_lock(&phydev->lock);
1690
1691 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1692 if (oldpage < 0) {
1693 mutex_unlock(&phydev->lock);
1694 return oldpage;
1695 }
1696
1697 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1698 if (ret < 0)
1699 goto error;
1700
1701 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1702 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1703 /* convert to mC */
1704 *temp *= 1000;
1705
1706 error:
1707 marvell_set_page(phydev, oldpage);
1708 mutex_unlock(&phydev->lock);
1709
1710 return ret;
1711 }
1712
1713 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1714 {
1715 int oldpage;
1716 int ret;
1717
1718 mutex_lock(&phydev->lock);
1719
1720 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1721 if (oldpage < 0) {
1722 mutex_unlock(&phydev->lock);
1723 return oldpage;
1724 }
1725
1726 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1727 if (ret < 0)
1728 goto error;
1729
1730 temp = temp / 1000;
1731 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1732 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1733 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1734 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1735
1736 error:
1737 marvell_set_page(phydev, oldpage);
1738 mutex_unlock(&phydev->lock);
1739
1740 return ret;
1741 }
1742
1743 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1744 {
1745 int oldpage;
1746 int ret;
1747
1748 *alarm = false;
1749
1750 mutex_lock(&phydev->lock);
1751
1752 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1753 if (oldpage < 0) {
1754 mutex_unlock(&phydev->lock);
1755 return oldpage;
1756 }
1757
1758 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1759 if (ret < 0)
1760 goto error;
1761 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1762
1763 error:
1764 marvell_set_page(phydev, oldpage);
1765 mutex_unlock(&phydev->lock);
1766
1767 return ret;
1768 }
1769
1770 static int m88e1510_hwmon_read(struct device *dev,
1771 enum hwmon_sensor_types type,
1772 u32 attr, int channel, long *temp)
1773 {
1774 struct phy_device *phydev = dev_get_drvdata(dev);
1775 int err;
1776
1777 switch (attr) {
1778 case hwmon_temp_input:
1779 err = m88e1510_get_temp(phydev, temp);
1780 break;
1781 case hwmon_temp_crit:
1782 err = m88e1510_get_temp_critical(phydev, temp);
1783 break;
1784 case hwmon_temp_max_alarm:
1785 err = m88e1510_get_temp_alarm(phydev, temp);
1786 break;
1787 default:
1788 return -EOPNOTSUPP;
1789 }
1790
1791 return err;
1792 }
1793
1794 static int m88e1510_hwmon_write(struct device *dev,
1795 enum hwmon_sensor_types type,
1796 u32 attr, int channel, long temp)
1797 {
1798 struct phy_device *phydev = dev_get_drvdata(dev);
1799 int err;
1800
1801 switch (attr) {
1802 case hwmon_temp_crit:
1803 err = m88e1510_set_temp_critical(phydev, temp);
1804 break;
1805 default:
1806 return -EOPNOTSUPP;
1807 }
1808 return err;
1809 }
1810
1811 static umode_t m88e1510_hwmon_is_visible(const void *data,
1812 enum hwmon_sensor_types type,
1813 u32 attr, int channel)
1814 {
1815 if (type != hwmon_temp)
1816 return 0;
1817
1818 switch (attr) {
1819 case hwmon_temp_input:
1820 case hwmon_temp_max_alarm:
1821 return 0444;
1822 case hwmon_temp_crit:
1823 return 0644;
1824 default:
1825 return 0;
1826 }
1827 }
1828
1829 static u32 m88e1510_hwmon_temp_config[] = {
1830 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1831 0
1832 };
1833
1834 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1835 .type = hwmon_temp,
1836 .config = m88e1510_hwmon_temp_config,
1837 };
1838
1839 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1840 &m88e1121_hwmon_chip,
1841 &m88e1510_hwmon_temp,
1842 NULL
1843 };
1844
1845 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1846 .is_visible = m88e1510_hwmon_is_visible,
1847 .read = m88e1510_hwmon_read,
1848 .write = m88e1510_hwmon_write,
1849 };
1850
1851 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1852 .ops = &m88e1510_hwmon_hwmon_ops,
1853 .info = m88e1510_hwmon_info,
1854 };
1855
1856 static int marvell_hwmon_name(struct phy_device *phydev)
1857 {
1858 struct marvell_priv *priv = phydev->priv;
1859 struct device *dev = &phydev->mdio.dev;
1860 const char *devname = dev_name(dev);
1861 size_t len = strlen(devname);
1862 int i, j;
1863
1864 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1865 if (!priv->hwmon_name)
1866 return -ENOMEM;
1867
1868 for (i = j = 0; i < len && devname[i]; i++) {
1869 if (isalnum(devname[i]))
1870 priv->hwmon_name[j++] = devname[i];
1871 }
1872
1873 return 0;
1874 }
1875
1876 static int marvell_hwmon_probe(struct phy_device *phydev,
1877 const struct hwmon_chip_info *chip)
1878 {
1879 struct marvell_priv *priv = phydev->priv;
1880 struct device *dev = &phydev->mdio.dev;
1881 int err;
1882
1883 err = marvell_hwmon_name(phydev);
1884 if (err)
1885 return err;
1886
1887 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1888 dev, priv->hwmon_name, phydev, chip, NULL);
1889
1890 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1891 }
1892
1893 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1894 {
1895 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1896 }
1897
1898 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1899 {
1900 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1901 }
1902 #else
1903 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1904 {
1905 return 0;
1906 }
1907
1908 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1909 {
1910 return 0;
1911 }
1912 #endif
1913
1914 static int marvell_probe(struct phy_device *phydev)
1915 {
1916 struct marvell_priv *priv;
1917
1918 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1919 if (!priv)
1920 return -ENOMEM;
1921
1922 phydev->priv = priv;
1923
1924 return 0;
1925 }
1926
1927 static int m88e1121_probe(struct phy_device *phydev)
1928 {
1929 int err;
1930
1931 err = marvell_probe(phydev);
1932 if (err)
1933 return err;
1934
1935 return m88e1121_hwmon_probe(phydev);
1936 }
1937
1938 static int m88e1510_probe(struct phy_device *phydev)
1939 {
1940 int err;
1941
1942 err = marvell_probe(phydev);
1943 if (err)
1944 return err;
1945
1946 return m88e1510_hwmon_probe(phydev);
1947 }
1948
1949 static struct phy_driver marvell_drivers[] = {
1950 {
1951 .phy_id = MARVELL_PHY_ID_88E1101,
1952 .phy_id_mask = MARVELL_PHY_ID_MASK,
1953 .name = "Marvell 88E1101",
1954 .features = PHY_GBIT_FEATURES,
1955 .flags = PHY_HAS_INTERRUPT,
1956 .probe = marvell_probe,
1957 .config_init = &marvell_config_init,
1958 .config_aneg = &m88e1101_config_aneg,
1959 .read_status = &genphy_read_status,
1960 .ack_interrupt = &marvell_ack_interrupt,
1961 .config_intr = &marvell_config_intr,
1962 .resume = &genphy_resume,
1963 .suspend = &genphy_suspend,
1964 .get_sset_count = marvell_get_sset_count,
1965 .get_strings = marvell_get_strings,
1966 .get_stats = marvell_get_stats,
1967 },
1968 {
1969 .phy_id = MARVELL_PHY_ID_88E1112,
1970 .phy_id_mask = MARVELL_PHY_ID_MASK,
1971 .name = "Marvell 88E1112",
1972 .features = PHY_GBIT_FEATURES,
1973 .flags = PHY_HAS_INTERRUPT,
1974 .probe = marvell_probe,
1975 .config_init = &m88e1111_config_init,
1976 .config_aneg = &marvell_config_aneg,
1977 .read_status = &genphy_read_status,
1978 .ack_interrupt = &marvell_ack_interrupt,
1979 .config_intr = &marvell_config_intr,
1980 .resume = &genphy_resume,
1981 .suspend = &genphy_suspend,
1982 .get_sset_count = marvell_get_sset_count,
1983 .get_strings = marvell_get_strings,
1984 .get_stats = marvell_get_stats,
1985 },
1986 {
1987 .phy_id = MARVELL_PHY_ID_88E1111,
1988 .phy_id_mask = MARVELL_PHY_ID_MASK,
1989 .name = "Marvell 88E1111",
1990 .features = PHY_GBIT_FEATURES,
1991 .flags = PHY_HAS_INTERRUPT,
1992 .probe = marvell_probe,
1993 .config_init = &m88e1111_config_init,
1994 .config_aneg = &m88e1111_config_aneg,
1995 .read_status = &marvell_read_status,
1996 .ack_interrupt = &marvell_ack_interrupt,
1997 .config_intr = &marvell_config_intr,
1998 .resume = &genphy_resume,
1999 .suspend = &genphy_suspend,
2000 .get_sset_count = marvell_get_sset_count,
2001 .get_strings = marvell_get_strings,
2002 .get_stats = marvell_get_stats,
2003 },
2004 {
2005 .phy_id = MARVELL_PHY_ID_88E1118,
2006 .phy_id_mask = MARVELL_PHY_ID_MASK,
2007 .name = "Marvell 88E1118",
2008 .features = PHY_GBIT_FEATURES,
2009 .flags = PHY_HAS_INTERRUPT,
2010 .probe = marvell_probe,
2011 .config_init = &m88e1118_config_init,
2012 .config_aneg = &m88e1118_config_aneg,
2013 .read_status = &genphy_read_status,
2014 .ack_interrupt = &marvell_ack_interrupt,
2015 .config_intr = &marvell_config_intr,
2016 .resume = &genphy_resume,
2017 .suspend = &genphy_suspend,
2018 .get_sset_count = marvell_get_sset_count,
2019 .get_strings = marvell_get_strings,
2020 .get_stats = marvell_get_stats,
2021 },
2022 {
2023 .phy_id = MARVELL_PHY_ID_88E1121R,
2024 .phy_id_mask = MARVELL_PHY_ID_MASK,
2025 .name = "Marvell 88E1121R",
2026 .features = PHY_GBIT_FEATURES,
2027 .flags = PHY_HAS_INTERRUPT,
2028 .probe = &m88e1121_probe,
2029 .config_init = &m88e1121_config_init,
2030 .config_aneg = &m88e1121_config_aneg,
2031 .read_status = &marvell_read_status,
2032 .ack_interrupt = &marvell_ack_interrupt,
2033 .config_intr = &marvell_config_intr,
2034 .did_interrupt = &m88e1121_did_interrupt,
2035 .resume = &genphy_resume,
2036 .suspend = &genphy_suspend,
2037 .get_sset_count = marvell_get_sset_count,
2038 .get_strings = marvell_get_strings,
2039 .get_stats = marvell_get_stats,
2040 },
2041 {
2042 .phy_id = MARVELL_PHY_ID_88E1318S,
2043 .phy_id_mask = MARVELL_PHY_ID_MASK,
2044 .name = "Marvell 88E1318S",
2045 .features = PHY_GBIT_FEATURES,
2046 .flags = PHY_HAS_INTERRUPT,
2047 .probe = marvell_probe,
2048 .config_init = &m88e1121_config_init,
2049 .config_aneg = &m88e1318_config_aneg,
2050 .read_status = &marvell_read_status,
2051 .ack_interrupt = &marvell_ack_interrupt,
2052 .config_intr = &marvell_config_intr,
2053 .did_interrupt = &m88e1121_did_interrupt,
2054 .get_wol = &m88e1318_get_wol,
2055 .set_wol = &m88e1318_set_wol,
2056 .resume = &genphy_resume,
2057 .suspend = &genphy_suspend,
2058 .get_sset_count = marvell_get_sset_count,
2059 .get_strings = marvell_get_strings,
2060 .get_stats = marvell_get_stats,
2061 },
2062 {
2063 .phy_id = MARVELL_PHY_ID_88E1145,
2064 .phy_id_mask = MARVELL_PHY_ID_MASK,
2065 .name = "Marvell 88E1145",
2066 .features = PHY_GBIT_FEATURES,
2067 .flags = PHY_HAS_INTERRUPT,
2068 .probe = marvell_probe,
2069 .config_init = &m88e1145_config_init,
2070 .config_aneg = &marvell_config_aneg,
2071 .read_status = &genphy_read_status,
2072 .ack_interrupt = &marvell_ack_interrupt,
2073 .config_intr = &marvell_config_intr,
2074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
2076 .get_sset_count = marvell_get_sset_count,
2077 .get_strings = marvell_get_strings,
2078 .get_stats = marvell_get_stats,
2079 },
2080 {
2081 .phy_id = MARVELL_PHY_ID_88E1149R,
2082 .phy_id_mask = MARVELL_PHY_ID_MASK,
2083 .name = "Marvell 88E1149R",
2084 .features = PHY_GBIT_FEATURES,
2085 .flags = PHY_HAS_INTERRUPT,
2086 .probe = marvell_probe,
2087 .config_init = &m88e1149_config_init,
2088 .config_aneg = &m88e1118_config_aneg,
2089 .read_status = &genphy_read_status,
2090 .ack_interrupt = &marvell_ack_interrupt,
2091 .config_intr = &marvell_config_intr,
2092 .resume = &genphy_resume,
2093 .suspend = &genphy_suspend,
2094 .get_sset_count = marvell_get_sset_count,
2095 .get_strings = marvell_get_strings,
2096 .get_stats = marvell_get_stats,
2097 },
2098 {
2099 .phy_id = MARVELL_PHY_ID_88E1240,
2100 .phy_id_mask = MARVELL_PHY_ID_MASK,
2101 .name = "Marvell 88E1240",
2102 .features = PHY_GBIT_FEATURES,
2103 .flags = PHY_HAS_INTERRUPT,
2104 .probe = marvell_probe,
2105 .config_init = &m88e1111_config_init,
2106 .config_aneg = &marvell_config_aneg,
2107 .read_status = &genphy_read_status,
2108 .ack_interrupt = &marvell_ack_interrupt,
2109 .config_intr = &marvell_config_intr,
2110 .resume = &genphy_resume,
2111 .suspend = &genphy_suspend,
2112 .get_sset_count = marvell_get_sset_count,
2113 .get_strings = marvell_get_strings,
2114 .get_stats = marvell_get_stats,
2115 },
2116 {
2117 .phy_id = MARVELL_PHY_ID_88E1116R,
2118 .phy_id_mask = MARVELL_PHY_ID_MASK,
2119 .name = "Marvell 88E1116R",
2120 .features = PHY_GBIT_FEATURES,
2121 .flags = PHY_HAS_INTERRUPT,
2122 .probe = marvell_probe,
2123 .config_init = &m88e1116r_config_init,
2124 .config_aneg = &genphy_config_aneg,
2125 .read_status = &genphy_read_status,
2126 .ack_interrupt = &marvell_ack_interrupt,
2127 .config_intr = &marvell_config_intr,
2128 .resume = &genphy_resume,
2129 .suspend = &genphy_suspend,
2130 .get_sset_count = marvell_get_sset_count,
2131 .get_strings = marvell_get_strings,
2132 .get_stats = marvell_get_stats,
2133 },
2134 {
2135 .phy_id = MARVELL_PHY_ID_88E1510,
2136 .phy_id_mask = MARVELL_PHY_ID_MASK,
2137 .name = "Marvell 88E1510",
2138 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2139 .flags = PHY_HAS_INTERRUPT,
2140 .probe = &m88e1510_probe,
2141 .config_init = &m88e1510_config_init,
2142 .config_aneg = &m88e1510_config_aneg,
2143 .read_status = &marvell_read_status,
2144 .ack_interrupt = &marvell_ack_interrupt,
2145 .config_intr = &marvell_config_intr,
2146 .did_interrupt = &m88e1121_did_interrupt,
2147 .get_wol = &m88e1318_get_wol,
2148 .set_wol = &m88e1318_set_wol,
2149 .resume = &marvell_resume,
2150 .suspend = &marvell_suspend,
2151 .get_sset_count = marvell_get_sset_count,
2152 .get_strings = marvell_get_strings,
2153 .get_stats = marvell_get_stats,
2154 .set_loopback = genphy_loopback,
2155 },
2156 {
2157 .phy_id = MARVELL_PHY_ID_88E1540,
2158 .phy_id_mask = MARVELL_PHY_ID_MASK,
2159 .name = "Marvell 88E1540",
2160 .features = PHY_GBIT_FEATURES,
2161 .flags = PHY_HAS_INTERRUPT,
2162 .probe = m88e1510_probe,
2163 .config_init = &marvell_config_init,
2164 .config_aneg = &m88e1510_config_aneg,
2165 .read_status = &marvell_read_status,
2166 .ack_interrupt = &marvell_ack_interrupt,
2167 .config_intr = &marvell_config_intr,
2168 .did_interrupt = &m88e1121_did_interrupt,
2169 .resume = &genphy_resume,
2170 .suspend = &genphy_suspend,
2171 .get_sset_count = marvell_get_sset_count,
2172 .get_strings = marvell_get_strings,
2173 .get_stats = marvell_get_stats,
2174 },
2175 {
2176 .phy_id = MARVELL_PHY_ID_88E1545,
2177 .phy_id_mask = MARVELL_PHY_ID_MASK,
2178 .name = "Marvell 88E1545",
2179 .probe = m88e1510_probe,
2180 .features = PHY_GBIT_FEATURES,
2181 .flags = PHY_HAS_INTERRUPT,
2182 .config_init = &marvell_config_init,
2183 .config_aneg = &m88e1510_config_aneg,
2184 .read_status = &marvell_read_status,
2185 .ack_interrupt = &marvell_ack_interrupt,
2186 .config_intr = &marvell_config_intr,
2187 .did_interrupt = &m88e1121_did_interrupt,
2188 .resume = &genphy_resume,
2189 .suspend = &genphy_suspend,
2190 .get_sset_count = marvell_get_sset_count,
2191 .get_strings = marvell_get_strings,
2192 .get_stats = marvell_get_stats,
2193 },
2194 {
2195 .phy_id = MARVELL_PHY_ID_88E3016,
2196 .phy_id_mask = MARVELL_PHY_ID_MASK,
2197 .name = "Marvell 88E3016",
2198 .features = PHY_BASIC_FEATURES,
2199 .flags = PHY_HAS_INTERRUPT,
2200 .probe = marvell_probe,
2201 .config_aneg = &genphy_config_aneg,
2202 .config_init = &m88e3016_config_init,
2203 .aneg_done = &marvell_aneg_done,
2204 .read_status = &marvell_read_status,
2205 .ack_interrupt = &marvell_ack_interrupt,
2206 .config_intr = &marvell_config_intr,
2207 .did_interrupt = &m88e1121_did_interrupt,
2208 .resume = &genphy_resume,
2209 .suspend = &genphy_suspend,
2210 .get_sset_count = marvell_get_sset_count,
2211 .get_strings = marvell_get_strings,
2212 .get_stats = marvell_get_stats,
2213 },
2214 {
2215 .phy_id = MARVELL_PHY_ID_88E6390,
2216 .phy_id_mask = MARVELL_PHY_ID_MASK,
2217 .name = "Marvell 88E6390",
2218 .features = PHY_GBIT_FEATURES,
2219 .flags = PHY_HAS_INTERRUPT,
2220 .probe = m88e1510_probe,
2221 .config_init = &marvell_config_init,
2222 .config_aneg = &m88e1510_config_aneg,
2223 .read_status = &marvell_read_status,
2224 .ack_interrupt = &marvell_ack_interrupt,
2225 .config_intr = &marvell_config_intr,
2226 .did_interrupt = &m88e1121_did_interrupt,
2227 .resume = &genphy_resume,
2228 .suspend = &genphy_suspend,
2229 .get_sset_count = marvell_get_sset_count,
2230 .get_strings = marvell_get_strings,
2231 .get_stats = marvell_get_stats,
2232 },
2233 };
2234
2235 module_phy_driver(marvell_drivers);
2236
2237 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2238 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2239 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2240 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2241 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2242 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2243 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2244 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2245 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2246 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2247 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2248 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2249 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2250 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2251 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2252 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2253 { }
2254 };
2255
2256 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
Linux with added FPC-III support