watchdog/core: Rename some softlockup_* functions
[linux/fpc-iii.git] / drivers / pci / ecam.c
blobc228a2eb7faa85ba8b0b0d57da23572c433df0e9
1 /*
2 * Copyright 2016 Broadcom
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation (the "GPL").
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License version 2 (GPLv2) for more details.
13 * You should have received a copy of the GNU General Public License
14 * version 2 (GPLv2) along with this source code.
17 #include <linux/device.h>
18 #include <linux/io.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pci-ecam.h>
23 #include <linux/slab.h>
26 * On 64-bit systems, we do a single ioremap for the whole config space
27 * since we have enough virtual address range available. On 32-bit, we
28 * ioremap the config space for each bus individually.
30 static const bool per_bus_mapping = !IS_ENABLED(CONFIG_64BIT);
33 * Create a PCI config space window
34 * - reserve mem region
35 * - alloc struct pci_config_window with space for all mappings
36 * - ioremap the config space
38 struct pci_config_window *pci_ecam_create(struct device *dev,
39 struct resource *cfgres, struct resource *busr,
40 struct pci_ecam_ops *ops)
42 struct pci_config_window *cfg;
43 unsigned int bus_range, bus_range_max, bsz;
44 struct resource *conflict;
45 int i, err;
47 if (busr->start > busr->end)
48 return ERR_PTR(-EINVAL);
50 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
51 if (!cfg)
52 return ERR_PTR(-ENOMEM);
54 cfg->parent = dev;
55 cfg->ops = ops;
56 cfg->busr.start = busr->start;
57 cfg->busr.end = busr->end;
58 cfg->busr.flags = IORESOURCE_BUS;
59 bus_range = resource_size(&cfg->busr);
60 bus_range_max = resource_size(cfgres) >> ops->bus_shift;
61 if (bus_range > bus_range_max) {
62 bus_range = bus_range_max;
63 cfg->busr.end = busr->start + bus_range - 1;
64 dev_warn(dev, "ECAM area %pR can only accommodate %pR (reduced from %pR desired)\n",
65 cfgres, &cfg->busr, busr);
67 bsz = 1 << ops->bus_shift;
69 cfg->res.start = cfgres->start;
70 cfg->res.end = cfgres->end;
71 cfg->res.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
72 cfg->res.name = "PCI ECAM";
74 conflict = request_resource_conflict(&iomem_resource, &cfg->res);
75 if (conflict) {
76 err = -EBUSY;
77 dev_err(dev, "can't claim ECAM area %pR: address conflict with %s %pR\n",
78 &cfg->res, conflict->name, conflict);
79 goto err_exit;
82 if (per_bus_mapping) {
83 cfg->winp = kcalloc(bus_range, sizeof(*cfg->winp), GFP_KERNEL);
84 if (!cfg->winp)
85 goto err_exit_malloc;
86 for (i = 0; i < bus_range; i++) {
87 cfg->winp[i] =
88 pci_remap_cfgspace(cfgres->start + i * bsz,
89 bsz);
90 if (!cfg->winp[i])
91 goto err_exit_iomap;
93 } else {
94 cfg->win = pci_remap_cfgspace(cfgres->start, bus_range * bsz);
95 if (!cfg->win)
96 goto err_exit_iomap;
99 if (ops->init) {
100 err = ops->init(cfg);
101 if (err)
102 goto err_exit;
104 dev_info(dev, "ECAM at %pR for %pR\n", &cfg->res, &cfg->busr);
105 return cfg;
107 err_exit_iomap:
108 dev_err(dev, "ECAM ioremap failed\n");
109 err_exit_malloc:
110 err = -ENOMEM;
111 err_exit:
112 pci_ecam_free(cfg);
113 return ERR_PTR(err);
116 void pci_ecam_free(struct pci_config_window *cfg)
118 int i;
120 if (per_bus_mapping) {
121 if (cfg->winp) {
122 for (i = 0; i < resource_size(&cfg->busr); i++)
123 if (cfg->winp[i])
124 iounmap(cfg->winp[i]);
125 kfree(cfg->winp);
127 } else {
128 if (cfg->win)
129 iounmap(cfg->win);
131 if (cfg->res.parent)
132 release_resource(&cfg->res);
133 kfree(cfg);
137 * Function to implement the pci_ops ->map_bus method
139 void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
140 int where)
142 struct pci_config_window *cfg = bus->sysdata;
143 unsigned int devfn_shift = cfg->ops->bus_shift - 8;
144 unsigned int busn = bus->number;
145 void __iomem *base;
147 if (busn < cfg->busr.start || busn > cfg->busr.end)
148 return NULL;
150 busn -= cfg->busr.start;
151 if (per_bus_mapping)
152 base = cfg->winp[busn];
153 else
154 base = cfg->win + (busn << cfg->ops->bus_shift);
155 return base + (devfn << devfn_shift) + where;
158 /* ECAM ops */
159 struct pci_ecam_ops pci_generic_ecam_ops = {
160 .bus_shift = 20,
161 .pci_ops = {
162 .map_bus = pci_ecam_map_bus,
163 .read = pci_generic_config_read,
164 .write = pci_generic_config_write,
168 #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
169 /* ECAM ops for 32-bit access only (non-compliant) */
170 struct pci_ecam_ops pci_32b_ops = {
171 .bus_shift = 20,
172 .pci_ops = {
173 .map_bus = pci_ecam_map_bus,
174 .read = pci_generic_config_read32,
175 .write = pci_generic_config_write32,
178 #endif