1 // SPDX-License-Identifier: GPL-2.0
3 * Architecture-specific trap handling.
5 * Copyright (C) 1998-2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/sched/signal.h>
14 #include <linux/sched/debug.h>
15 #include <linux/tty.h>
16 #include <linux/vt_kern.h> /* For unblank_screen() */
17 #include <linux/export.h>
18 #include <linux/extable.h>
19 #include <linux/hardirq.h>
20 #include <linux/kprobes.h>
21 #include <linux/delay.h> /* for ssleep() */
22 #include <linux/kdebug.h>
23 #include <linux/uaccess.h>
25 #include <asm/fpswa.h>
26 #include <asm/intrinsics.h>
27 #include <asm/processor.h>
28 #include <asm/exception.h>
29 #include <asm/setup.h>
31 fpswa_interface_t
*fpswa_interface
;
32 EXPORT_SYMBOL(fpswa_interface
);
37 if (ia64_boot_param
->fpswa
)
38 /* FPSWA fixup: make the interface pointer a kernel virtual address: */
39 fpswa_interface
= __va(ia64_boot_param
->fpswa
);
43 die (const char *str
, struct pt_regs
*regs
, long err
)
50 .lock
= __SPIN_LOCK_UNLOCKED(die
.lock
),
54 static int die_counter
;
57 if (die
.lock_owner
!= cpu
) {
59 spin_lock_irq(&die
.lock
);
61 die
.lock_owner_depth
= 0;
66 if (++die
.lock_owner_depth
< 3) {
67 printk("%s[%d]: %s %ld [%d]\n",
68 current
->comm
, task_pid_nr(current
), str
, err
, ++die_counter
);
69 if (notify_die(DIE_OOPS
, str
, regs
, err
, 255, SIGSEGV
)
75 printk(KERN_ERR
"Recursive die() failure, output suppressed\n");
79 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
80 spin_unlock_irq(&die
.lock
);
86 panic("Fatal exception");
93 die_if_kernel (char *str
, struct pt_regs
*regs
, long err
)
96 return die(str
, regs
, err
);
101 __kprobes
ia64_bad_break (unsigned long break_num
, struct pt_regs
*regs
)
106 /* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
107 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
108 siginfo
.si_imm
= break_num
;
109 siginfo
.si_flags
= 0; /* clear __ISR_VALID */
113 case 0: /* unknown error (used by GCC for __builtin_abort()) */
114 if (notify_die(DIE_BREAK
, "break 0", regs
, break_num
, TRAP_BRKPT
, SIGTRAP
)
117 if (die_if_kernel("bugcheck!", regs
, break_num
))
119 sig
= SIGILL
; code
= ILL_ILLOPC
;
122 case 1: /* integer divide by zero */
123 sig
= SIGFPE
; code
= FPE_INTDIV
;
126 case 2: /* integer overflow */
127 sig
= SIGFPE
; code
= FPE_INTOVF
;
130 case 3: /* range check/bounds check */
131 sig
= SIGFPE
; code
= FPE_FLTSUB
;
134 case 4: /* null pointer dereference */
135 sig
= SIGSEGV
; code
= SEGV_MAPERR
;
138 case 5: /* misaligned data */
139 sig
= SIGSEGV
; code
= BUS_ADRALN
;
142 case 6: /* decimal overflow */
143 sig
= SIGFPE
; code
= __FPE_DECOVF
;
146 case 7: /* decimal divide by zero */
147 sig
= SIGFPE
; code
= __FPE_DECDIV
;
150 case 8: /* packed decimal error */
151 sig
= SIGFPE
; code
= __FPE_DECERR
;
154 case 9: /* invalid ASCII digit */
155 sig
= SIGFPE
; code
= __FPE_INVASC
;
158 case 10: /* invalid decimal digit */
159 sig
= SIGFPE
; code
= __FPE_INVDEC
;
162 case 11: /* paragraph stack overflow */
163 sig
= SIGSEGV
; code
= __SEGV_PSTKOVF
;
166 case 0x3f000 ... 0x3ffff: /* bundle-update in progress */
167 sig
= SIGILL
; code
= __ILL_BNDMOD
;
171 if ((break_num
< 0x40000 || break_num
> 0x100000)
172 && die_if_kernel("Bad break", regs
, break_num
))
175 if (break_num
< 0x80000) {
176 sig
= SIGILL
; code
= __ILL_BREAK
;
178 if (notify_die(DIE_BREAK
, "bad break", regs
, break_num
, TRAP_BRKPT
, SIGTRAP
)
181 sig
= SIGTRAP
; code
= TRAP_BRKPT
;
184 siginfo
.si_signo
= sig
;
185 siginfo
.si_errno
= 0;
186 siginfo
.si_code
= code
;
187 force_sig_info(sig
, &siginfo
, current
);
191 * disabled_fph_fault() is called when a user-level process attempts to access f32..f127
192 * and it doesn't own the fp-high register partition. When this happens, we save the
193 * current fph partition in the task_struct of the fpu-owner (if necessary) and then load
194 * the fp-high partition of the current task (if necessary). Note that the kernel has
195 * access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes
196 * care of clearing psr.dfh.
199 disabled_fph_fault (struct pt_regs
*regs
)
201 struct ia64_psr
*psr
= ia64_psr(regs
);
203 /* first, grant user-level access to fph partition: */
207 * Make sure that no other task gets in on this processor
208 * while we're claiming the FPU
213 struct task_struct
*fpu_owner
214 = (struct task_struct
*)ia64_get_kr(IA64_KR_FPU_OWNER
);
216 if (ia64_is_local_fpu_owner(current
)) {
217 preempt_enable_no_resched();
222 ia64_flush_fph(fpu_owner
);
224 #endif /* !CONFIG_SMP */
225 ia64_set_local_fpu_owner(current
);
226 if ((current
->thread
.flags
& IA64_THREAD_FPH_VALID
) != 0) {
227 __ia64_load_fpu(current
->thread
.fph
);
232 * Set mfh because the state in thread.fph does not match the state in
237 preempt_enable_no_resched();
241 fp_emulate (int fp_fault
, void *bundle
, long *ipsr
, long *fpsr
, long *isr
, long *pr
, long *ifs
,
242 struct pt_regs
*regs
)
247 if (!fpswa_interface
)
250 memset(&fp_state
, 0, sizeof(fp_state_t
));
253 * compute fp_state. only FP registers f6 - f11 are used by the
254 * kernel, so set those bits in the mask and set the low volatile
255 * pointer to point to these registers.
257 fp_state
.bitmask_low64
= 0xfc0; /* bit6..bit11 */
259 fp_state
.fp_state_low_volatile
= (fp_state_low_volatile_t
*) ®s
->f6
;
261 * unsigned long (*EFI_FPSWA) (
262 * unsigned long trap_type,
264 * unsigned long *pipsr,
265 * unsigned long *pfsr,
266 * unsigned long *pisr,
267 * unsigned long *ppreds,
268 * unsigned long *pifs,
271 ret
= (*fpswa_interface
->fpswa
)((unsigned long) fp_fault
, bundle
,
272 (unsigned long *) ipsr
, (unsigned long *) fpsr
,
273 (unsigned long *) isr
, (unsigned long *) pr
,
274 (unsigned long *) ifs
, &fp_state
);
283 static DEFINE_PER_CPU(struct fpu_swa_msg
, cpulast
);
284 DECLARE_PER_CPU(struct fpu_swa_msg
, cpulast
);
285 static struct fpu_swa_msg last __cacheline_aligned
;
289 * Handle floating-point assist faults and traps.
292 handle_fpu_swa (int fp_fault
, struct pt_regs
*regs
, unsigned long isr
)
294 long exception
, bundle
[2];
295 unsigned long fault_ip
;
296 struct siginfo siginfo
;
298 fault_ip
= regs
->cr_iip
;
299 if (!fp_fault
&& (ia64_psr(regs
)->ri
== 0))
301 if (copy_from_user(bundle
, (void __user
*) fault_ip
, sizeof(bundle
)))
304 if (!(current
->thread
.flags
& IA64_THREAD_FPEMU_NOPRINT
)) {
305 unsigned long count
, current_jiffies
= jiffies
;
306 struct fpu_swa_msg
*cp
= this_cpu_ptr(&cpulast
);
308 if (unlikely(current_jiffies
> cp
->time
))
310 if (unlikely(cp
->count
< 5)) {
312 cp
->time
= current_jiffies
+ 5 * HZ
;
314 /* minimize races by grabbing a copy of count BEFORE checking last.time. */
319 * Lower 4 bits are used as a count. Upper bits are a sequence
320 * number that is updated when count is reset. The cmpxchg will
321 * fail is seqno has changed. This minimizes mutiple cpus
322 * resetting the count.
324 if (current_jiffies
> last
.time
)
325 (void) cmpxchg_acq(&last
.count
, count
, 16 + (count
& ~15));
327 /* used fetchadd to atomically update the count */
328 if ((last
.count
& 15) < 5 && (ia64_fetchadd(1, &last
.count
, acq
) & 15) < 5) {
329 last
.time
= current_jiffies
+ 5 * HZ
;
331 "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
332 current
->comm
, task_pid_nr(current
), regs
->cr_iip
+ ia64_psr(regs
)->ri
, isr
);
337 exception
= fp_emulate(fp_fault
, bundle
, ®s
->cr_ipsr
, ®s
->ar_fpsr
, &isr
, ®s
->pr
,
338 ®s
->cr_ifs
, regs
);
340 if (exception
== 0) {
341 /* emulation was successful */
342 ia64_increment_ip(regs
);
343 } else if (exception
== -1) {
344 printk(KERN_ERR
"handle_fpu_swa: fp_emulate() returned -1\n");
347 /* is next instruction a trap? */
349 ia64_increment_ip(regs
);
351 siginfo
.si_signo
= SIGFPE
;
352 siginfo
.si_errno
= 0;
353 siginfo
.si_code
= FPE_FIXME
; /* default code */
354 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
356 siginfo
.si_code
= FPE_FLTINV
;
357 } else if (isr
& 0x22) {
358 /* denormal operand gets the same si_code as underflow
359 * see arch/i386/kernel/traps.c:math_error() */
360 siginfo
.si_code
= FPE_FLTUND
;
361 } else if (isr
& 0x44) {
362 siginfo
.si_code
= FPE_FLTDIV
;
364 siginfo
.si_isr
= isr
;
365 siginfo
.si_flags
= __ISR_VALID
;
367 force_sig_info(SIGFPE
, &siginfo
, current
);
370 if (exception
== -1) {
371 printk(KERN_ERR
"handle_fpu_swa: fp_emulate() returned -1\n");
373 } else if (exception
!= 0) {
374 /* raise exception */
375 siginfo
.si_signo
= SIGFPE
;
376 siginfo
.si_errno
= 0;
377 siginfo
.si_code
= FPE_FIXME
; /* default code */
378 siginfo
.si_addr
= (void __user
*) (regs
->cr_iip
+ ia64_psr(regs
)->ri
);
380 siginfo
.si_code
= FPE_FLTOVF
;
381 } else if (isr
& 0x1100) {
382 siginfo
.si_code
= FPE_FLTUND
;
383 } else if (isr
& 0x2200) {
384 siginfo
.si_code
= FPE_FLTRES
;
386 siginfo
.si_isr
= isr
;
387 siginfo
.si_flags
= __ISR_VALID
;
389 force_sig_info(SIGFPE
, &siginfo
, current
);
395 struct illegal_op_return
{
396 unsigned long fkt
, arg1
, arg2
, arg3
;
399 struct illegal_op_return
400 ia64_illegal_op_fault (unsigned long ec
, long arg1
, long arg2
, long arg3
,
401 long arg4
, long arg5
, long arg6
, long arg7
,
404 struct illegal_op_return rv
;
408 #ifdef CONFIG_IA64_BRL_EMU
410 extern struct illegal_op_return
ia64_emulate_brl (struct pt_regs
*, unsigned long);
412 rv
= ia64_emulate_brl(®s
, ec
);
413 if (rv
.fkt
!= (unsigned long) -1)
418 sprintf(buf
, "IA-64 Illegal operation fault");
420 if (die_if_kernel(buf
, ®s
, 0))
423 memset(&si
, 0, sizeof(si
));
424 si
.si_signo
= SIGILL
;
425 si
.si_code
= ILL_ILLOPC
;
426 si
.si_addr
= (void __user
*) (regs
.cr_iip
+ ia64_psr(®s
)->ri
);
427 force_sig_info(SIGILL
, &si
, current
);
432 ia64_fault (unsigned long vector
, unsigned long isr
, unsigned long ifa
,
433 unsigned long iim
, unsigned long itir
, long arg5
, long arg6
,
434 long arg7
, struct pt_regs regs
)
436 unsigned long code
, error
= isr
, iip
;
437 struct siginfo siginfo
;
440 static const char *reason
[] = {
441 "IA-64 Illegal Operation fault",
442 "IA-64 Privileged Operation fault",
443 "IA-64 Privileged Register fault",
444 "IA-64 Reserved Register/Field fault",
445 "Disabled Instruction Set Transition fault",
446 "Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
447 "Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
448 "Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
451 if ((isr
& IA64_ISR_NA
) && ((isr
& IA64_ISR_CODE_MASK
) == IA64_ISR_CODE_LFETCH
)) {
453 * This fault was due to lfetch.fault, set "ed" bit in the psr to cancel
456 ia64_psr(®s
)->ed
= 1;
460 iip
= regs
.cr_iip
+ ia64_psr(®s
)->ri
;
463 case 24: /* General Exception */
464 code
= (isr
>> 4) & 0xf;
465 sprintf(buf
, "General Exception: %s%s", reason
[code
],
466 (code
== 3) ? ((isr
& (1UL << 37))
467 ? " (RSE access)" : " (data access)") : "");
469 # ifdef CONFIG_IA64_PRINT_HAZARDS
470 printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n",
471 current
->comm
, task_pid_nr(current
),
472 regs
.cr_iip
+ ia64_psr(®s
)->ri
, regs
.pr
);
478 case 25: /* Disabled FP-Register */
480 disabled_fph_fault(®s
);
483 sprintf(buf
, "Disabled FPL fault---not supposed to happen!");
486 case 26: /* NaT Consumption */
487 if (user_mode(®s
)) {
490 if (((isr
>> 4) & 0xf) == 2) {
491 /* NaT page consumption */
494 addr
= (void __user
*) ifa
;
496 /* register NaT consumption */
499 addr
= (void __user
*) (regs
.cr_iip
500 + ia64_psr(®s
)->ri
);
502 siginfo
.si_signo
= sig
;
503 siginfo
.si_code
= code
;
504 siginfo
.si_errno
= 0;
505 siginfo
.si_addr
= addr
;
506 siginfo
.si_imm
= vector
;
507 siginfo
.si_flags
= __ISR_VALID
;
508 siginfo
.si_isr
= isr
;
509 force_sig_info(sig
, &siginfo
, current
);
511 } else if (ia64_done_with_exception(®s
))
513 sprintf(buf
, "NaT consumption");
516 case 31: /* Unsupported Data Reference */
517 if (user_mode(®s
)) {
518 siginfo
.si_signo
= SIGILL
;
519 siginfo
.si_code
= ILL_ILLOPN
;
520 siginfo
.si_errno
= 0;
521 siginfo
.si_addr
= (void __user
*) iip
;
522 siginfo
.si_imm
= vector
;
523 siginfo
.si_flags
= __ISR_VALID
;
524 siginfo
.si_isr
= isr
;
525 force_sig_info(SIGILL
, &siginfo
, current
);
528 sprintf(buf
, "Unsupported data reference");
532 case 35: /* Taken Branch Trap */
533 case 36: /* Single Step Trap */
534 if (fsys_mode(current
, ®s
)) {
535 extern char __kernel_syscall_via_break
[];
537 * Got a trap in fsys-mode: Taken Branch Trap
538 * and Single Step trap need special handling;
539 * Debug trap is ignored (we disable it here
540 * and re-enable it in the lower-privilege trap).
542 if (unlikely(vector
== 29)) {
543 set_thread_flag(TIF_DB_DISABLED
);
544 ia64_psr(®s
)->db
= 0;
545 ia64_psr(®s
)->lp
= 1;
548 /* re-do the system call via break 0x100000: */
549 regs
.cr_iip
= (unsigned long) __kernel_syscall_via_break
;
550 ia64_psr(®s
)->ri
= 0;
551 ia64_psr(®s
)->cpl
= 3;
557 siginfo
.si_code
= TRAP_HWBKPT
;
558 #ifdef CONFIG_ITANIUM
560 * Erratum 10 (IFA may contain incorrect address) now has
561 * "NoFix" status. There are no plans for fixing this.
563 if (ia64_psr(®s
)->is
== 0)
567 case 35: siginfo
.si_code
= TRAP_BRANCH
; ifa
= 0; break;
568 case 36: siginfo
.si_code
= TRAP_TRACE
; ifa
= 0; break;
570 if (notify_die(DIE_FAULT
, "ia64_fault", ®s
, vector
, siginfo
.si_code
, SIGTRAP
)
573 siginfo
.si_signo
= SIGTRAP
;
574 siginfo
.si_errno
= 0;
575 siginfo
.si_addr
= (void __user
*) ifa
;
577 siginfo
.si_flags
= __ISR_VALID
;
578 siginfo
.si_isr
= isr
;
579 force_sig_info(SIGTRAP
, &siginfo
, current
);
582 case 32: /* fp fault */
583 case 33: /* fp trap */
584 result
= handle_fpu_swa((vector
== 32) ? 1 : 0, ®s
, isr
);
585 if ((result
< 0) || (current
->thread
.flags
& IA64_THREAD_FPEMU_SIGFPE
)) {
586 siginfo
.si_signo
= SIGFPE
;
587 siginfo
.si_errno
= 0;
588 siginfo
.si_code
= FPE_FLTINV
;
589 siginfo
.si_addr
= (void __user
*) iip
;
590 siginfo
.si_flags
= __ISR_VALID
;
591 siginfo
.si_isr
= isr
;
593 force_sig_info(SIGFPE
, &siginfo
, current
);
599 /* Lower-Privilege Transfer Trap */
601 /* If we disabled debug traps during an fsyscall,
602 * re-enable them here.
604 if (test_thread_flag(TIF_DB_DISABLED
)) {
605 clear_thread_flag(TIF_DB_DISABLED
);
606 ia64_psr(®s
)->db
= 1;
610 * Just clear PSR.lp and then return immediately:
611 * all the interesting work (e.g., signal delivery)
612 * is done in the kernel exit path.
614 ia64_psr(®s
)->lp
= 0;
617 /* Unimplemented Instr. Address Trap */
618 if (user_mode(®s
)) {
619 siginfo
.si_signo
= SIGILL
;
620 siginfo
.si_code
= ILL_BADIADDR
;
621 siginfo
.si_errno
= 0;
622 siginfo
.si_flags
= 0;
625 siginfo
.si_addr
= (void __user
*) iip
;
626 force_sig_info(SIGILL
, &siginfo
, current
);
629 sprintf(buf
, "Unimplemented Instruction Address fault");
634 printk(KERN_ERR
"Unexpected IA-32 exception (Trap 45)\n");
635 printk(KERN_ERR
" iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
637 force_sig(SIGSEGV
, current
);
641 printk(KERN_ERR
"Unexpected IA-32 intercept trap (Trap 46)\n");
642 printk(KERN_ERR
" iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
644 force_sig(SIGSEGV
, current
);
648 sprintf(buf
, "IA-32 Interruption Fault (int 0x%lx)", isr
>> 16);
652 sprintf(buf
, "Fault %lu", vector
);
655 if (!die_if_kernel(buf
, ®s
, error
))
656 force_sig(SIGILL
, current
);