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x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / arch / powerpc / xmon / xmon.c
blobf752f771f29db13910aed427297e07b66c83cacd
1 /*
2 * Routines providing a simple monitor for use on the PowerMac.
3 *
4 * Copyright (C) 1996-2005 Paul Mackerras.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
18 #include <linux/mm.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
31
32 #include <asm/debugfs.h>
33 #include <asm/ptrace.h>
34 #include <asm/smp.h>
35 #include <asm/string.h>
36 #include <asm/prom.h>
37 #include <asm/machdep.h>
38 #include <asm/xmon.h>
39 #include <asm/processor.h>
40 #include <asm/pgtable.h>
41 #include <asm/mmu.h>
42 #include <asm/mmu_context.h>
43 #include <asm/cputable.h>
44 #include <asm/rtas.h>
45 #include <asm/sstep.h>
46 #include <asm/irq_regs.h>
47 #include <asm/spu.h>
48 #include <asm/spu_priv1.h>
49 #include <asm/setjmp.h>
50 #include <asm/reg.h>
51 #include <asm/debug.h>
52 #include <asm/hw_breakpoint.h>
53 #include <asm/xive.h>
54 #include <asm/opal.h>
55 #include <asm/firmware.h>
56 #include <asm/code-patching.h>
57
58 #ifdef CONFIG_PPC64
59 #include <asm/hvcall.h>
60 #include <asm/paca.h>
61 #endif
62
63 #if defined(CONFIG_PPC_SPLPAR)
64 #include <asm/plpar_wrappers.h>
65 #else
66 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
67 #endif
68
69 #include "nonstdio.h"
70 #include "dis-asm.h"
71
72 #ifdef CONFIG_SMP
73 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
74 static unsigned long xmon_taken = 1;
75 static int xmon_owner;
76 static int xmon_gate;
77 #else
78 #define xmon_owner 0
79 #endif /* CONFIG_SMP */
80
81 #ifdef CONFIG_PPC_PSERIES
82 static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
83 #endif
84 static unsigned long in_xmon __read_mostly = 0;
85 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
86
87 static unsigned long adrs;
88 static int size = 1;
89 #define MAX_DUMP (128 * 1024)
90 static unsigned long ndump = 64;
91 static unsigned long nidump = 16;
92 static unsigned long ncsum = 4096;
93 static int termch;
94 static char tmpstr[128];
95 static int tracing_enabled;
96
97 static long bus_error_jmp[JMP_BUF_LEN];
98 static int catch_memory_errors;
99 static int catch_spr_faults;
100 static long *xmon_fault_jmp[NR_CPUS];
101
102 /* Breakpoint stuff */
103 struct bpt {
104 unsigned long address;
105 unsigned int instr[2];
106 atomic_t ref_count;
107 int enabled;
108 unsigned long pad;
109 };
110
111 /* Bits in bpt.enabled */
112 #define BP_CIABR 1
113 #define BP_TRAP 2
114 #define BP_DABR 4
115
116 #define NBPTS 256
117 static struct bpt bpts[NBPTS];
118 static struct bpt dabr;
119 static struct bpt *iabr;
120 static unsigned bpinstr = 0x7fe00008; /* trap */
121
122 #define BP_NUM(bp) ((bp) - bpts + 1)
123
124 /* Prototypes */
125 static int cmds(struct pt_regs *);
126 static int mread(unsigned long, void *, int);
127 static int mwrite(unsigned long, void *, int);
128 static int handle_fault(struct pt_regs *);
129 static void byterev(unsigned char *, int);
130 static void memex(void);
131 static int bsesc(void);
132 static void dump(void);
133 static void prdump(unsigned long, long);
134 static int ppc_inst_dump(unsigned long, long, int);
135 static void dump_log_buf(void);
136
137 #ifdef CONFIG_PPC_POWERNV
138 static void dump_opal_msglog(void);
139 #else
140 static inline void dump_opal_msglog(void)
141 {
142 printf("Machine is not running OPAL firmware.\n");
143 }
144 #endif
145
146 static void backtrace(struct pt_regs *);
147 static void excprint(struct pt_regs *);
148 static void prregs(struct pt_regs *);
149 static void memops(int);
150 static void memlocate(void);
151 static void memzcan(void);
152 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
153 int skipbl(void);
154 int scanhex(unsigned long *valp);
155 static void scannl(void);
156 static int hexdigit(int);
157 void getstring(char *, int);
158 static void flush_input(void);
159 static int inchar(void);
160 static void take_input(char *);
161 static int read_spr(int, unsigned long *);
162 static void write_spr(int, unsigned long);
163 static void super_regs(void);
164 static void remove_bpts(void);
165 static void insert_bpts(void);
166 static void remove_cpu_bpts(void);
167 static void insert_cpu_bpts(void);
168 static struct bpt *at_breakpoint(unsigned long pc);
169 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
170 static int do_step(struct pt_regs *);
171 static void bpt_cmds(void);
172 static void cacheflush(void);
173 static int cpu_cmd(void);
174 static void csum(void);
175 static void bootcmds(void);
176 static void proccall(void);
177 static void show_tasks(void);
178 void dump_segments(void);
179 static void symbol_lookup(void);
180 static void xmon_show_stack(unsigned long sp, unsigned long lr,
181 unsigned long pc);
182 static void xmon_print_symbol(unsigned long address, const char *mid,
183 const char *after);
184 static const char *getvecname(unsigned long vec);
185
186 static int do_spu_cmd(void);
187
188 #ifdef CONFIG_44x
189 static void dump_tlb_44x(void);
190 #endif
191 #ifdef CONFIG_PPC_BOOK3E
192 static void dump_tlb_book3e(void);
193 #endif
194
195 #ifdef CONFIG_PPC64
196 #define REG "%.16lx"
197 #else
198 #define REG "%.8lx"
199 #endif
200
201 #ifdef __LITTLE_ENDIAN__
202 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
203 #else
204 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
205 #endif
206
207 static char *help_string = "\
208 Commands:\n\
209 b show breakpoints\n\
210 bd set data breakpoint\n\
211 bi set instruction breakpoint\n\
212 bc clear breakpoint\n"
213 #ifdef CONFIG_SMP
214 "\
215 c print cpus stopped in xmon\n\
216 c# try to switch to cpu number h (in hex)\n"
217 #endif
218 "\
219 C checksum\n\
220 d dump bytes\n\
221 d1 dump 1 byte values\n\
222 d2 dump 2 byte values\n\
223 d4 dump 4 byte values\n\
224 d8 dump 8 byte values\n\
225 di dump instructions\n\
226 df dump float values\n\
227 dd dump double values\n\
228 dl dump the kernel log buffer\n"
229 #ifdef CONFIG_PPC_POWERNV
230 "\
231 do dump the OPAL message log\n"
232 #endif
233 #ifdef CONFIG_PPC64
234 "\
235 dp[#] dump paca for current cpu, or cpu #\n\
236 dpa dump paca for all possible cpus\n"
237 #endif
238 "\
239 dr dump stream of raw bytes\n\
240 dt dump the tracing buffers (uses printk)\n\
241 dtc dump the tracing buffers for current CPU (uses printk)\n\
242 "
243 #ifdef CONFIG_PPC_POWERNV
244 " dx# dump xive on CPU #\n\
245 dxi# dump xive irq state #\n\
246 dxa dump xive on all CPUs\n"
247 #endif
248 " e print exception information\n\
249 f flush cache\n\
250 la lookup symbol+offset of specified address\n\
251 ls lookup address of specified symbol\n\
252 m examine/change memory\n\
253 mm move a block of memory\n\
254 ms set a block of memory\n\
255 md compare two blocks of memory\n\
256 ml locate a block of memory\n\
257 mz zero a block of memory\n\
258 mi show information about memory allocation\n\
259 p call a procedure\n\
260 P list processes/tasks\n\
261 r print registers\n\
262 s single step\n"
263 #ifdef CONFIG_SPU_BASE
264 " ss stop execution on all spus\n\
265 sr restore execution on stopped spus\n\
266 sf # dump spu fields for spu # (in hex)\n\
267 sd # dump spu local store for spu # (in hex)\n\
268 sdi # disassemble spu local store for spu # (in hex)\n"
269 #endif
270 " S print special registers\n\
271 Sa print all SPRs\n\
272 Sr # read SPR #\n\
273 Sw #v write v to SPR #\n\
274 t print backtrace\n\
275 x exit monitor and recover\n\
276 X exit monitor and don't recover\n"
277 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
278 " u dump segment table or SLB\n"
279 #elif defined(CONFIG_PPC_STD_MMU_32)
280 " u dump segment registers\n"
281 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
282 " u dump TLB\n"
283 #endif
284 " ? help\n"
285 " # n limit output to n lines per page (for dp, dpa, dl)\n"
286 " zr reboot\n\
287 zh halt\n"
288 ;
289
290 static struct pt_regs *xmon_regs;
291
292 static inline void sync(void)
293 {
294 asm volatile("sync; isync");
295 }
296
297 static inline void store_inst(void *p)
298 {
299 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
300 }
301
302 static inline void cflush(void *p)
303 {
304 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
305 }
306
307 static inline void cinval(void *p)
308 {
309 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
310 }
311
312 /**
313 * write_ciabr() - write the CIABR SPR
314 * @ciabr: The value to write.
315 *
316 * This function writes a value to the CIARB register either directly
317 * through mtspr instruction if the kernel is in HV privilege mode or
318 * call a hypervisor function to achieve the same in case the kernel
319 * is in supervisor privilege mode.
320 */
321 static void write_ciabr(unsigned long ciabr)
322 {
323 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
324 return;
325
326 if (cpu_has_feature(CPU_FTR_HVMODE)) {
327 mtspr(SPRN_CIABR, ciabr);
328 return;
329 }
330 plapr_set_ciabr(ciabr);
331 }
332
333 /**
334 * set_ciabr() - set the CIABR
335 * @addr: The value to set.
336 *
337 * This function sets the correct privilege value into the the HW
338 * breakpoint address before writing it up in the CIABR register.
339 */
340 static void set_ciabr(unsigned long addr)
341 {
342 addr &= ~CIABR_PRIV;
343
344 if (cpu_has_feature(CPU_FTR_HVMODE))
345 addr |= CIABR_PRIV_HYPER;
346 else
347 addr |= CIABR_PRIV_SUPER;
348 write_ciabr(addr);
349 }
350
351 /*
352 * Disable surveillance (the service processor watchdog function)
353 * while we are in xmon.
354 * XXX we should re-enable it when we leave. :)
355 */
356 #define SURVEILLANCE_TOKEN 9000
357
358 static inline void disable_surveillance(void)
359 {
360 #ifdef CONFIG_PPC_PSERIES
361 /* Since this can't be a module, args should end up below 4GB. */
362 static struct rtas_args args;
363
364 /*
365 * At this point we have got all the cpus we can into
366 * xmon, so there is hopefully no other cpu calling RTAS
367 * at the moment, even though we don't take rtas.lock.
368 * If we did try to take rtas.lock there would be a
369 * real possibility of deadlock.
370 */
371 if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
372 return;
373
374 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
375 SURVEILLANCE_TOKEN, 0, 0);
376
377 #endif /* CONFIG_PPC_PSERIES */
378 }
379
380 #ifdef CONFIG_SMP
381 static int xmon_speaker;
382
383 static void get_output_lock(void)
384 {
385 int me = smp_processor_id() + 0x100;
386 int last_speaker = 0, prev;
387 long timeout;
388
389 if (xmon_speaker == me)
390 return;
391
392 for (;;) {
393 last_speaker = cmpxchg(&xmon_speaker, 0, me);
394 if (last_speaker == 0)
395 return;
396
397 /*
398 * Wait a full second for the lock, we might be on a slow
399 * console, but check every 100us.
400 */
401 timeout = 10000;
402 while (xmon_speaker == last_speaker) {
403 if (--timeout > 0) {
404 udelay(100);
405 continue;
406 }
407
408 /* hostile takeover */
409 prev = cmpxchg(&xmon_speaker, last_speaker, me);
410 if (prev == last_speaker)
411 return;
412 break;
413 }
414 }
415 }
416
417 static void release_output_lock(void)
418 {
419 xmon_speaker = 0;
420 }
421
422 int cpus_are_in_xmon(void)
423 {
424 return !cpumask_empty(&cpus_in_xmon);
425 }
426
427 static bool wait_for_other_cpus(int ncpus)
428 {
429 unsigned long timeout;
430
431 /* We wait for 2s, which is a metric "little while" */
432 for (timeout = 20000; timeout != 0; --timeout) {
433 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
434 return true;
435 udelay(100);
436 barrier();
437 }
438
439 return false;
440 }
441 #endif /* CONFIG_SMP */
442
443 static inline int unrecoverable_excp(struct pt_regs *regs)
444 {
445 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
446 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
447 return 0;
448 #else
449 return ((regs->msr & MSR_RI) == 0);
450 #endif
451 }
452
453 static int xmon_core(struct pt_regs *regs, int fromipi)
454 {
455 int cmd = 0;
456 struct bpt *bp;
457 long recurse_jmp[JMP_BUF_LEN];
458 unsigned long offset;
459 unsigned long flags;
460 #ifdef CONFIG_SMP
461 int cpu;
462 int secondary;
463 #endif
464
465 local_irq_save(flags);
466 hard_irq_disable();
467
468 tracing_enabled = tracing_is_on();
469 tracing_off();
470
471 bp = in_breakpoint_table(regs->nip, &offset);
472 if (bp != NULL) {
473 regs->nip = bp->address + offset;
474 atomic_dec(&bp->ref_count);
475 }
476
477 remove_cpu_bpts();
478
479 #ifdef CONFIG_SMP
480 cpu = smp_processor_id();
481 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
482 /*
483 * We catch SPR read/write faults here because the 0x700, 0xf60
484 * etc. handlers don't call debugger_fault_handler().
485 */
486 if (catch_spr_faults)
487 longjmp(bus_error_jmp, 1);
488 get_output_lock();
489 excprint(regs);
490 printf("cpu 0x%x: Exception %lx %s in xmon, "
491 "returning to main loop\n",
492 cpu, regs->trap, getvecname(TRAP(regs)));
493 release_output_lock();
494 longjmp(xmon_fault_jmp[cpu], 1);
495 }
496
497 if (setjmp(recurse_jmp) != 0) {
498 if (!in_xmon || !xmon_gate) {
499 get_output_lock();
500 printf("xmon: WARNING: bad recursive fault "
501 "on cpu 0x%x\n", cpu);
502 release_output_lock();
503 goto waiting;
504 }
505 secondary = !(xmon_taken && cpu == xmon_owner);
506 goto cmdloop;
507 }
508
509 xmon_fault_jmp[cpu] = recurse_jmp;
510
511 bp = NULL;
512 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
513 bp = at_breakpoint(regs->nip);
514 if (bp || unrecoverable_excp(regs))
515 fromipi = 0;
516
517 if (!fromipi) {
518 get_output_lock();
519 excprint(regs);
520 if (bp) {
521 printf("cpu 0x%x stopped at breakpoint 0x%lx (",
522 cpu, BP_NUM(bp));
523 xmon_print_symbol(regs->nip, " ", ")\n");
524 }
525 if (unrecoverable_excp(regs))
526 printf("WARNING: exception is not recoverable, "
527 "can't continue\n");
528 release_output_lock();
529 }
530
531 cpumask_set_cpu(cpu, &cpus_in_xmon);
532
533 waiting:
534 secondary = 1;
535 spin_begin();
536 while (secondary && !xmon_gate) {
537 if (in_xmon == 0) {
538 if (fromipi) {
539 spin_end();
540 goto leave;
541 }
542 secondary = test_and_set_bit(0, &in_xmon);
543 }
544 spin_cpu_relax();
545 touch_nmi_watchdog();
546 }
547 spin_end();
548
549 if (!secondary && !xmon_gate) {
550 /* we are the first cpu to come in */
551 /* interrupt other cpu(s) */
552 int ncpus = num_online_cpus();
553
554 xmon_owner = cpu;
555 mb();
556 if (ncpus > 1) {
557 /*
558 * A system reset (trap == 0x100) can be triggered on
559 * all CPUs, so when we come in via 0x100 try waiting
560 * for the other CPUs to come in before we send the
561 * debugger break (IPI). This is similar to
562 * crash_kexec_secondary().
563 */
564 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
565 smp_send_debugger_break();
566
567 wait_for_other_cpus(ncpus);
568 }
569 remove_bpts();
570 disable_surveillance();
571 /* for breakpoint or single step, print the current instr. */
572 if (bp || TRAP(regs) == 0xd00)
573 ppc_inst_dump(regs->nip, 1, 0);
574 printf("enter ? for help\n");
575 mb();
576 xmon_gate = 1;
577 barrier();
578 touch_nmi_watchdog();
579 }
580
581 cmdloop:
582 while (in_xmon) {
583 if (secondary) {
584 spin_begin();
585 if (cpu == xmon_owner) {
586 if (!test_and_set_bit(0, &xmon_taken)) {
587 secondary = 0;
588 spin_end();
589 continue;
590 }
591 /* missed it */
592 while (cpu == xmon_owner)
593 spin_cpu_relax();
594 }
595 spin_cpu_relax();
596 touch_nmi_watchdog();
597 } else {
598 cmd = cmds(regs);
599 if (cmd != 0) {
600 /* exiting xmon */
601 insert_bpts();
602 xmon_gate = 0;
603 wmb();
604 in_xmon = 0;
605 break;
606 }
607 /* have switched to some other cpu */
608 secondary = 1;
609 }
610 }
611 leave:
612 cpumask_clear_cpu(cpu, &cpus_in_xmon);
613 xmon_fault_jmp[cpu] = NULL;
614 #else
615 /* UP is simple... */
616 if (in_xmon) {
617 printf("Exception %lx %s in xmon, returning to main loop\n",
618 regs->trap, getvecname(TRAP(regs)));
619 longjmp(xmon_fault_jmp[0], 1);
620 }
621 if (setjmp(recurse_jmp) == 0) {
622 xmon_fault_jmp[0] = recurse_jmp;
623 in_xmon = 1;
624
625 excprint(regs);
626 bp = at_breakpoint(regs->nip);
627 if (bp) {
628 printf("Stopped at breakpoint %lx (", BP_NUM(bp));
629 xmon_print_symbol(regs->nip, " ", ")\n");
630 }
631 if (unrecoverable_excp(regs))
632 printf("WARNING: exception is not recoverable, "
633 "can't continue\n");
634 remove_bpts();
635 disable_surveillance();
636 /* for breakpoint or single step, print the current instr. */
637 if (bp || TRAP(regs) == 0xd00)
638 ppc_inst_dump(regs->nip, 1, 0);
639 printf("enter ? for help\n");
640 }
641
642 cmd = cmds(regs);
643
644 insert_bpts();
645 in_xmon = 0;
646 #endif
647
648 #ifdef CONFIG_BOOKE
649 if (regs->msr & MSR_DE) {
650 bp = at_breakpoint(regs->nip);
651 if (bp != NULL) {
652 regs->nip = (unsigned long) &bp->instr[0];
653 atomic_inc(&bp->ref_count);
654 }
655 }
656 #else
657 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
658 bp = at_breakpoint(regs->nip);
659 if (bp != NULL) {
660 int stepped = emulate_step(regs, bp->instr[0]);
661 if (stepped == 0) {
662 regs->nip = (unsigned long) &bp->instr[0];
663 atomic_inc(&bp->ref_count);
664 } else if (stepped < 0) {
665 printf("Couldn't single-step %s instruction\n",
666 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
667 }
668 }
669 }
670 #endif
671 insert_cpu_bpts();
672
673 touch_nmi_watchdog();
674 local_irq_restore(flags);
675
676 return cmd != 'X' && cmd != EOF;
677 }
678
679 int xmon(struct pt_regs *excp)
680 {
681 struct pt_regs regs;
682
683 if (excp == NULL) {
684 ppc_save_regs(&regs);
685 excp = &regs;
686 }
687
688 return xmon_core(excp, 0);
689 }
690 EXPORT_SYMBOL(xmon);
691
692 irqreturn_t xmon_irq(int irq, void *d)
693 {
694 unsigned long flags;
695 local_irq_save(flags);
696 printf("Keyboard interrupt\n");
697 xmon(get_irq_regs());
698 local_irq_restore(flags);
699 return IRQ_HANDLED;
700 }
701
702 static int xmon_bpt(struct pt_regs *regs)
703 {
704 struct bpt *bp;
705 unsigned long offset;
706
707 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
708 return 0;
709
710 /* Are we at the trap at bp->instr[1] for some bp? */
711 bp = in_breakpoint_table(regs->nip, &offset);
712 if (bp != NULL && offset == 4) {
713 regs->nip = bp->address + 4;
714 atomic_dec(&bp->ref_count);
715 return 1;
716 }
717
718 /* Are we at a breakpoint? */
719 bp = at_breakpoint(regs->nip);
720 if (!bp)
721 return 0;
722
723 xmon_core(regs, 0);
724
725 return 1;
726 }
727
728 static int xmon_sstep(struct pt_regs *regs)
729 {
730 if (user_mode(regs))
731 return 0;
732 xmon_core(regs, 0);
733 return 1;
734 }
735
736 static int xmon_break_match(struct pt_regs *regs)
737 {
738 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
739 return 0;
740 if (dabr.enabled == 0)
741 return 0;
742 xmon_core(regs, 0);
743 return 1;
744 }
745
746 static int xmon_iabr_match(struct pt_regs *regs)
747 {
748 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
749 return 0;
750 if (iabr == NULL)
751 return 0;
752 xmon_core(regs, 0);
753 return 1;
754 }
755
756 static int xmon_ipi(struct pt_regs *regs)
757 {
758 #ifdef CONFIG_SMP
759 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
760 xmon_core(regs, 1);
761 #endif
762 return 0;
763 }
764
765 static int xmon_fault_handler(struct pt_regs *regs)
766 {
767 struct bpt *bp;
768 unsigned long offset;
769
770 if (in_xmon && catch_memory_errors)
771 handle_fault(regs); /* doesn't return */
772
773 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
774 bp = in_breakpoint_table(regs->nip, &offset);
775 if (bp != NULL) {
776 regs->nip = bp->address + offset;
777 atomic_dec(&bp->ref_count);
778 }
779 }
780
781 return 0;
782 }
783
784 static struct bpt *at_breakpoint(unsigned long pc)
785 {
786 int i;
787 struct bpt *bp;
788
789 bp = bpts;
790 for (i = 0; i < NBPTS; ++i, ++bp)
791 if (bp->enabled && pc == bp->address)
792 return bp;
793 return NULL;
794 }
795
796 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
797 {
798 unsigned long off;
799
800 off = nip - (unsigned long) bpts;
801 if (off >= sizeof(bpts))
802 return NULL;
803 off %= sizeof(struct bpt);
804 if (off != offsetof(struct bpt, instr[0])
805 && off != offsetof(struct bpt, instr[1]))
806 return NULL;
807 *offp = off - offsetof(struct bpt, instr[0]);
808 return (struct bpt *) (nip - off);
809 }
810
811 static struct bpt *new_breakpoint(unsigned long a)
812 {
813 struct bpt *bp;
814
815 a &= ~3UL;
816 bp = at_breakpoint(a);
817 if (bp)
818 return bp;
819
820 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
821 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
822 bp->address = a;
823 bp->instr[1] = bpinstr;
824 store_inst(&bp->instr[1]);
825 return bp;
826 }
827 }
828
829 printf("Sorry, no free breakpoints. Please clear one first.\n");
830 return NULL;
831 }
832
833 static void insert_bpts(void)
834 {
835 int i;
836 struct bpt *bp;
837
838 bp = bpts;
839 for (i = 0; i < NBPTS; ++i, ++bp) {
840 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
841 continue;
842 if (mread(bp->address, &bp->instr[0], 4) != 4) {
843 printf("Couldn't read instruction at %lx, "
844 "disabling breakpoint there\n", bp->address);
845 bp->enabled = 0;
846 continue;
847 }
848 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
849 printf("Breakpoint at %lx is on an mtmsrd or rfid "
850 "instruction, disabling it\n", bp->address);
851 bp->enabled = 0;
852 continue;
853 }
854 store_inst(&bp->instr[0]);
855 if (bp->enabled & BP_CIABR)
856 continue;
857 if (patch_instruction((unsigned int *)bp->address,
858 bpinstr) != 0) {
859 printf("Couldn't write instruction at %lx, "
860 "disabling breakpoint there\n", bp->address);
861 bp->enabled &= ~BP_TRAP;
862 continue;
863 }
864 store_inst((void *)bp->address);
865 }
866 }
867
868 static void insert_cpu_bpts(void)
869 {
870 struct arch_hw_breakpoint brk;
871
872 if (dabr.enabled) {
873 brk.address = dabr.address;
874 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
875 brk.len = 8;
876 __set_breakpoint(&brk);
877 }
878
879 if (iabr)
880 set_ciabr(iabr->address);
881 }
882
883 static void remove_bpts(void)
884 {
885 int i;
886 struct bpt *bp;
887 unsigned instr;
888
889 bp = bpts;
890 for (i = 0; i < NBPTS; ++i, ++bp) {
891 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
892 continue;
893 if (mread(bp->address, &instr, 4) == 4
894 && instr == bpinstr
895 && patch_instruction(
896 (unsigned int *)bp->address, bp->instr[0]) != 0)
897 printf("Couldn't remove breakpoint at %lx\n",
898 bp->address);
899 else
900 store_inst((void *)bp->address);
901 }
902 }
903
904 static void remove_cpu_bpts(void)
905 {
906 hw_breakpoint_disable();
907 write_ciabr(0);
908 }
909
910 static void set_lpp_cmd(void)
911 {
912 unsigned long lpp;
913
914 if (!scanhex(&lpp)) {
915 printf("Invalid number.\n");
916 lpp = 0;
917 }
918 xmon_set_pagination_lpp(lpp);
919 }
920 /* Command interpreting routine */
921 static char *last_cmd;
922
923 static int
924 cmds(struct pt_regs *excp)
925 {
926 int cmd = 0;
927
928 last_cmd = NULL;
929 xmon_regs = excp;
930
931 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
932
933 for(;;) {
934 #ifdef CONFIG_SMP
935 printf("%x:", smp_processor_id());
936 #endif /* CONFIG_SMP */
937 printf("mon> ");
938 flush_input();
939 termch = 0;
940 cmd = skipbl();
941 if( cmd == '\n' ) {
942 if (last_cmd == NULL)
943 continue;
944 take_input(last_cmd);
945 last_cmd = NULL;
946 cmd = inchar();
947 }
948 switch (cmd) {
949 case 'm':
950 cmd = inchar();
951 switch (cmd) {
952 case 'm':
953 case 's':
954 case 'd':
955 memops(cmd);
956 break;
957 case 'l':
958 memlocate();
959 break;
960 case 'z':
961 memzcan();
962 break;
963 case 'i':
964 show_mem(0, NULL);
965 break;
966 default:
967 termch = cmd;
968 memex();
969 }
970 break;
971 case 'd':
972 dump();
973 break;
974 case 'l':
975 symbol_lookup();
976 break;
977 case 'r':
978 prregs(excp); /* print regs */
979 break;
980 case 'e':
981 excprint(excp);
982 break;
983 case 'S':
984 super_regs();
985 break;
986 case 't':
987 backtrace(excp);
988 break;
989 case 'f':
990 cacheflush();
991 break;
992 case 's':
993 if (do_spu_cmd() == 0)
994 break;
995 if (do_step(excp))
996 return cmd;
997 break;
998 case 'x':
999 case 'X':
1000 if (tracing_enabled)
1001 tracing_on();
1002 return cmd;
1003 case EOF:
1004 printf(" <no input ...>\n");
1005 mdelay(2000);
1006 return cmd;
1007 case '?':
1008 xmon_puts(help_string);
1009 break;
1010 case '#':
1011 set_lpp_cmd();
1012 break;
1013 case 'b':
1014 bpt_cmds();
1015 break;
1016 case 'C':
1017 csum();
1018 break;
1019 case 'c':
1020 if (cpu_cmd())
1021 return 0;
1022 break;
1023 case 'z':
1024 bootcmds();
1025 break;
1026 case 'p':
1027 proccall();
1028 break;
1029 case 'P':
1030 show_tasks();
1031 break;
1032 #ifdef CONFIG_PPC_STD_MMU
1033 case 'u':
1034 dump_segments();
1035 break;
1036 #elif defined(CONFIG_44x)
1037 case 'u':
1038 dump_tlb_44x();
1039 break;
1040 #elif defined(CONFIG_PPC_BOOK3E)
1041 case 'u':
1042 dump_tlb_book3e();
1043 break;
1044 #endif
1045 default:
1046 printf("Unrecognized command: ");
1047 do {
1048 if (' ' < cmd && cmd <= '~')
1049 putchar(cmd);
1050 else
1051 printf("\\x%x", cmd);
1052 cmd = inchar();
1053 } while (cmd != '\n');
1054 printf(" (type ? for help)\n");
1055 break;
1056 }
1057 }
1058 }
1059
1060 #ifdef CONFIG_BOOKE
1061 static int do_step(struct pt_regs *regs)
1062 {
1063 regs->msr |= MSR_DE;
1064 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1065 return 1;
1066 }
1067 #else
1068 /*
1069 * Step a single instruction.
1070 * Some instructions we emulate, others we execute with MSR_SE set.
1071 */
1072 static int do_step(struct pt_regs *regs)
1073 {
1074 unsigned int instr;
1075 int stepped;
1076
1077 /* check we are in 64-bit kernel mode, translation enabled */
1078 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1079 if (mread(regs->nip, &instr, 4) == 4) {
1080 stepped = emulate_step(regs, instr);
1081 if (stepped < 0) {
1082 printf("Couldn't single-step %s instruction\n",
1083 (IS_RFID(instr)? "rfid": "mtmsrd"));
1084 return 0;
1085 }
1086 if (stepped > 0) {
1087 regs->trap = 0xd00 | (regs->trap & 1);
1088 printf("stepped to ");
1089 xmon_print_symbol(regs->nip, " ", "\n");
1090 ppc_inst_dump(regs->nip, 1, 0);
1091 return 0;
1092 }
1093 }
1094 }
1095 regs->msr |= MSR_SE;
1096 return 1;
1097 }
1098 #endif
1099
1100 static void bootcmds(void)
1101 {
1102 int cmd;
1103
1104 cmd = inchar();
1105 if (cmd == 'r')
1106 ppc_md.restart(NULL);
1107 else if (cmd == 'h')
1108 ppc_md.halt();
1109 else if (cmd == 'p')
1110 if (pm_power_off)
1111 pm_power_off();
1112 }
1113
1114 static int cpu_cmd(void)
1115 {
1116 #ifdef CONFIG_SMP
1117 unsigned long cpu, first_cpu, last_cpu;
1118 int timeout;
1119
1120 if (!scanhex(&cpu)) {
1121 /* print cpus waiting or in xmon */
1122 printf("cpus stopped:");
1123 last_cpu = first_cpu = NR_CPUS;
1124 for_each_possible_cpu(cpu) {
1125 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1126 if (cpu == last_cpu + 1) {
1127 last_cpu = cpu;
1128 } else {
1129 if (last_cpu != first_cpu)
1130 printf("-0x%lx", last_cpu);
1131 last_cpu = first_cpu = cpu;
1132 printf(" 0x%lx", cpu);
1133 }
1134 }
1135 }
1136 if (last_cpu != first_cpu)
1137 printf("-0x%lx", last_cpu);
1138 printf("\n");
1139 return 0;
1140 }
1141 /* try to switch to cpu specified */
1142 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1143 printf("cpu 0x%x isn't in xmon\n", cpu);
1144 return 0;
1145 }
1146 xmon_taken = 0;
1147 mb();
1148 xmon_owner = cpu;
1149 timeout = 10000000;
1150 while (!xmon_taken) {
1151 if (--timeout == 0) {
1152 if (test_and_set_bit(0, &xmon_taken))
1153 break;
1154 /* take control back */
1155 mb();
1156 xmon_owner = smp_processor_id();
1157 printf("cpu 0x%x didn't take control\n", cpu);
1158 return 0;
1159 }
1160 barrier();
1161 }
1162 return 1;
1163 #else
1164 return 0;
1165 #endif /* CONFIG_SMP */
1166 }
1167
1168 static unsigned short fcstab[256] = {
1169 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1170 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1171 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1172 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1173 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1174 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1175 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1176 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1177 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1178 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1179 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1180 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1181 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1182 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1183 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1184 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1185 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1186 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1187 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1188 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1189 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1190 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1191 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1192 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1193 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1194 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1195 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1196 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1197 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1198 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1199 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1200 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1201 };
1202
1203 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1204
1205 static void
1206 csum(void)
1207 {
1208 unsigned int i;
1209 unsigned short fcs;
1210 unsigned char v;
1211
1212 if (!scanhex(&adrs))
1213 return;
1214 if (!scanhex(&ncsum))
1215 return;
1216 fcs = 0xffff;
1217 for (i = 0; i < ncsum; ++i) {
1218 if (mread(adrs+i, &v, 1) == 0) {
1219 printf("csum stopped at "REG"\n", adrs+i);
1220 break;
1221 }
1222 fcs = FCS(fcs, v);
1223 }
1224 printf("%x\n", fcs);
1225 }
1226
1227 /*
1228 * Check if this is a suitable place to put a breakpoint.
1229 */
1230 static long check_bp_loc(unsigned long addr)
1231 {
1232 unsigned int instr;
1233
1234 addr &= ~3;
1235 if (!is_kernel_addr(addr)) {
1236 printf("Breakpoints may only be placed at kernel addresses\n");
1237 return 0;
1238 }
1239 if (!mread(addr, &instr, sizeof(instr))) {
1240 printf("Can't read instruction at address %lx\n", addr);
1241 return 0;
1242 }
1243 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1244 printf("Breakpoints may not be placed on mtmsrd or rfid "
1245 "instructions\n");
1246 return 0;
1247 }
1248 return 1;
1249 }
1250
1251 static char *breakpoint_help_string =
1252 "Breakpoint command usage:\n"
1253 "b show breakpoints\n"
1254 "b <addr> [cnt] set breakpoint at given instr addr\n"
1255 "bc clear all breakpoints\n"
1256 "bc <n/addr> clear breakpoint number n or at addr\n"
1257 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1258 "bd <addr> [cnt] set hardware data breakpoint\n"
1259 "";
1260
1261 static void
1262 bpt_cmds(void)
1263 {
1264 int cmd;
1265 unsigned long a;
1266 int i;
1267 struct bpt *bp;
1268
1269 cmd = inchar();
1270 switch (cmd) {
1271 #ifndef CONFIG_PPC_8xx
1272 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1273 int mode;
1274 case 'd': /* bd - hardware data breakpoint */
1275 mode = 7;
1276 cmd = inchar();
1277 if (cmd == 'r')
1278 mode = 5;
1279 else if (cmd == 'w')
1280 mode = 6;
1281 else
1282 termch = cmd;
1283 dabr.address = 0;
1284 dabr.enabled = 0;
1285 if (scanhex(&dabr.address)) {
1286 if (!is_kernel_addr(dabr.address)) {
1287 printf(badaddr);
1288 break;
1289 }
1290 dabr.address &= ~HW_BRK_TYPE_DABR;
1291 dabr.enabled = mode | BP_DABR;
1292 }
1293 break;
1294
1295 case 'i': /* bi - hardware instr breakpoint */
1296 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1297 printf("Hardware instruction breakpoint "
1298 "not supported on this cpu\n");
1299 break;
1300 }
1301 if (iabr) {
1302 iabr->enabled &= ~BP_CIABR;
1303 iabr = NULL;
1304 }
1305 if (!scanhex(&a))
1306 break;
1307 if (!check_bp_loc(a))
1308 break;
1309 bp = new_breakpoint(a);
1310 if (bp != NULL) {
1311 bp->enabled |= BP_CIABR;
1312 iabr = bp;
1313 }
1314 break;
1315 #endif
1316
1317 case 'c':
1318 if (!scanhex(&a)) {
1319 /* clear all breakpoints */
1320 for (i = 0; i < NBPTS; ++i)
1321 bpts[i].enabled = 0;
1322 iabr = NULL;
1323 dabr.enabled = 0;
1324 printf("All breakpoints cleared\n");
1325 break;
1326 }
1327
1328 if (a <= NBPTS && a >= 1) {
1329 /* assume a breakpoint number */
1330 bp = &bpts[a-1]; /* bp nums are 1 based */
1331 } else {
1332 /* assume a breakpoint address */
1333 bp = at_breakpoint(a);
1334 if (bp == NULL) {
1335 printf("No breakpoint at %lx\n", a);
1336 break;
1337 }
1338 }
1339
1340 printf("Cleared breakpoint %lx (", BP_NUM(bp));
1341 xmon_print_symbol(bp->address, " ", ")\n");
1342 bp->enabled = 0;
1343 break;
1344
1345 default:
1346 termch = cmd;
1347 cmd = skipbl();
1348 if (cmd == '?') {
1349 printf(breakpoint_help_string);
1350 break;
1351 }
1352 termch = cmd;
1353 if (!scanhex(&a)) {
1354 /* print all breakpoints */
1355 printf(" type address\n");
1356 if (dabr.enabled) {
1357 printf(" data "REG" [", dabr.address);
1358 if (dabr.enabled & 1)
1359 printf("r");
1360 if (dabr.enabled & 2)
1361 printf("w");
1362 printf("]\n");
1363 }
1364 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1365 if (!bp->enabled)
1366 continue;
1367 printf("%2x %s ", BP_NUM(bp),
1368 (bp->enabled & BP_CIABR) ? "inst": "trap");
1369 xmon_print_symbol(bp->address, " ", "\n");
1370 }
1371 break;
1372 }
1373
1374 if (!check_bp_loc(a))
1375 break;
1376 bp = new_breakpoint(a);
1377 if (bp != NULL)
1378 bp->enabled |= BP_TRAP;
1379 break;
1380 }
1381 }
1382
1383 /* Very cheap human name for vector lookup. */
1384 static
1385 const char *getvecname(unsigned long vec)
1386 {
1387 char *ret;
1388
1389 switch (vec) {
1390 case 0x100: ret = "(System Reset)"; break;
1391 case 0x200: ret = "(Machine Check)"; break;
1392 case 0x300: ret = "(Data Access)"; break;
1393 case 0x380:
1394 if (radix_enabled())
1395 ret = "(Data Access Out of Range)";
1396 else
1397 ret = "(Data SLB Access)";
1398 break;
1399 case 0x400: ret = "(Instruction Access)"; break;
1400 case 0x480:
1401 if (radix_enabled())
1402 ret = "(Instruction Access Out of Range)";
1403 else
1404 ret = "(Instruction SLB Access)";
1405 break;
1406 case 0x500: ret = "(Hardware Interrupt)"; break;
1407 case 0x600: ret = "(Alignment)"; break;
1408 case 0x700: ret = "(Program Check)"; break;
1409 case 0x800: ret = "(FPU Unavailable)"; break;
1410 case 0x900: ret = "(Decrementer)"; break;
1411 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1412 case 0xa00: ret = "(Doorbell)"; break;
1413 case 0xc00: ret = "(System Call)"; break;
1414 case 0xd00: ret = "(Single Step)"; break;
1415 case 0xe40: ret = "(Emulation Assist)"; break;
1416 case 0xe60: ret = "(HMI)"; break;
1417 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1418 case 0xf00: ret = "(Performance Monitor)"; break;
1419 case 0xf20: ret = "(Altivec Unavailable)"; break;
1420 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1421 case 0x1500: ret = "(Denormalisation)"; break;
1422 case 0x1700: ret = "(Altivec Assist)"; break;
1423 default: ret = "";
1424 }
1425 return ret;
1426 }
1427
1428 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1429 unsigned long *endp)
1430 {
1431 unsigned long size, offset;
1432 const char *name;
1433
1434 *startp = *endp = 0;
1435 if (pc == 0)
1436 return;
1437 if (setjmp(bus_error_jmp) == 0) {
1438 catch_memory_errors = 1;
1439 sync();
1440 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1441 if (name != NULL) {
1442 *startp = pc - offset;
1443 *endp = pc - offset + size;
1444 }
1445 sync();
1446 }
1447 catch_memory_errors = 0;
1448 }
1449
1450 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1451 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1452
1453 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1454 unsigned long pc)
1455 {
1456 int max_to_print = 64;
1457 unsigned long ip;
1458 unsigned long newsp;
1459 unsigned long marker;
1460 struct pt_regs regs;
1461
1462 while (max_to_print--) {
1463 if (!is_kernel_addr(sp)) {
1464 if (sp != 0)
1465 printf("SP (%lx) is in userspace\n", sp);
1466 break;
1467 }
1468
1469 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1470 || !mread(sp, &newsp, sizeof(unsigned long))) {
1471 printf("Couldn't read stack frame at %lx\n", sp);
1472 break;
1473 }
1474
1475 /*
1476 * For the first stack frame, try to work out if
1477 * LR and/or the saved LR value in the bottommost
1478 * stack frame are valid.
1479 */
1480 if ((pc | lr) != 0) {
1481 unsigned long fnstart, fnend;
1482 unsigned long nextip;
1483 int printip = 1;
1484
1485 get_function_bounds(pc, &fnstart, &fnend);
1486 nextip = 0;
1487 if (newsp > sp)
1488 mread(newsp + LRSAVE_OFFSET, &nextip,
1489 sizeof(unsigned long));
1490 if (lr == ip) {
1491 if (!is_kernel_addr(lr)
1492 || (fnstart <= lr && lr < fnend))
1493 printip = 0;
1494 } else if (lr == nextip) {
1495 printip = 0;
1496 } else if (is_kernel_addr(lr)
1497 && !(fnstart <= lr && lr < fnend)) {
1498 printf("[link register ] ");
1499 xmon_print_symbol(lr, " ", "\n");
1500 }
1501 if (printip) {
1502 printf("["REG"] ", sp);
1503 xmon_print_symbol(ip, " ", " (unreliable)\n");
1504 }
1505 pc = lr = 0;
1506
1507 } else {
1508 printf("["REG"] ", sp);
1509 xmon_print_symbol(ip, " ", "\n");
1510 }
1511
1512 /* Look for "regshere" marker to see if this is
1513 an exception frame. */
1514 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1515 && marker == STACK_FRAME_REGS_MARKER) {
1516 if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
1517 != sizeof(regs)) {
1518 printf("Couldn't read registers at %lx\n",
1519 sp + STACK_FRAME_OVERHEAD);
1520 break;
1521 }
1522 printf("--- Exception: %lx %s at ", regs.trap,
1523 getvecname(TRAP(&regs)));
1524 pc = regs.nip;
1525 lr = regs.link;
1526 xmon_print_symbol(pc, " ", "\n");
1527 }
1528
1529 if (newsp == 0)
1530 break;
1531
1532 sp = newsp;
1533 }
1534 }
1535
1536 static void backtrace(struct pt_regs *excp)
1537 {
1538 unsigned long sp;
1539
1540 if (scanhex(&sp))
1541 xmon_show_stack(sp, 0, 0);
1542 else
1543 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1544 scannl();
1545 }
1546
1547 static void print_bug_trap(struct pt_regs *regs)
1548 {
1549 #ifdef CONFIG_BUG
1550 const struct bug_entry *bug;
1551 unsigned long addr;
1552
1553 if (regs->msr & MSR_PR)
1554 return; /* not in kernel */
1555 addr = regs->nip; /* address of trap instruction */
1556 if (!is_kernel_addr(addr))
1557 return;
1558 bug = find_bug(regs->nip);
1559 if (bug == NULL)
1560 return;
1561 if (is_warning_bug(bug))
1562 return;
1563
1564 #ifdef CONFIG_DEBUG_BUGVERBOSE
1565 printf("kernel BUG at %s:%u!\n",
1566 bug->file, bug->line);
1567 #else
1568 printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
1569 #endif
1570 #endif /* CONFIG_BUG */
1571 }
1572
1573 static void excprint(struct pt_regs *fp)
1574 {
1575 unsigned long trap;
1576
1577 #ifdef CONFIG_SMP
1578 printf("cpu 0x%x: ", smp_processor_id());
1579 #endif /* CONFIG_SMP */
1580
1581 trap = TRAP(fp);
1582 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1583 printf(" pc: ");
1584 xmon_print_symbol(fp->nip, ": ", "\n");
1585
1586 printf(" lr: ", fp->link);
1587 xmon_print_symbol(fp->link, ": ", "\n");
1588
1589 printf(" sp: %lx\n", fp->gpr[1]);
1590 printf(" msr: %lx\n", fp->msr);
1591
1592 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1593 printf(" dar: %lx\n", fp->dar);
1594 if (trap != 0x380)
1595 printf(" dsisr: %lx\n", fp->dsisr);
1596 }
1597
1598 printf(" current = 0x%lx\n", current);
1599 #ifdef CONFIG_PPC64
1600 printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1601 local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1602 #endif
1603 if (current) {
1604 printf(" pid = %ld, comm = %s\n",
1605 current->pid, current->comm);
1606 }
1607
1608 if (trap == 0x700)
1609 print_bug_trap(fp);
1610
1611 printf(linux_banner);
1612 }
1613
1614 static void prregs(struct pt_regs *fp)
1615 {
1616 int n, trap;
1617 unsigned long base;
1618 struct pt_regs regs;
1619
1620 if (scanhex(&base)) {
1621 if (setjmp(bus_error_jmp) == 0) {
1622 catch_memory_errors = 1;
1623 sync();
1624 regs = *(struct pt_regs *)base;
1625 sync();
1626 __delay(200);
1627 } else {
1628 catch_memory_errors = 0;
1629 printf("*** Error reading registers from "REG"\n",
1630 base);
1631 return;
1632 }
1633 catch_memory_errors = 0;
1634 fp = &regs;
1635 }
1636
1637 #ifdef CONFIG_PPC64
1638 if (FULL_REGS(fp)) {
1639 for (n = 0; n < 16; ++n)
1640 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1641 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1642 } else {
1643 for (n = 0; n < 7; ++n)
1644 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1645 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1646 }
1647 #else
1648 for (n = 0; n < 32; ++n) {
1649 printf("R%.2d = %.8x%s", n, fp->gpr[n],
1650 (n & 3) == 3? "\n": " ");
1651 if (n == 12 && !FULL_REGS(fp)) {
1652 printf("\n");
1653 break;
1654 }
1655 }
1656 #endif
1657 printf("pc = ");
1658 xmon_print_symbol(fp->nip, " ", "\n");
1659 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1660 printf("cfar= ");
1661 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1662 }
1663 printf("lr = ");
1664 xmon_print_symbol(fp->link, " ", "\n");
1665 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1666 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1667 fp->ctr, fp->xer, fp->trap);
1668 trap = TRAP(fp);
1669 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1670 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1671 }
1672
1673 static void cacheflush(void)
1674 {
1675 int cmd;
1676 unsigned long nflush;
1677
1678 cmd = inchar();
1679 if (cmd != 'i')
1680 termch = cmd;
1681 scanhex((void *)&adrs);
1682 if (termch != '\n')
1683 termch = 0;
1684 nflush = 1;
1685 scanhex(&nflush);
1686 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1687 if (setjmp(bus_error_jmp) == 0) {
1688 catch_memory_errors = 1;
1689 sync();
1690
1691 if (cmd != 'i') {
1692 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1693 cflush((void *) adrs);
1694 } else {
1695 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1696 cinval((void *) adrs);
1697 }
1698 sync();
1699 /* wait a little while to see if we get a machine check */
1700 __delay(200);
1701 }
1702 catch_memory_errors = 0;
1703 }
1704
1705 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1706 extern void xmon_mtspr(int spr, unsigned long value);
1707
1708 static int
1709 read_spr(int n, unsigned long *vp)
1710 {
1711 unsigned long ret = -1UL;
1712 int ok = 0;
1713
1714 if (setjmp(bus_error_jmp) == 0) {
1715 catch_spr_faults = 1;
1716 sync();
1717
1718 ret = xmon_mfspr(n, *vp);
1719
1720 sync();
1721 *vp = ret;
1722 ok = 1;
1723 }
1724 catch_spr_faults = 0;
1725
1726 return ok;
1727 }
1728
1729 static void
1730 write_spr(int n, unsigned long val)
1731 {
1732 if (setjmp(bus_error_jmp) == 0) {
1733 catch_spr_faults = 1;
1734 sync();
1735
1736 xmon_mtspr(n, val);
1737
1738 sync();
1739 } else {
1740 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1741 }
1742 catch_spr_faults = 0;
1743 }
1744
1745 static void dump_206_sprs(void)
1746 {
1747 #ifdef CONFIG_PPC64
1748 if (!cpu_has_feature(CPU_FTR_ARCH_206))
1749 return;
1750
1751 /* Actually some of these pre-date 2.06, but whatevs */
1752
1753 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8x\n",
1754 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1755 printf("dscr = %.16lx ppr = %.16lx pir = %.8x\n",
1756 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1757 printf("amr = %.16lx uamor = %.16lx\n",
1758 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1759
1760 if (!(mfmsr() & MSR_HV))
1761 return;
1762
1763 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
1764 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1765 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
1766 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1767 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
1768 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1769 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
1770 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1771 printf("dabr = %.16lx dabrx = %.16lx\n",
1772 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1773 #endif
1774 }
1775
1776 static void dump_207_sprs(void)
1777 {
1778 #ifdef CONFIG_PPC64
1779 unsigned long msr;
1780
1781 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1782 return;
1783
1784 printf("dpdes = %.16lx tir = %.16lx cir = %.8x\n",
1785 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1786
1787 printf("fscr = %.16lx tar = %.16lx pspb = %.8x\n",
1788 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1789
1790 msr = mfmsr();
1791 if (msr & MSR_TM) {
1792 /* Only if TM has been enabled in the kernel */
1793 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
1794 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1795 mfspr(SPRN_TEXASR));
1796 }
1797
1798 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
1799 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1800 printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n",
1801 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1802 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1803 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8x\n",
1804 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1805 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8x\n",
1806 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1807 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
1808 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1809 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
1810
1811 if (!(msr & MSR_HV))
1812 return;
1813
1814 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
1815 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1816 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
1817 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1818 #endif
1819 }
1820
1821 static void dump_300_sprs(void)
1822 {
1823 #ifdef CONFIG_PPC64
1824 bool hv = mfmsr() & MSR_HV;
1825
1826 if (!cpu_has_feature(CPU_FTR_ARCH_300))
1827 return;
1828
1829 printf("pidr = %.16lx tidr = %.16lx\n",
1830 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1831 printf("asdr = %.16lx psscr = %.16lx\n",
1832 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1833 : mfspr(SPRN_PSSCR_PR));
1834
1835 if (!hv)
1836 return;
1837
1838 printf("ptcr = %.16lx\n",
1839 mfspr(SPRN_PTCR));
1840 #endif
1841 }
1842
1843 static void dump_one_spr(int spr, bool show_unimplemented)
1844 {
1845 unsigned long val;
1846
1847 val = 0xdeadbeef;
1848 if (!read_spr(spr, &val)) {
1849 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1850 return;
1851 }
1852
1853 if (val == 0xdeadbeef) {
1854 /* Looks like read was a nop, confirm */
1855 val = 0x0badcafe;
1856 if (!read_spr(spr, &val)) {
1857 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1858 return;
1859 }
1860
1861 if (val == 0x0badcafe) {
1862 if (show_unimplemented)
1863 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1864 return;
1865 }
1866 }
1867
1868 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1869 }
1870
1871 static void super_regs(void)
1872 {
1873 static unsigned long regno;
1874 int cmd;
1875 int spr;
1876
1877 cmd = skipbl();
1878
1879 switch (cmd) {
1880 case '\n': {
1881 unsigned long sp, toc;
1882 asm("mr %0,1" : "=r" (sp) :);
1883 asm("mr %0,2" : "=r" (toc) :);
1884
1885 printf("msr = "REG" sprg0 = "REG"\n",
1886 mfmsr(), mfspr(SPRN_SPRG0));
1887 printf("pvr = "REG" sprg1 = "REG"\n",
1888 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1889 printf("dec = "REG" sprg2 = "REG"\n",
1890 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1891 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1892 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1893
1894 dump_206_sprs();
1895 dump_207_sprs();
1896 dump_300_sprs();
1897
1898 return;
1899 }
1900 case 'w': {
1901 unsigned long val;
1902 scanhex(&regno);
1903 val = 0;
1904 read_spr(regno, &val);
1905 scanhex(&val);
1906 write_spr(regno, val);
1907 dump_one_spr(regno, true);
1908 break;
1909 }
1910 case 'r':
1911 scanhex(&regno);
1912 dump_one_spr(regno, true);
1913 break;
1914 case 'a':
1915 /* dump ALL SPRs */
1916 for (spr = 1; spr < 1024; ++spr)
1917 dump_one_spr(spr, false);
1918 break;
1919 }
1920
1921 scannl();
1922 }
1923
1924 /*
1925 * Stuff for reading and writing memory safely
1926 */
1927 static int
1928 mread(unsigned long adrs, void *buf, int size)
1929 {
1930 volatile int n;
1931 char *p, *q;
1932
1933 n = 0;
1934 if (setjmp(bus_error_jmp) == 0) {
1935 catch_memory_errors = 1;
1936 sync();
1937 p = (char *)adrs;
1938 q = (char *)buf;
1939 switch (size) {
1940 case 2:
1941 *(u16 *)q = *(u16 *)p;
1942 break;
1943 case 4:
1944 *(u32 *)q = *(u32 *)p;
1945 break;
1946 case 8:
1947 *(u64 *)q = *(u64 *)p;
1948 break;
1949 default:
1950 for( ; n < size; ++n) {
1951 *q++ = *p++;
1952 sync();
1953 }
1954 }
1955 sync();
1956 /* wait a little while to see if we get a machine check */
1957 __delay(200);
1958 n = size;
1959 }
1960 catch_memory_errors = 0;
1961 return n;
1962 }
1963
1964 static int
1965 mwrite(unsigned long adrs, void *buf, int size)
1966 {
1967 volatile int n;
1968 char *p, *q;
1969
1970 n = 0;
1971 if (setjmp(bus_error_jmp) == 0) {
1972 catch_memory_errors = 1;
1973 sync();
1974 p = (char *) adrs;
1975 q = (char *) buf;
1976 switch (size) {
1977 case 2:
1978 *(u16 *)p = *(u16 *)q;
1979 break;
1980 case 4:
1981 *(u32 *)p = *(u32 *)q;
1982 break;
1983 case 8:
1984 *(u64 *)p = *(u64 *)q;
1985 break;
1986 default:
1987 for ( ; n < size; ++n) {
1988 *p++ = *q++;
1989 sync();
1990 }
1991 }
1992 sync();
1993 /* wait a little while to see if we get a machine check */
1994 __delay(200);
1995 n = size;
1996 } else {
1997 printf("*** Error writing address "REG"\n", adrs + n);
1998 }
1999 catch_memory_errors = 0;
2000 return n;
2001 }
2002
2003 static int fault_type;
2004 static int fault_except;
2005 static char *fault_chars[] = { "--", "**", "##" };
2006
2007 static int handle_fault(struct pt_regs *regs)
2008 {
2009 fault_except = TRAP(regs);
2010 switch (TRAP(regs)) {
2011 case 0x200:
2012 fault_type = 0;
2013 break;
2014 case 0x300:
2015 case 0x380:
2016 fault_type = 1;
2017 break;
2018 default:
2019 fault_type = 2;
2020 }
2021
2022 longjmp(bus_error_jmp, 1);
2023
2024 return 0;
2025 }
2026
2027 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2028
2029 static void
2030 byterev(unsigned char *val, int size)
2031 {
2032 int t;
2033
2034 switch (size) {
2035 case 2:
2036 SWAP(val[0], val[1], t);
2037 break;
2038 case 4:
2039 SWAP(val[0], val[3], t);
2040 SWAP(val[1], val[2], t);
2041 break;
2042 case 8: /* is there really any use for this? */
2043 SWAP(val[0], val[7], t);
2044 SWAP(val[1], val[6], t);
2045 SWAP(val[2], val[5], t);
2046 SWAP(val[3], val[4], t);
2047 break;
2048 }
2049 }
2050
2051 static int brev;
2052 static int mnoread;
2053
2054 static char *memex_help_string =
2055 "Memory examine command usage:\n"
2056 "m [addr] [flags] examine/change memory\n"
2057 " addr is optional. will start where left off.\n"
2058 " flags may include chars from this set:\n"
2059 " b modify by bytes (default)\n"
2060 " w modify by words (2 byte)\n"
2061 " l modify by longs (4 byte)\n"
2062 " d modify by doubleword (8 byte)\n"
2063 " r toggle reverse byte order mode\n"
2064 " n do not read memory (for i/o spaces)\n"
2065 " . ok to read (default)\n"
2066 "NOTE: flags are saved as defaults\n"
2067 "";
2068
2069 static char *memex_subcmd_help_string =
2070 "Memory examine subcommands:\n"
2071 " hexval write this val to current location\n"
2072 " 'string' write chars from string to this location\n"
2073 " ' increment address\n"
2074 " ^ decrement address\n"
2075 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2076 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2077 " ` clear no-read flag\n"
2078 " ; stay at this addr\n"
2079 " v change to byte mode\n"
2080 " w change to word (2 byte) mode\n"
2081 " l change to long (4 byte) mode\n"
2082 " u change to doubleword (8 byte) mode\n"
2083 " m addr change current addr\n"
2084 " n toggle no-read flag\n"
2085 " r toggle byte reverse flag\n"
2086 " < count back up count bytes\n"
2087 " > count skip forward count bytes\n"
2088 " x exit this mode\n"
2089 "";
2090
2091 static void
2092 memex(void)
2093 {
2094 int cmd, inc, i, nslash;
2095 unsigned long n;
2096 unsigned char val[16];
2097
2098 scanhex((void *)&adrs);
2099 cmd = skipbl();
2100 if (cmd == '?') {
2101 printf(memex_help_string);
2102 return;
2103 } else {
2104 termch = cmd;
2105 }
2106 last_cmd = "m\n";
2107 while ((cmd = skipbl()) != '\n') {
2108 switch( cmd ){
2109 case 'b': size = 1; break;
2110 case 'w': size = 2; break;
2111 case 'l': size = 4; break;
2112 case 'd': size = 8; break;
2113 case 'r': brev = !brev; break;
2114 case 'n': mnoread = 1; break;
2115 case '.': mnoread = 0; break;
2116 }
2117 }
2118 if( size <= 0 )
2119 size = 1;
2120 else if( size > 8 )
2121 size = 8;
2122 for(;;){
2123 if (!mnoread)
2124 n = mread(adrs, val, size);
2125 printf(REG"%c", adrs, brev? 'r': ' ');
2126 if (!mnoread) {
2127 if (brev)
2128 byterev(val, size);
2129 putchar(' ');
2130 for (i = 0; i < n; ++i)
2131 printf("%.2x", val[i]);
2132 for (; i < size; ++i)
2133 printf("%s", fault_chars[fault_type]);
2134 }
2135 putchar(' ');
2136 inc = size;
2137 nslash = 0;
2138 for(;;){
2139 if( scanhex(&n) ){
2140 for (i = 0; i < size; ++i)
2141 val[i] = n >> (i * 8);
2142 if (!brev)
2143 byterev(val, size);
2144 mwrite(adrs, val, size);
2145 inc = size;
2146 }
2147 cmd = skipbl();
2148 if (cmd == '\n')
2149 break;
2150 inc = 0;
2151 switch (cmd) {
2152 case '\'':
2153 for(;;){
2154 n = inchar();
2155 if( n == '\\' )
2156 n = bsesc();
2157 else if( n == '\'' )
2158 break;
2159 for (i = 0; i < size; ++i)
2160 val[i] = n >> (i * 8);
2161 if (!brev)
2162 byterev(val, size);
2163 mwrite(adrs, val, size);
2164 adrs += size;
2165 }
2166 adrs -= size;
2167 inc = size;
2168 break;
2169 case ',':
2170 adrs += size;
2171 break;
2172 case '.':
2173 mnoread = 0;
2174 break;
2175 case ';':
2176 break;
2177 case 'x':
2178 case EOF:
2179 scannl();
2180 return;
2181 case 'b':
2182 case 'v':
2183 size = 1;
2184 break;
2185 case 'w':
2186 size = 2;
2187 break;
2188 case 'l':
2189 size = 4;
2190 break;
2191 case 'u':
2192 size = 8;
2193 break;
2194 case '^':
2195 adrs -= size;
2196 break;
2197 case '/':
2198 if (nslash > 0)
2199 adrs -= 1 << nslash;
2200 else
2201 nslash = 0;
2202 nslash += 4;
2203 adrs += 1 << nslash;
2204 break;
2205 case '\\':
2206 if (nslash < 0)
2207 adrs += 1 << -nslash;
2208 else
2209 nslash = 0;
2210 nslash -= 4;
2211 adrs -= 1 << -nslash;
2212 break;
2213 case 'm':
2214 scanhex((void *)&adrs);
2215 break;
2216 case 'n':
2217 mnoread = 1;
2218 break;
2219 case 'r':
2220 brev = !brev;
2221 break;
2222 case '<':
2223 n = size;
2224 scanhex(&n);
2225 adrs -= n;
2226 break;
2227 case '>':
2228 n = size;
2229 scanhex(&n);
2230 adrs += n;
2231 break;
2232 case '?':
2233 printf(memex_subcmd_help_string);
2234 break;
2235 }
2236 }
2237 adrs += inc;
2238 }
2239 }
2240
2241 static int
2242 bsesc(void)
2243 {
2244 int c;
2245
2246 c = inchar();
2247 switch( c ){
2248 case 'n': c = '\n'; break;
2249 case 'r': c = '\r'; break;
2250 case 'b': c = '\b'; break;
2251 case 't': c = '\t'; break;
2252 }
2253 return c;
2254 }
2255
2256 static void xmon_rawdump (unsigned long adrs, long ndump)
2257 {
2258 long n, m, r, nr;
2259 unsigned char temp[16];
2260
2261 for (n = ndump; n > 0;) {
2262 r = n < 16? n: 16;
2263 nr = mread(adrs, temp, r);
2264 adrs += nr;
2265 for (m = 0; m < r; ++m) {
2266 if (m < nr)
2267 printf("%.2x", temp[m]);
2268 else
2269 printf("%s", fault_chars[fault_type]);
2270 }
2271 n -= r;
2272 if (nr < r)
2273 break;
2274 }
2275 printf("\n");
2276 }
2277
2278 static void dump_tracing(void)
2279 {
2280 int c;
2281
2282 c = inchar();
2283 if (c == 'c')
2284 ftrace_dump(DUMP_ORIG);
2285 else
2286 ftrace_dump(DUMP_ALL);
2287 }
2288
2289 #ifdef CONFIG_PPC64
2290 static void dump_one_paca(int cpu)
2291 {
2292 struct paca_struct *p;
2293 #ifdef CONFIG_PPC_STD_MMU_64
2294 int i = 0;
2295 #endif
2296
2297 if (setjmp(bus_error_jmp) != 0) {
2298 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2299 return;
2300 }
2301
2302 catch_memory_errors = 1;
2303 sync();
2304
2305 p = &paca[cpu];
2306
2307 printf("paca for cpu 0x%x @ %p:\n", cpu, p);
2308
2309 printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2310 printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2311 printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2312
2313 #define DUMP(paca, name, format) \
2314 printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2315 offsetof(struct paca_struct, name));
2316
2317 DUMP(p, lock_token, "x");
2318 DUMP(p, paca_index, "x");
2319 DUMP(p, kernel_toc, "lx");
2320 DUMP(p, kernelbase, "lx");
2321 DUMP(p, kernel_msr, "lx");
2322 DUMP(p, emergency_sp, "p");
2323 #ifdef CONFIG_PPC_BOOK3S_64
2324 DUMP(p, nmi_emergency_sp, "p");
2325 DUMP(p, mc_emergency_sp, "p");
2326 DUMP(p, in_nmi, "x");
2327 DUMP(p, in_mce, "x");
2328 DUMP(p, hmi_event_available, "x");
2329 #endif
2330 DUMP(p, data_offset, "lx");
2331 DUMP(p, hw_cpu_id, "x");
2332 DUMP(p, cpu_start, "x");
2333 DUMP(p, kexec_state, "x");
2334 #ifdef CONFIG_PPC_STD_MMU_64
2335 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2336 u64 esid, vsid;
2337
2338 if (!p->slb_shadow_ptr)
2339 continue;
2340
2341 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2342 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2343
2344 if (esid || vsid) {
2345 printf(" slb_shadow[%d]: = 0x%016lx 0x%016lx\n",
2346 i, esid, vsid);
2347 }
2348 }
2349 DUMP(p, vmalloc_sllp, "x");
2350 DUMP(p, slb_cache_ptr, "x");
2351 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2352 printf(" slb_cache[%d]: = 0x%016lx\n", i, p->slb_cache[i]);
2353
2354 DUMP(p, rfi_flush_fallback_area, "px");
2355 #endif
2356 DUMP(p, dscr_default, "llx");
2357 #ifdef CONFIG_PPC_BOOK3E
2358 DUMP(p, pgd, "p");
2359 DUMP(p, kernel_pgd, "p");
2360 DUMP(p, tcd_ptr, "p");
2361 DUMP(p, mc_kstack, "p");
2362 DUMP(p, crit_kstack, "p");
2363 DUMP(p, dbg_kstack, "p");
2364 #endif
2365 DUMP(p, __current, "p");
2366 DUMP(p, kstack, "lx");
2367 DUMP(p, stab_rr, "lx");
2368 DUMP(p, saved_r1, "lx");
2369 DUMP(p, trap_save, "x");
2370 DUMP(p, soft_enabled, "x");
2371 DUMP(p, irq_happened, "x");
2372 DUMP(p, io_sync, "x");
2373 DUMP(p, irq_work_pending, "x");
2374 DUMP(p, nap_state_lost, "x");
2375 DUMP(p, sprg_vdso, "llx");
2376
2377 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2378 DUMP(p, tm_scratch, "llx");
2379 #endif
2380
2381 #ifdef CONFIG_PPC_POWERNV
2382 DUMP(p, core_idle_state_ptr, "p");
2383 DUMP(p, thread_idle_state, "x");
2384 DUMP(p, thread_mask, "x");
2385 DUMP(p, subcore_sibling_mask, "x");
2386 #endif
2387
2388 DUMP(p, accounting.utime, "llx");
2389 DUMP(p, accounting.stime, "llx");
2390 DUMP(p, accounting.utime_scaled, "llx");
2391 DUMP(p, accounting.starttime, "llx");
2392 DUMP(p, accounting.starttime_user, "llx");
2393 DUMP(p, accounting.startspurr, "llx");
2394 DUMP(p, accounting.utime_sspurr, "llx");
2395 DUMP(p, accounting.steal_time, "llx");
2396 #undef DUMP
2397
2398 catch_memory_errors = 0;
2399 sync();
2400 }
2401
2402 static void dump_all_pacas(void)
2403 {
2404 int cpu;
2405
2406 if (num_possible_cpus() == 0) {
2407 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2408 return;
2409 }
2410
2411 for_each_possible_cpu(cpu)
2412 dump_one_paca(cpu);
2413 }
2414
2415 static void dump_pacas(void)
2416 {
2417 unsigned long num;
2418 int c;
2419
2420 c = inchar();
2421 if (c == 'a') {
2422 dump_all_pacas();
2423 return;
2424 }
2425
2426 termch = c; /* Put c back, it wasn't 'a' */
2427
2428 if (scanhex(&num))
2429 dump_one_paca(num);
2430 else
2431 dump_one_paca(xmon_owner);
2432 }
2433 #endif
2434
2435 #ifdef CONFIG_PPC_POWERNV
2436 static void dump_one_xive(int cpu)
2437 {
2438 unsigned int hwid = get_hard_smp_processor_id(cpu);
2439
2440 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2441 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2442 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2443 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2444 opal_xive_dump(XIVE_DUMP_VP, hwid);
2445 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2446
2447 if (setjmp(bus_error_jmp) != 0) {
2448 catch_memory_errors = 0;
2449 printf("*** Error dumping xive on cpu %d\n", cpu);
2450 return;
2451 }
2452
2453 catch_memory_errors = 1;
2454 sync();
2455 xmon_xive_do_dump(cpu);
2456 sync();
2457 __delay(200);
2458 catch_memory_errors = 0;
2459 }
2460
2461 static void dump_all_xives(void)
2462 {
2463 int cpu;
2464
2465 if (num_possible_cpus() == 0) {
2466 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2467 return;
2468 }
2469
2470 for_each_possible_cpu(cpu)
2471 dump_one_xive(cpu);
2472 }
2473
2474 static void dump_one_xive_irq(u32 num)
2475 {
2476 s64 rc;
2477 __be64 vp;
2478 u8 prio;
2479 __be32 lirq;
2480
2481 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2482 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2483 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2484 }
2485
2486 static void dump_xives(void)
2487 {
2488 unsigned long num;
2489 int c;
2490
2491 if (!xive_enabled()) {
2492 printf("Xive disabled on this system\n");
2493 return;
2494 }
2495
2496 c = inchar();
2497 if (c == 'a') {
2498 dump_all_xives();
2499 return;
2500 } else if (c == 'i') {
2501 if (scanhex(&num))
2502 dump_one_xive_irq(num);
2503 return;
2504 }
2505
2506 termch = c; /* Put c back, it wasn't 'a' */
2507
2508 if (scanhex(&num))
2509 dump_one_xive(num);
2510 else
2511 dump_one_xive(xmon_owner);
2512 }
2513 #endif /* CONFIG_PPC_POWERNV */
2514
2515 static void dump_by_size(unsigned long addr, long count, int size)
2516 {
2517 unsigned char temp[16];
2518 int i, j;
2519 u64 val;
2520
2521 count = ALIGN(count, 16);
2522
2523 for (i = 0; i < count; i += 16, addr += 16) {
2524 printf(REG, addr);
2525
2526 if (mread(addr, temp, 16) != 16) {
2527 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2528 return;
2529 }
2530
2531 for (j = 0; j < 16; j += size) {
2532 putchar(' ');
2533 switch (size) {
2534 case 1: val = temp[j]; break;
2535 case 2: val = *(u16 *)&temp[j]; break;
2536 case 4: val = *(u32 *)&temp[j]; break;
2537 case 8: val = *(u64 *)&temp[j]; break;
2538 default: val = 0;
2539 }
2540
2541 printf("%0*lx", size * 2, val);
2542 }
2543 printf("\n");
2544 }
2545 }
2546
2547 static void
2548 dump(void)
2549 {
2550 static char last[] = { "d?\n" };
2551 int c;
2552
2553 c = inchar();
2554
2555 #ifdef CONFIG_PPC64
2556 if (c == 'p') {
2557 xmon_start_pagination();
2558 dump_pacas();
2559 xmon_end_pagination();
2560 return;
2561 }
2562 #endif
2563 #ifdef CONFIG_PPC_POWERNV
2564 if (c == 'x') {
2565 xmon_start_pagination();
2566 dump_xives();
2567 xmon_end_pagination();
2568 return;
2569 }
2570 #endif
2571
2572 if (c == 't') {
2573 dump_tracing();
2574 return;
2575 }
2576
2577 if (c == '\n')
2578 termch = c;
2579
2580 scanhex((void *)&adrs);
2581 if (termch != '\n')
2582 termch = 0;
2583 if (c == 'i') {
2584 scanhex(&nidump);
2585 if (nidump == 0)
2586 nidump = 16;
2587 else if (nidump > MAX_DUMP)
2588 nidump = MAX_DUMP;
2589 adrs += ppc_inst_dump(adrs, nidump, 1);
2590 last_cmd = "di\n";
2591 } else if (c == 'l') {
2592 dump_log_buf();
2593 } else if (c == 'o') {
2594 dump_opal_msglog();
2595 } else if (c == 'r') {
2596 scanhex(&ndump);
2597 if (ndump == 0)
2598 ndump = 64;
2599 xmon_rawdump(adrs, ndump);
2600 adrs += ndump;
2601 last_cmd = "dr\n";
2602 } else {
2603 scanhex(&ndump);
2604 if (ndump == 0)
2605 ndump = 64;
2606 else if (ndump > MAX_DUMP)
2607 ndump = MAX_DUMP;
2608
2609 switch (c) {
2610 case '8':
2611 case '4':
2612 case '2':
2613 case '1':
2614 ndump = ALIGN(ndump, 16);
2615 dump_by_size(adrs, ndump, c - '0');
2616 last[1] = c;
2617 last_cmd = last;
2618 break;
2619 default:
2620 prdump(adrs, ndump);
2621 last_cmd = "d\n";
2622 }
2623
2624 adrs += ndump;
2625 }
2626 }
2627
2628 static void
2629 prdump(unsigned long adrs, long ndump)
2630 {
2631 long n, m, c, r, nr;
2632 unsigned char temp[16];
2633
2634 for (n = ndump; n > 0;) {
2635 printf(REG, adrs);
2636 putchar(' ');
2637 r = n < 16? n: 16;
2638 nr = mread(adrs, temp, r);
2639 adrs += nr;
2640 for (m = 0; m < r; ++m) {
2641 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2642 putchar(' ');
2643 if (m < nr)
2644 printf("%.2x", temp[m]);
2645 else
2646 printf("%s", fault_chars[fault_type]);
2647 }
2648 for (; m < 16; ++m) {
2649 if ((m & (sizeof(long) - 1)) == 0)
2650 putchar(' ');
2651 printf(" ");
2652 }
2653 printf(" |");
2654 for (m = 0; m < r; ++m) {
2655 if (m < nr) {
2656 c = temp[m];
2657 putchar(' ' <= c && c <= '~'? c: '.');
2658 } else
2659 putchar(' ');
2660 }
2661 n -= r;
2662 for (; m < 16; ++m)
2663 putchar(' ');
2664 printf("|\n");
2665 if (nr < r)
2666 break;
2667 }
2668 }
2669
2670 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2671
2672 static int
2673 generic_inst_dump(unsigned long adr, long count, int praddr,
2674 instruction_dump_func dump_func)
2675 {
2676 int nr, dotted;
2677 unsigned long first_adr;
2678 unsigned long inst, last_inst = 0;
2679 unsigned char val[4];
2680
2681 dotted = 0;
2682 for (first_adr = adr; count > 0; --count, adr += 4) {
2683 nr = mread(adr, val, 4);
2684 if (nr == 0) {
2685 if (praddr) {
2686 const char *x = fault_chars[fault_type];
2687 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2688 }
2689 break;
2690 }
2691 inst = GETWORD(val);
2692 if (adr > first_adr && inst == last_inst) {
2693 if (!dotted) {
2694 printf(" ...\n");
2695 dotted = 1;
2696 }
2697 continue;
2698 }
2699 dotted = 0;
2700 last_inst = inst;
2701 if (praddr)
2702 printf(REG" %.8x", adr, inst);
2703 printf("\t");
2704 dump_func(inst, adr);
2705 printf("\n");
2706 }
2707 return adr - first_adr;
2708 }
2709
2710 static int
2711 ppc_inst_dump(unsigned long adr, long count, int praddr)
2712 {
2713 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2714 }
2715
2716 void
2717 print_address(unsigned long addr)
2718 {
2719 xmon_print_symbol(addr, "\t# ", "");
2720 }
2721
2722 void
2723 dump_log_buf(void)
2724 {
2725 struct kmsg_dumper dumper = { .active = 1 };
2726 unsigned char buf[128];
2727 size_t len;
2728
2729 if (setjmp(bus_error_jmp) != 0) {
2730 printf("Error dumping printk buffer!\n");
2731 return;
2732 }
2733
2734 catch_memory_errors = 1;
2735 sync();
2736
2737 kmsg_dump_rewind_nolock(&dumper);
2738 xmon_start_pagination();
2739 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2740 buf[len] = '\0';
2741 printf("%s", buf);
2742 }
2743 xmon_end_pagination();
2744
2745 sync();
2746 /* wait a little while to see if we get a machine check */
2747 __delay(200);
2748 catch_memory_errors = 0;
2749 }
2750
2751 #ifdef CONFIG_PPC_POWERNV
2752 static void dump_opal_msglog(void)
2753 {
2754 unsigned char buf[128];
2755 ssize_t res;
2756 loff_t pos = 0;
2757
2758 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2759 printf("Machine is not running OPAL firmware.\n");
2760 return;
2761 }
2762
2763 if (setjmp(bus_error_jmp) != 0) {
2764 printf("Error dumping OPAL msglog!\n");
2765 return;
2766 }
2767
2768 catch_memory_errors = 1;
2769 sync();
2770
2771 xmon_start_pagination();
2772 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2773 if (res < 0) {
2774 printf("Error dumping OPAL msglog! Error: %zd\n", res);
2775 break;
2776 }
2777 buf[res] = '\0';
2778 printf("%s", buf);
2779 pos += res;
2780 }
2781 xmon_end_pagination();
2782
2783 sync();
2784 /* wait a little while to see if we get a machine check */
2785 __delay(200);
2786 catch_memory_errors = 0;
2787 }
2788 #endif
2789
2790 /*
2791 * Memory operations - move, set, print differences
2792 */
2793 static unsigned long mdest; /* destination address */
2794 static unsigned long msrc; /* source address */
2795 static unsigned long mval; /* byte value to set memory to */
2796 static unsigned long mcount; /* # bytes to affect */
2797 static unsigned long mdiffs; /* max # differences to print */
2798
2799 static void
2800 memops(int cmd)
2801 {
2802 scanhex((void *)&mdest);
2803 if( termch != '\n' )
2804 termch = 0;
2805 scanhex((void *)(cmd == 's'? &mval: &msrc));
2806 if( termch != '\n' )
2807 termch = 0;
2808 scanhex((void *)&mcount);
2809 switch( cmd ){
2810 case 'm':
2811 memmove((void *)mdest, (void *)msrc, mcount);
2812 break;
2813 case 's':
2814 memset((void *)mdest, mval, mcount);
2815 break;
2816 case 'd':
2817 if( termch != '\n' )
2818 termch = 0;
2819 scanhex((void *)&mdiffs);
2820 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2821 break;
2822 }
2823 }
2824
2825 static void
2826 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2827 {
2828 unsigned n, prt;
2829
2830 prt = 0;
2831 for( n = nb; n > 0; --n )
2832 if( *p1++ != *p2++ )
2833 if( ++prt <= maxpr )
2834 printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2835 p1[-1], p2 - 1, p2[-1]);
2836 if( prt > maxpr )
2837 printf("Total of %d differences\n", prt);
2838 }
2839
2840 static unsigned mend;
2841 static unsigned mask;
2842
2843 static void
2844 memlocate(void)
2845 {
2846 unsigned a, n;
2847 unsigned char val[4];
2848
2849 last_cmd = "ml";
2850 scanhex((void *)&mdest);
2851 if (termch != '\n') {
2852 termch = 0;
2853 scanhex((void *)&mend);
2854 if (termch != '\n') {
2855 termch = 0;
2856 scanhex((void *)&mval);
2857 mask = ~0;
2858 if (termch != '\n') termch = 0;
2859 scanhex((void *)&mask);
2860 }
2861 }
2862 n = 0;
2863 for (a = mdest; a < mend; a += 4) {
2864 if (mread(a, val, 4) == 4
2865 && ((GETWORD(val) ^ mval) & mask) == 0) {
2866 printf("%.16x: %.16x\n", a, GETWORD(val));
2867 if (++n >= 10)
2868 break;
2869 }
2870 }
2871 }
2872
2873 static unsigned long mskip = 0x1000;
2874 static unsigned long mlim = 0xffffffff;
2875
2876 static void
2877 memzcan(void)
2878 {
2879 unsigned char v;
2880 unsigned a;
2881 int ok, ook;
2882
2883 scanhex(&mdest);
2884 if (termch != '\n') termch = 0;
2885 scanhex(&mskip);
2886 if (termch != '\n') termch = 0;
2887 scanhex(&mlim);
2888 ook = 0;
2889 for (a = mdest; a < mlim; a += mskip) {
2890 ok = mread(a, &v, 1);
2891 if (ok && !ook) {
2892 printf("%.8x .. ", a);
2893 } else if (!ok && ook)
2894 printf("%.8x\n", a - mskip);
2895 ook = ok;
2896 if (a + mskip < a)
2897 break;
2898 }
2899 if (ook)
2900 printf("%.8x\n", a - mskip);
2901 }
2902
2903 static void show_task(struct task_struct *tsk)
2904 {
2905 char state;
2906
2907 /*
2908 * Cloned from kdb_task_state_char(), which is not entirely
2909 * appropriate for calling from xmon. This could be moved
2910 * to a common, generic, routine used by both.
2911 */
2912 state = (tsk->state == 0) ? 'R' :
2913 (tsk->state < 0) ? 'U' :
2914 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2915 (tsk->state & TASK_STOPPED) ? 'T' :
2916 (tsk->state & TASK_TRACED) ? 'C' :
2917 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2918 (tsk->exit_state & EXIT_DEAD) ? 'E' :
2919 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2920
2921 printf("%p %016lx %6d %6d %c %2d %s\n", tsk,
2922 tsk->thread.ksp,
2923 tsk->pid, tsk->parent->pid,
2924 state, task_thread_info(tsk)->cpu,
2925 tsk->comm);
2926 }
2927
2928 static void show_tasks(void)
2929 {
2930 unsigned long tskv;
2931 struct task_struct *tsk = NULL;
2932
2933 printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
2934
2935 if (scanhex(&tskv))
2936 tsk = (struct task_struct *)tskv;
2937
2938 if (setjmp(bus_error_jmp) != 0) {
2939 catch_memory_errors = 0;
2940 printf("*** Error dumping task %p\n", tsk);
2941 return;
2942 }
2943
2944 catch_memory_errors = 1;
2945 sync();
2946
2947 if (tsk)
2948 show_task(tsk);
2949 else
2950 for_each_process(tsk)
2951 show_task(tsk);
2952
2953 sync();
2954 __delay(200);
2955 catch_memory_errors = 0;
2956 }
2957
2958 static void proccall(void)
2959 {
2960 unsigned long args[8];
2961 unsigned long ret;
2962 int i;
2963 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
2964 unsigned long, unsigned long, unsigned long,
2965 unsigned long, unsigned long, unsigned long);
2966 callfunc_t func;
2967
2968 if (!scanhex(&adrs))
2969 return;
2970 if (termch != '\n')
2971 termch = 0;
2972 for (i = 0; i < 8; ++i)
2973 args[i] = 0;
2974 for (i = 0; i < 8; ++i) {
2975 if (!scanhex(&args[i]) || termch == '\n')
2976 break;
2977 termch = 0;
2978 }
2979 func = (callfunc_t) adrs;
2980 ret = 0;
2981 if (setjmp(bus_error_jmp) == 0) {
2982 catch_memory_errors = 1;
2983 sync();
2984 ret = func(args[0], args[1], args[2], args[3],
2985 args[4], args[5], args[6], args[7]);
2986 sync();
2987 printf("return value is 0x%lx\n", ret);
2988 } else {
2989 printf("*** %x exception occurred\n", fault_except);
2990 }
2991 catch_memory_errors = 0;
2992 }
2993
2994 /* Input scanning routines */
2995 int
2996 skipbl(void)
2997 {
2998 int c;
2999
3000 if( termch != 0 ){
3001 c = termch;
3002 termch = 0;
3003 } else
3004 c = inchar();
3005 while( c == ' ' || c == '\t' )
3006 c = inchar();
3007 return c;
3008 }
3009
3010 #define N_PTREGS 44
3011 static char *regnames[N_PTREGS] = {
3012 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3013 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3014 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3015 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3016 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3017 #ifdef CONFIG_PPC64
3018 "softe",
3019 #else
3020 "mq",
3021 #endif
3022 "trap", "dar", "dsisr", "res"
3023 };
3024
3025 int
3026 scanhex(unsigned long *vp)
3027 {
3028 int c, d;
3029 unsigned long v;
3030
3031 c = skipbl();
3032 if (c == '%') {
3033 /* parse register name */
3034 char regname[8];
3035 int i;
3036
3037 for (i = 0; i < sizeof(regname) - 1; ++i) {
3038 c = inchar();
3039 if (!isalnum(c)) {
3040 termch = c;
3041 break;
3042 }
3043 regname[i] = c;
3044 }
3045 regname[i] = 0;
3046 for (i = 0; i < N_PTREGS; ++i) {
3047 if (strcmp(regnames[i], regname) == 0) {
3048 if (xmon_regs == NULL) {
3049 printf("regs not available\n");
3050 return 0;
3051 }
3052 *vp = ((unsigned long *)xmon_regs)[i];
3053 return 1;
3054 }
3055 }
3056 printf("invalid register name '%%%s'\n", regname);
3057 return 0;
3058 }
3059
3060 /* skip leading "0x" if any */
3061
3062 if (c == '0') {
3063 c = inchar();
3064 if (c == 'x') {
3065 c = inchar();
3066 } else {
3067 d = hexdigit(c);
3068 if (d == EOF) {
3069 termch = c;
3070 *vp = 0;
3071 return 1;
3072 }
3073 }
3074 } else if (c == '$') {
3075 int i;
3076 for (i=0; i<63; i++) {
3077 c = inchar();
3078 if (isspace(c) || c == '\0') {
3079 termch = c;
3080 break;
3081 }
3082 tmpstr[i] = c;
3083 }
3084 tmpstr[i++] = 0;
3085 *vp = 0;
3086 if (setjmp(bus_error_jmp) == 0) {
3087 catch_memory_errors = 1;
3088 sync();
3089 *vp = kallsyms_lookup_name(tmpstr);
3090 sync();
3091 }
3092 catch_memory_errors = 0;
3093 if (!(*vp)) {
3094 printf("unknown symbol '%s'\n", tmpstr);
3095 return 0;
3096 }
3097 return 1;
3098 }
3099
3100 d = hexdigit(c);
3101 if (d == EOF) {
3102 termch = c;
3103 return 0;
3104 }
3105 v = 0;
3106 do {
3107 v = (v << 4) + d;
3108 c = inchar();
3109 d = hexdigit(c);
3110 } while (d != EOF);
3111 termch = c;
3112 *vp = v;
3113 return 1;
3114 }
3115
3116 static void
3117 scannl(void)
3118 {
3119 int c;
3120
3121 c = termch;
3122 termch = 0;
3123 while( c != '\n' )
3124 c = inchar();
3125 }
3126
3127 static int hexdigit(int c)
3128 {
3129 if( '0' <= c && c <= '9' )
3130 return c - '0';
3131 if( 'A' <= c && c <= 'F' )
3132 return c - ('A' - 10);
3133 if( 'a' <= c && c <= 'f' )
3134 return c - ('a' - 10);
3135 return EOF;
3136 }
3137
3138 void
3139 getstring(char *s, int size)
3140 {
3141 int c;
3142
3143 c = skipbl();
3144 do {
3145 if( size > 1 ){
3146 *s++ = c;
3147 --size;
3148 }
3149 c = inchar();
3150 } while( c != ' ' && c != '\t' && c != '\n' );
3151 termch = c;
3152 *s = 0;
3153 }
3154
3155 static char line[256];
3156 static char *lineptr;
3157
3158 static void
3159 flush_input(void)
3160 {
3161 lineptr = NULL;
3162 }
3163
3164 static int
3165 inchar(void)
3166 {
3167 if (lineptr == NULL || *lineptr == 0) {
3168 if (xmon_gets(line, sizeof(line)) == NULL) {
3169 lineptr = NULL;
3170 return EOF;
3171 }
3172 lineptr = line;
3173 }
3174 return *lineptr++;
3175 }
3176
3177 static void
3178 take_input(char *str)
3179 {
3180 lineptr = str;
3181 }
3182
3183
3184 static void
3185 symbol_lookup(void)
3186 {
3187 int type = inchar();
3188 unsigned long addr;
3189 static char tmp[64];
3190
3191 switch (type) {
3192 case 'a':
3193 if (scanhex(&addr))
3194 xmon_print_symbol(addr, ": ", "\n");
3195 termch = 0;
3196 break;
3197 case 's':
3198 getstring(tmp, 64);
3199 if (setjmp(bus_error_jmp) == 0) {
3200 catch_memory_errors = 1;
3201 sync();
3202 addr = kallsyms_lookup_name(tmp);
3203 if (addr)
3204 printf("%s: %lx\n", tmp, addr);
3205 else
3206 printf("Symbol '%s' not found.\n", tmp);
3207 sync();
3208 }
3209 catch_memory_errors = 0;
3210 termch = 0;
3211 break;
3212 }
3213 }
3214
3215
3216 /* Print an address in numeric and symbolic form (if possible) */
3217 static void xmon_print_symbol(unsigned long address, const char *mid,
3218 const char *after)
3219 {
3220 char *modname;
3221 const char *name = NULL;
3222 unsigned long offset, size;
3223
3224 printf(REG, address);
3225 if (setjmp(bus_error_jmp) == 0) {
3226 catch_memory_errors = 1;
3227 sync();
3228 name = kallsyms_lookup(address, &size, &offset, &modname,
3229 tmpstr);
3230 sync();
3231 /* wait a little while to see if we get a machine check */
3232 __delay(200);
3233 }
3234
3235 catch_memory_errors = 0;
3236
3237 if (name) {
3238 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3239 if (modname)
3240 printf(" [%s]", modname);
3241 }
3242 printf("%s", after);
3243 }
3244
3245 #ifdef CONFIG_PPC_STD_MMU_64
3246 void dump_segments(void)
3247 {
3248 int i;
3249 unsigned long esid,vsid;
3250 unsigned long llp;
3251
3252 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3253
3254 for (i = 0; i < mmu_slb_size; i++) {
3255 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3256 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3257
3258 if (!esid && !vsid)
3259 continue;
3260
3261 printf("%02d %016lx %016lx", i, esid, vsid);
3262
3263 if (!(esid & SLB_ESID_V)) {
3264 printf("\n");
3265 continue;
3266 }
3267
3268 llp = vsid & SLB_VSID_LLP;
3269 if (vsid & SLB_VSID_B_1T) {
3270 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3271 GET_ESID_1T(esid),
3272 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3273 llp);
3274 } else {
3275 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3276 GET_ESID(esid),
3277 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3278 llp);
3279 }
3280 }
3281 }
3282 #endif
3283
3284 #ifdef CONFIG_PPC_STD_MMU_32
3285 void dump_segments(void)
3286 {
3287 int i;
3288
3289 printf("sr0-15 =");
3290 for (i = 0; i < 16; ++i)
3291 printf(" %x", mfsrin(i));
3292 printf("\n");
3293 }
3294 #endif
3295
3296 #ifdef CONFIG_44x
3297 static void dump_tlb_44x(void)
3298 {
3299 int i;
3300
3301 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3302 unsigned long w0,w1,w2;
3303 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3304 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3305 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3306 printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3307 if (w0 & PPC44x_TLB_VALID) {
3308 printf("V %08x -> %01x%08x %c%c%c%c%c",
3309 w0 & PPC44x_TLB_EPN_MASK,
3310 w1 & PPC44x_TLB_ERPN_MASK,
3311 w1 & PPC44x_TLB_RPN_MASK,
3312 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3313 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3314 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3315 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3316 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3317 }
3318 printf("\n");
3319 }
3320 }
3321 #endif /* CONFIG_44x */
3322
3323 #ifdef CONFIG_PPC_BOOK3E
3324 static void dump_tlb_book3e(void)
3325 {
3326 u32 mmucfg, pidmask, lpidmask;
3327 u64 ramask;
3328 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3329 int mmu_version;
3330 static const char *pgsz_names[] = {
3331 " 1K",
3332 " 2K",
3333 " 4K",
3334 " 8K",
3335 " 16K",
3336 " 32K",
3337 " 64K",
3338 "128K",
3339 "256K",
3340 "512K",
3341 " 1M",
3342 " 2M",
3343 " 4M",
3344 " 8M",
3345 " 16M",
3346 " 32M",
3347 " 64M",
3348 "128M",
3349 "256M",
3350 "512M",
3351 " 1G",
3352 " 2G",
3353 " 4G",
3354 " 8G",
3355 " 16G",
3356 " 32G",
3357 " 64G",
3358 "128G",
3359 "256G",
3360 "512G",
3361 " 1T",
3362 " 2T",
3363 };
3364
3365 /* Gather some infos about the MMU */
3366 mmucfg = mfspr(SPRN_MMUCFG);
3367 mmu_version = (mmucfg & 3) + 1;
3368 ntlbs = ((mmucfg >> 2) & 3) + 1;
3369 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3370 lpidsz = (mmucfg >> 24) & 0xf;
3371 rasz = (mmucfg >> 16) & 0x7f;
3372 if ((mmu_version > 1) && (mmucfg & 0x10000))
3373 lrat = 1;
3374 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3375 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3376 pidmask = (1ul << pidsz) - 1;
3377 lpidmask = (1ul << lpidsz) - 1;
3378 ramask = (1ull << rasz) - 1;
3379
3380 for (tlb = 0; tlb < ntlbs; tlb++) {
3381 u32 tlbcfg;
3382 int nent, assoc, new_cc = 1;
3383 printf("TLB %d:\n------\n", tlb);
3384 switch(tlb) {
3385 case 0:
3386 tlbcfg = mfspr(SPRN_TLB0CFG);
3387 break;
3388 case 1:
3389 tlbcfg = mfspr(SPRN_TLB1CFG);
3390 break;
3391 case 2:
3392 tlbcfg = mfspr(SPRN_TLB2CFG);
3393 break;
3394 case 3:
3395 tlbcfg = mfspr(SPRN_TLB3CFG);
3396 break;
3397 default:
3398 printf("Unsupported TLB number !\n");
3399 continue;
3400 }
3401 nent = tlbcfg & 0xfff;
3402 assoc = (tlbcfg >> 24) & 0xff;
3403 for (i = 0; i < nent; i++) {
3404 u32 mas0 = MAS0_TLBSEL(tlb);
3405 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3406 u64 mas2 = 0;
3407 u64 mas7_mas3;
3408 int esel = i, cc = i;
3409
3410 if (assoc != 0) {
3411 cc = i / assoc;
3412 esel = i % assoc;
3413 mas2 = cc * 0x1000;
3414 }
3415
3416 mas0 |= MAS0_ESEL(esel);
3417 mtspr(SPRN_MAS0, mas0);
3418 mtspr(SPRN_MAS1, mas1);
3419 mtspr(SPRN_MAS2, mas2);
3420 asm volatile("tlbre 0,0,0" : : : "memory");
3421 mas1 = mfspr(SPRN_MAS1);
3422 mas2 = mfspr(SPRN_MAS2);
3423 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3424 if (assoc && (i % assoc) == 0)
3425 new_cc = 1;
3426 if (!(mas1 & MAS1_VALID))
3427 continue;
3428 if (assoc == 0)
3429 printf("%04x- ", i);
3430 else if (new_cc)
3431 printf("%04x-%c", cc, 'A' + esel);
3432 else
3433 printf(" |%c", 'A' + esel);
3434 new_cc = 0;
3435 printf(" %016llx %04x %s %c%c AS%c",
3436 mas2 & ~0x3ffull,
3437 (mas1 >> 16) & 0x3fff,
3438 pgsz_names[(mas1 >> 7) & 0x1f],
3439 mas1 & MAS1_IND ? 'I' : ' ',
3440 mas1 & MAS1_IPROT ? 'P' : ' ',
3441 mas1 & MAS1_TS ? '1' : '0');
3442 printf(" %c%c%c%c%c%c%c",
3443 mas2 & MAS2_X0 ? 'a' : ' ',
3444 mas2 & MAS2_X1 ? 'v' : ' ',
3445 mas2 & MAS2_W ? 'w' : ' ',
3446 mas2 & MAS2_I ? 'i' : ' ',
3447 mas2 & MAS2_M ? 'm' : ' ',
3448 mas2 & MAS2_G ? 'g' : ' ',
3449 mas2 & MAS2_E ? 'e' : ' ');
3450 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3451 if (mas1 & MAS1_IND)
3452 printf(" %s\n",
3453 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3454 else
3455 printf(" U%c%c%c S%c%c%c\n",
3456 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3457 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3458 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3459 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3460 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3461 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3462 }
3463 }
3464 }
3465 #endif /* CONFIG_PPC_BOOK3E */
3466
3467 static void xmon_init(int enable)
3468 {
3469 if (enable) {
3470 __debugger = xmon;
3471 __debugger_ipi = xmon_ipi;
3472 __debugger_bpt = xmon_bpt;
3473 __debugger_sstep = xmon_sstep;
3474 __debugger_iabr_match = xmon_iabr_match;
3475 __debugger_break_match = xmon_break_match;
3476 __debugger_fault_handler = xmon_fault_handler;
3477
3478 #ifdef CONFIG_PPC_PSERIES
3479 /*
3480 * Get the token here to avoid trying to get a lock
3481 * during the crash, causing a deadlock.
3482 */
3483 set_indicator_token = rtas_token("set-indicator");
3484 #endif
3485 } else {
3486 __debugger = NULL;
3487 __debugger_ipi = NULL;
3488 __debugger_bpt = NULL;
3489 __debugger_sstep = NULL;
3490 __debugger_iabr_match = NULL;
3491 __debugger_break_match = NULL;
3492 __debugger_fault_handler = NULL;
3493 }
3494 }
3495
3496 #ifdef CONFIG_MAGIC_SYSRQ
3497 static void sysrq_handle_xmon(int key)
3498 {
3499 /* ensure xmon is enabled */
3500 xmon_init(1);
3501 debugger(get_irq_regs());
3502 if (!xmon_on)
3503 xmon_init(0);
3504 }
3505
3506 static struct sysrq_key_op sysrq_xmon_op = {
3507 .handler = sysrq_handle_xmon,
3508 .help_msg = "xmon(x)",
3509 .action_msg = "Entering xmon",
3510 };
3511
3512 static int __init setup_xmon_sysrq(void)
3513 {
3514 register_sysrq_key('x', &sysrq_xmon_op);
3515 return 0;
3516 }
3517 device_initcall(setup_xmon_sysrq);
3518 #endif /* CONFIG_MAGIC_SYSRQ */
3519
3520 #ifdef CONFIG_DEBUG_FS
3521 static int xmon_dbgfs_set(void *data, u64 val)
3522 {
3523 xmon_on = !!val;
3524 xmon_init(xmon_on);
3525
3526 return 0;
3527 }
3528
3529 static int xmon_dbgfs_get(void *data, u64 *val)
3530 {
3531 *val = xmon_on;
3532 return 0;
3533 }
3534
3535 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3536 xmon_dbgfs_set, "%llu\n");
3537
3538 static int __init setup_xmon_dbgfs(void)
3539 {
3540 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3541 &xmon_dbgfs_ops);
3542 return 0;
3543 }
3544 device_initcall(setup_xmon_dbgfs);
3545 #endif /* CONFIG_DEBUG_FS */
3546
3547 static int xmon_early __initdata;
3548
3549 static int __init early_parse_xmon(char *p)
3550 {
3551 if (!p || strncmp(p, "early", 5) == 0) {
3552 /* just "xmon" is equivalent to "xmon=early" */
3553 xmon_init(1);
3554 xmon_early = 1;
3555 xmon_on = 1;
3556 } else if (strncmp(p, "on", 2) == 0) {
3557 xmon_init(1);
3558 xmon_on = 1;
3559 } else if (strncmp(p, "off", 3) == 0)
3560 xmon_on = 0;
3561 else
3562 return 1;
3563
3564 return 0;
3565 }
3566 early_param("xmon", early_parse_xmon);
3567
3568 void __init xmon_setup(void)
3569 {
3570 if (xmon_on)
3571 xmon_init(1);
3572 if (xmon_early)
3573 debugger(NULL);
3574 }
3575
3576 #ifdef CONFIG_SPU_BASE
3577
3578 struct spu_info {
3579 struct spu *spu;
3580 u64 saved_mfc_sr1_RW;
3581 u32 saved_spu_runcntl_RW;
3582 unsigned long dump_addr;
3583 u8 stopped_ok;
3584 };
3585
3586 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
3587
3588 static struct spu_info spu_info[XMON_NUM_SPUS];
3589
3590 void xmon_register_spus(struct list_head *list)
3591 {
3592 struct spu *spu;
3593
3594 list_for_each_entry(spu, list, full_list) {
3595 if (spu->number >= XMON_NUM_SPUS) {
3596 WARN_ON(1);
3597 continue;
3598 }
3599
3600 spu_info[spu->number].spu = spu;
3601 spu_info[spu->number].stopped_ok = 0;
3602 spu_info[spu->number].dump_addr = (unsigned long)
3603 spu_info[spu->number].spu->local_store;
3604 }
3605 }
3606
3607 static void stop_spus(void)
3608 {
3609 struct spu *spu;
3610 int i;
3611 u64 tmp;
3612
3613 for (i = 0; i < XMON_NUM_SPUS; i++) {
3614 if (!spu_info[i].spu)
3615 continue;
3616
3617 if (setjmp(bus_error_jmp) == 0) {
3618 catch_memory_errors = 1;
3619 sync();
3620
3621 spu = spu_info[i].spu;
3622
3623 spu_info[i].saved_spu_runcntl_RW =
3624 in_be32(&spu->problem->spu_runcntl_RW);
3625
3626 tmp = spu_mfc_sr1_get(spu);
3627 spu_info[i].saved_mfc_sr1_RW = tmp;
3628
3629 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3630 spu_mfc_sr1_set(spu, tmp);
3631
3632 sync();
3633 __delay(200);
3634
3635 spu_info[i].stopped_ok = 1;
3636
3637 printf("Stopped spu %.2d (was %s)\n", i,
3638 spu_info[i].saved_spu_runcntl_RW ?
3639 "running" : "stopped");
3640 } else {
3641 catch_memory_errors = 0;
3642 printf("*** Error stopping spu %.2d\n", i);
3643 }
3644 catch_memory_errors = 0;
3645 }
3646 }
3647
3648 static void restart_spus(void)
3649 {
3650 struct spu *spu;
3651 int i;
3652
3653 for (i = 0; i < XMON_NUM_SPUS; i++) {
3654 if (!spu_info[i].spu)
3655 continue;
3656
3657 if (!spu_info[i].stopped_ok) {
3658 printf("*** Error, spu %d was not successfully stopped"
3659 ", not restarting\n", i);
3660 continue;
3661 }
3662
3663 if (setjmp(bus_error_jmp) == 0) {
3664 catch_memory_errors = 1;
3665 sync();
3666
3667 spu = spu_info[i].spu;
3668 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3669 out_be32(&spu->problem->spu_runcntl_RW,
3670 spu_info[i].saved_spu_runcntl_RW);
3671
3672 sync();
3673 __delay(200);
3674
3675 printf("Restarted spu %.2d\n", i);
3676 } else {
3677 catch_memory_errors = 0;
3678 printf("*** Error restarting spu %.2d\n", i);
3679 }
3680 catch_memory_errors = 0;
3681 }
3682 }
3683
3684 #define DUMP_WIDTH 23
3685 #define DUMP_VALUE(format, field, value) \
3686 do { \
3687 if (setjmp(bus_error_jmp) == 0) { \
3688 catch_memory_errors = 1; \
3689 sync(); \
3690 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3691 #field, value); \
3692 sync(); \
3693 __delay(200); \
3694 } else { \
3695 catch_memory_errors = 0; \
3696 printf(" %-*s = *** Error reading field.\n", \
3697 DUMP_WIDTH, #field); \
3698 } \
3699 catch_memory_errors = 0; \
3700 } while (0)
3701
3702 #define DUMP_FIELD(obj, format, field) \
3703 DUMP_VALUE(format, field, obj->field)
3704
3705 static void dump_spu_fields(struct spu *spu)
3706 {
3707 printf("Dumping spu fields at address %p:\n", spu);
3708
3709 DUMP_FIELD(spu, "0x%x", number);
3710 DUMP_FIELD(spu, "%s", name);
3711 DUMP_FIELD(spu, "0x%lx", local_store_phys);
3712 DUMP_FIELD(spu, "0x%p", local_store);
3713 DUMP_FIELD(spu, "0x%lx", ls_size);
3714 DUMP_FIELD(spu, "0x%x", node);
3715 DUMP_FIELD(spu, "0x%lx", flags);
3716 DUMP_FIELD(spu, "%d", class_0_pending);
3717 DUMP_FIELD(spu, "0x%lx", class_0_dar);
3718 DUMP_FIELD(spu, "0x%lx", class_1_dar);
3719 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3720 DUMP_FIELD(spu, "0x%lx", irqs[0]);
3721 DUMP_FIELD(spu, "0x%lx", irqs[1]);
3722 DUMP_FIELD(spu, "0x%lx", irqs[2]);
3723 DUMP_FIELD(spu, "0x%x", slb_replace);
3724 DUMP_FIELD(spu, "%d", pid);
3725 DUMP_FIELD(spu, "0x%p", mm);
3726 DUMP_FIELD(spu, "0x%p", ctx);
3727 DUMP_FIELD(spu, "0x%p", rq);
3728 DUMP_FIELD(spu, "0x%p", timestamp);
3729 DUMP_FIELD(spu, "0x%lx", problem_phys);
3730 DUMP_FIELD(spu, "0x%p", problem);
3731 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3732 in_be32(&spu->problem->spu_runcntl_RW));
3733 DUMP_VALUE("0x%x", problem->spu_status_R,
3734 in_be32(&spu->problem->spu_status_R));
3735 DUMP_VALUE("0x%x", problem->spu_npc_RW,
3736 in_be32(&spu->problem->spu_npc_RW));
3737 DUMP_FIELD(spu, "0x%p", priv2);
3738 DUMP_FIELD(spu, "0x%p", pdata);
3739 }
3740
3741 int
3742 spu_inst_dump(unsigned long adr, long count, int praddr)
3743 {
3744 return generic_inst_dump(adr, count, praddr, print_insn_spu);
3745 }
3746
3747 static void dump_spu_ls(unsigned long num, int subcmd)
3748 {
3749 unsigned long offset, addr, ls_addr;
3750
3751 if (setjmp(bus_error_jmp) == 0) {
3752 catch_memory_errors = 1;
3753 sync();
3754 ls_addr = (unsigned long)spu_info[num].spu->local_store;
3755 sync();
3756 __delay(200);
3757 } else {
3758 catch_memory_errors = 0;
3759 printf("*** Error: accessing spu info for spu %d\n", num);
3760 return;
3761 }
3762 catch_memory_errors = 0;
3763
3764 if (scanhex(&offset))
3765 addr = ls_addr + offset;
3766 else
3767 addr = spu_info[num].dump_addr;
3768
3769 if (addr >= ls_addr + LS_SIZE) {
3770 printf("*** Error: address outside of local store\n");
3771 return;
3772 }
3773
3774 switch (subcmd) {
3775 case 'i':
3776 addr += spu_inst_dump(addr, 16, 1);
3777 last_cmd = "sdi\n";
3778 break;
3779 default:
3780 prdump(addr, 64);
3781 addr += 64;
3782 last_cmd = "sd\n";
3783 break;
3784 }
3785
3786 spu_info[num].dump_addr = addr;
3787 }
3788
3789 static int do_spu_cmd(void)
3790 {
3791 static unsigned long num = 0;
3792 int cmd, subcmd = 0;
3793
3794 cmd = inchar();
3795 switch (cmd) {
3796 case 's':
3797 stop_spus();
3798 break;
3799 case 'r':
3800 restart_spus();
3801 break;
3802 case 'd':
3803 subcmd = inchar();
3804 if (isxdigit(subcmd) || subcmd == '\n')
3805 termch = subcmd;
3806 case 'f':
3807 scanhex(&num);
3808 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3809 printf("*** Error: invalid spu number\n");
3810 return 0;
3811 }
3812
3813 switch (cmd) {
3814 case 'f':
3815 dump_spu_fields(spu_info[num].spu);
3816 break;
3817 default:
3818 dump_spu_ls(num, subcmd);
3819 break;
3820 }
3821
3822 break;
3823 default:
3824 return -1;
3825 }
3826
3827 return 0;
3828 }
3829 #else /* ! CONFIG_SPU_BASE */
3830 static int do_spu_cmd(void)
3831 {
3832 return -1;
3833 }
3834 #endif
Linux with added FPC-III support