x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / arch / s390 / include / asm / tlbflush.h
blob8c840f0904f307b4faef8cbe46772bb037890e4e
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _S390_TLBFLUSH_H
3 #define _S390_TLBFLUSH_H
5 #include <linux/mm.h>
6 #include <linux/sched.h>
7 #include <asm/processor.h>
8 #include <asm/pgalloc.h>
9 #include <asm/pgtable.h>
12 * Flush all TLB entries on the local CPU.
14 static inline void __tlb_flush_local(void)
16 asm volatile("ptlb" : : : "memory");
20 * Flush TLB entries for a specific ASCE on all CPUs
22 static inline void __tlb_flush_idte(unsigned long asce)
24 unsigned long opt;
26 opt = IDTE_PTOA;
27 if (MACHINE_HAS_TLB_GUEST)
28 opt |= IDTE_GUEST_ASCE;
29 /* Global TLB flush for the mm */
30 asm volatile(
31 " .insn rrf,0xb98e0000,0,%0,%1,0"
32 : : "a" (opt), "a" (asce) : "cc");
35 #ifdef CONFIG_SMP
36 void smp_ptlb_all(void);
39 * Flush all TLB entries on all CPUs.
41 static inline void __tlb_flush_global(void)
43 unsigned int dummy = 0;
45 csp(&dummy, 0, 0);
49 * Flush TLB entries for a specific mm on all CPUs (in case gmap is used
50 * this implicates multiple ASCEs!).
52 static inline void __tlb_flush_mm(struct mm_struct *mm)
54 unsigned long gmap_asce;
57 * If the machine has IDTE we prefer to do a per mm flush
58 * on all cpus instead of doing a local flush if the mm
59 * only ran on the local cpu.
61 preempt_disable();
62 atomic_inc(&mm->context.flush_count);
63 /* Reset TLB flush mask */
64 cpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);
65 barrier();
66 gmap_asce = READ_ONCE(mm->context.gmap_asce);
67 if (MACHINE_HAS_IDTE && gmap_asce != -1UL) {
68 if (gmap_asce)
69 __tlb_flush_idte(gmap_asce);
70 __tlb_flush_idte(mm->context.asce);
71 } else {
72 /* Global TLB flush */
73 __tlb_flush_global();
75 atomic_dec(&mm->context.flush_count);
76 preempt_enable();
79 static inline void __tlb_flush_kernel(void)
81 if (MACHINE_HAS_IDTE)
82 __tlb_flush_idte(init_mm.context.asce);
83 else
84 __tlb_flush_global();
86 #else
87 #define __tlb_flush_global() __tlb_flush_local()
90 * Flush TLB entries for a specific ASCE on all CPUs.
92 static inline void __tlb_flush_mm(struct mm_struct *mm)
94 __tlb_flush_local();
97 static inline void __tlb_flush_kernel(void)
99 __tlb_flush_local();
101 #endif
103 static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)
105 spin_lock(&mm->context.lock);
106 if (mm->context.flush_mm) {
107 mm->context.flush_mm = 0;
108 __tlb_flush_mm(mm);
110 spin_unlock(&mm->context.lock);
114 * TLB flushing:
115 * flush_tlb() - flushes the current mm struct TLBs
116 * flush_tlb_all() - flushes all processes TLBs
117 * flush_tlb_mm(mm) - flushes the specified mm context TLB's
118 * flush_tlb_page(vma, vmaddr) - flushes one page
119 * flush_tlb_range(vma, start, end) - flushes a range of pages
120 * flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
124 * flush_tlb_mm goes together with ptep_set_wrprotect for the
125 * copy_page_range operation and flush_tlb_range is related to
126 * ptep_get_and_clear for change_protection. ptep_set_wrprotect and
127 * ptep_get_and_clear do not flush the TLBs directly if the mm has
128 * only one user. At the end of the update the flush_tlb_mm and
129 * flush_tlb_range functions need to do the flush.
131 #define flush_tlb() do { } while (0)
132 #define flush_tlb_all() do { } while (0)
133 #define flush_tlb_page(vma, addr) do { } while (0)
135 static inline void flush_tlb_mm(struct mm_struct *mm)
137 __tlb_flush_mm_lazy(mm);
140 static inline void flush_tlb_range(struct vm_area_struct *vma,
141 unsigned long start, unsigned long end)
143 __tlb_flush_mm_lazy(vma->vm_mm);
146 static inline void flush_tlb_kernel_range(unsigned long start,
147 unsigned long end)
149 __tlb_flush_kernel();
152 #endif /* _S390_TLBFLUSH_H */