arch/s390/kernel/base.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  arch/s390/kernel/base.S
   4  *
   5  *    Copyright IBM Corp. 2006, 2007
   6  *    Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
   7  *               Michael Holzheu <holzheu@de.ibm.com>
   8  */
   9
  10 #include <linux/linkage.h>
  11 #include <asm/asm-offsets.h>
  12 #include <asm/nospec-insn.h>
  13 #include <asm/ptrace.h>
  14 #include <asm/sigp.h>
  15
  16         GEN_BR_THUNK %r9
  17         GEN_BR_THUNK %r14
  18
  19 ENTRY(s390_base_mcck_handler)
  20         basr    %r13,0
  21 0:      lg      %r15,__LC_PANIC_STACK   # load panic stack
  22         aghi    %r15,-STACK_FRAME_OVERHEAD
  23         larl    %r1,s390_base_mcck_handler_fn
  24         lg      %r9,0(%r1)
  25         ltgr    %r9,%r9
  26         jz      1f
  27         BASR_EX %r14,%r9
  28 1:      la      %r1,4095
  29         lmg     %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
  30         lpswe   __LC_MCK_OLD_PSW
  31
  32         .section .bss
  33         .align 8
  34         .globl  s390_base_mcck_handler_fn
  35 s390_base_mcck_handler_fn:
  36         .quad   0
  37         .previous
  38
  39 ENTRY(s390_base_ext_handler)
  40         stmg    %r0,%r15,__LC_SAVE_AREA_ASYNC
  41         basr    %r13,0
  42 0:      aghi    %r15,-STACK_FRAME_OVERHEAD
  43         larl    %r1,s390_base_ext_handler_fn
  44         lg      %r9,0(%r1)
  45         ltgr    %r9,%r9
  46         jz      1f
  47         BASR_EX %r14,%r9
  48 1:      lmg     %r0,%r15,__LC_SAVE_AREA_ASYNC
  49         ni      __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
  50         lpswe   __LC_EXT_OLD_PSW
  51
  52         .section .bss
  53         .align 8
  54         .globl s390_base_ext_handler_fn
  55 s390_base_ext_handler_fn:
  56         .quad   0
  57         .previous
  58
  59 ENTRY(s390_base_pgm_handler)
  60         stmg    %r0,%r15,__LC_SAVE_AREA_SYNC
  61         basr    %r13,0
  62 0:      aghi    %r15,-STACK_FRAME_OVERHEAD
  63         larl    %r1,s390_base_pgm_handler_fn
  64         lg      %r9,0(%r1)
  65         ltgr    %r9,%r9
  66         jz      1f
  67         BASR_EX %r14,%r9
  68         lmg     %r0,%r15,__LC_SAVE_AREA_SYNC
  69         lpswe   __LC_PGM_OLD_PSW
  70 1:      lpswe   disabled_wait_psw-0b(%r13)
  71
  72         .align  8
  73 disabled_wait_psw:
  74         .quad   0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
  75
  76         .section .bss
  77         .align 8
  78         .globl s390_base_pgm_handler_fn
  79 s390_base_pgm_handler_fn:
  80         .quad   0
  81         .previous
  82
  83 #
  84 # Calls diag 308 subcode 1 and continues execution
  85 #
  86 ENTRY(diag308_reset)
  87         larl    %r4,.Lctlregs           # Save control registers
  88         stctg   %c0,%c15,0(%r4)
  89         lg      %r2,0(%r4)              # Disable lowcore protection
  90         nilh    %r2,0xefff
  91         larl    %r4,.Lctlreg0
  92         stg     %r2,0(%r4)
  93         lctlg   %c0,%c0,0(%r4)
  94         larl    %r4,.Lfpctl             # Floating point control register
  95         stfpc   0(%r4)
  96         larl    %r4,.Lprefix            # Save prefix register
  97         stpx    0(%r4)
  98         larl    %r4,.Lprefix_zero       # Set prefix register to 0
  99         spx     0(%r4)
 100         larl    %r4,.Lcontinue_psw      # Save PSW flags
 101         epsw    %r2,%r3
 102         stm     %r2,%r3,0(%r4)
 103         larl    %r4,.Lrestart_psw       # Setup restart PSW at absolute 0
 104         lghi    %r3,0
 105         lg      %r4,0(%r4)              # Save PSW
 106         sturg   %r4,%r3                 # Use sturg, because of large pages
 107         lghi    %r1,1
 108         lghi    %r0,0
 109         diag    %r0,%r1,0x308
 110 .Lrestart_part2:
 111         lhi     %r0,0                   # Load r0 with zero
 112         lhi     %r1,2                   # Use mode 2 = ESAME (dump)
 113         sigp    %r1,%r0,SIGP_SET_ARCHITECTURE   # Switch to ESAME mode
 114         sam64                           # Switch to 64 bit addressing mode
 115         larl    %r4,.Lctlregs           # Restore control registers
 116         lctlg   %c0,%c15,0(%r4)
 117         larl    %r4,.Lfpctl             # Restore floating point ctl register
 118         lfpc    0(%r4)
 119         larl    %r4,.Lprefix            # Restore prefix register
 120         spx     0(%r4)
 121         larl    %r4,.Lcontinue_psw      # Restore PSW flags
 122         lpswe   0(%r4)
 123 .Lcontinue:
 124         BR_EX   %r14
 125 .align 16
 126 .Lrestart_psw:
 127         .long   0x00080000,0x80000000 + .Lrestart_part2
 128
 129         .section .data..nosave,"aw",@progbits
 130 .align 8
 131 .Lcontinue_psw:
 132         .quad   0,.Lcontinue
 133         .previous
 134
 135         .section .bss
 136 .align 8
 137 .Lctlreg0:
 138         .quad   0
 139 .Lctlregs:
 140         .rept   16
 141         .quad   0
 142         .endr
 143 .Lfpctl:
 144         .long   0
 145 .Lprefix:
 146         .long   0
 147 .Lprefix_zero:
 148         .long   0
 149         .previous