| blob | e928c2af6a10de126250796f991205b556877fac |
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * S390 low-level entry points.
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
21 #include <asm/page.h>
22 #include <asm/sigp.h>
23 #include <asm/irq.h>
24 #include <asm/vx-insn.h>
25 #include <asm/setup.h>
26 #include <asm/nmi.h>
27 #include <asm/export.h>
28 #include <asm/nospec-insn.h>
30 __PT_R0 = __PT_GPRS
31 __PT_R1 = __PT_GPRS + 8
32 __PT_R2 = __PT_GPRS + 16
33 __PT_R3 = __PT_GPRS + 24
34 __PT_R4 = __PT_GPRS + 32
35 __PT_R5 = __PT_GPRS + 40
36 __PT_R6 = __PT_GPRS + 48
37 __PT_R7 = __PT_GPRS + 56
38 __PT_R8 = __PT_GPRS + 64
39 __PT_R9 = __PT_GPRS + 72
40 __PT_R10 = __PT_GPRS + 80
41 __PT_R11 = __PT_GPRS + 88
42 __PT_R12 = __PT_GPRS + 96
43 __PT_R13 = __PT_GPRS + 104
44 __PT_R14 = __PT_GPRS + 112
45 __PT_R15 = __PT_GPRS + 120
47 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
48 STACK_SIZE = 1 << STACK_SHIFT
49 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
51 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
53 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
54 _TIF_SYSCALL_TRACEPOINT)
55 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
56 _CIF_ASCE_SECONDARY | _CIF_FPU)
57 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
59 #define BASED(name) name-cleanup_critical(%r13)
61 .macro TRACE_IRQS_ON
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 basr %r2,%r0
64 brasl %r14,trace_hardirqs_on_caller
65 #endif
66 .endm
68 .macro TRACE_IRQS_OFF
69 #ifdef CONFIG_TRACE_IRQFLAGS
70 basr %r2,%r0
71 brasl %r14,trace_hardirqs_off_caller
72 #endif
73 .endm
75 .macro LOCKDEP_SYS_EXIT
76 #ifdef CONFIG_LOCKDEP
77 tm __PT_PSW+1(%r11),0x01 # returning to user ?
78 jz .+10
79 brasl %r14,lockdep_sys_exit
80 #endif
81 .endm
83 .macro CHECK_STACK stacksize,savearea
84 #ifdef CONFIG_CHECK_STACK
85 tml %r15,\stacksize - CONFIG_STACK_GUARD
86 lghi %r14,\savearea
87 jz stack_overflow
88 #endif
89 .endm
91 .macro SWITCH_ASYNC savearea,timer
92 tmhh %r8,0x0001 # interrupting from user ?
93 jnz 1f
94 lgr %r14,%r9
95 slg %r14,BASED(.Lcritical_start)
96 clg %r14,BASED(.Lcritical_length)
97 jhe 0f
98 lghi %r11,\savearea # inside critical section, do cleanup
99 brasl %r14,cleanup_critical
100 tmhh %r8,0x0001 # retest problem state after cleanup
101 jnz 1f
102 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
103 slgr %r14,%r15
104 srag %r14,%r14,STACK_SHIFT
105 jnz 2f
106 CHECK_STACK 1<<STACK_SHIFT,\savearea
107 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
108 j 3f
109 1: UPDATE_VTIME %r14,%r15,\timer
110 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
111 2: lg %r15,__LC_ASYNC_STACK # load async stack
112 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
113 .endm
115 .macro UPDATE_VTIME w1,w2,enter_timer
116 lg \w1,__LC_EXIT_TIMER
117 lg \w2,__LC_LAST_UPDATE_TIMER
118 slg \w1,\enter_timer
119 slg \w2,__LC_EXIT_TIMER
120 alg \w1,__LC_USER_TIMER
121 alg \w2,__LC_SYSTEM_TIMER
122 stg \w1,__LC_USER_TIMER
123 stg \w2,__LC_SYSTEM_TIMER
124 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
125 .endm
127 .macro REENABLE_IRQS
128 stg %r8,__LC_RETURN_PSW
129 ni __LC_RETURN_PSW,0xbf
130 ssm __LC_RETURN_PSW
131 .endm
133 .macro STCK savearea
134 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
135 .insn s,0xb27c0000,\savearea # store clock fast
136 #else
137 .insn s,0xb2050000,\savearea # store clock
138 #endif
139 .endm
141 /*
142 * The TSTMSK macro generates a test-under-mask instruction by
143 * calculating the memory offset for the specified mask value.
144 * Mask value can be any constant. The macro shifts the mask
145 * value to calculate the memory offset for the test-under-mask
146 * instruction.
147 */
148 .macro TSTMSK addr, mask, size=8, bytepos=0
149 .if (\bytepos < \size) && (\mask >> 8)
150 .if (\mask & 0xff)
151 .error "Mask exceeds byte boundary"
152 .endif
153 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
154 .exitm
155 .endif
156 .ifeq \mask
157 .error "Mask must not be zero"
158 .endif
159 off = \size - \bytepos - 1
160 tm off+\addr, \mask
161 .endm
163 .macro BPOFF
164 .pushsection .altinstr_replacement, "ax"
165 660: .long 0xb2e8c000
166 .popsection
167 661: .long 0x47000000
168 .pushsection .altinstructions, "a"
169 .long 661b - .
170 .long 660b - .
171 .word 82
172 .byte 4
173 .byte 4
174 .popsection
175 .endm
177 .macro BPON
178 .pushsection .altinstr_replacement, "ax"
179 662: .long 0xb2e8d000
180 .popsection
181 663: .long 0x47000000
182 .pushsection .altinstructions, "a"
183 .long 663b - .
184 .long 662b - .
185 .word 82
186 .byte 4
187 .byte 4
188 .popsection
189 .endm
191 .macro BPENTER tif_ptr,tif_mask
192 .pushsection .altinstr_replacement, "ax"
193 662: .word 0xc004, 0x0000, 0x0000 # 6 byte nop
194 .word 0xc004, 0x0000, 0x0000 # 6 byte nop
195 .popsection
196 664: TSTMSK \tif_ptr,\tif_mask
197 jz . + 8
198 .long 0xb2e8d000
199 .pushsection .altinstructions, "a"
200 .long 664b - .
201 .long 662b - .
202 .word 82
203 .byte 12
204 .byte 12
205 .popsection
206 .endm
208 .macro BPEXIT tif_ptr,tif_mask
209 TSTMSK \tif_ptr,\tif_mask
210 .pushsection .altinstr_replacement, "ax"
211 662: jnz . + 8
212 .long 0xb2e8d000
213 .popsection
214 664: jz . + 8
215 .long 0xb2e8c000
216 .pushsection .altinstructions, "a"
217 .long 664b - .
218 .long 662b - .
219 .word 82
220 .byte 8
221 .byte 8
222 .popsection
223 .endm
225 GEN_BR_THUNK %r9
226 GEN_BR_THUNK %r14
227 GEN_BR_THUNK %r14,%r11
229 .section .kprobes.text, "ax"
230 .Ldummy:
231 /*
232 * This nop exists only in order to avoid that __switch_to starts at
233 * the beginning of the kprobes text section. In that case we would
234 * have several symbols at the same address. E.g. objdump would take
235 * an arbitrary symbol name when disassembling this code.
236 * With the added nop in between the __switch_to symbol is unique
237 * again.
238 */
239 nop 0
241 ENTRY(__bpon)
242 .globl __bpon
243 BPON
244 BR_EX %r14
246 /*
247 * Scheduler resume function, called by switch_to
248 * gpr2 = (task_struct *) prev
249 * gpr3 = (task_struct *) next
250 * Returns:
251 * gpr2 = prev
252 */
253 ENTRY(__switch_to)
254 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
255 lgr %r1,%r2
256 aghi %r1,__TASK_thread # thread_struct of prev task
257 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
258 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
259 lgr %r1,%r3
260 aghi %r1,__TASK_thread # thread_struct of next task
261 lgr %r15,%r5
262 aghi %r15,STACK_INIT # end of kernel stack of next
263 stg %r3,__LC_CURRENT # store task struct of next
264 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
265 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
266 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
267 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
268 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
269 jz 0f
270 .insn s,0xb2800000,__LC_LPP # set program parameter
271 0: BR_EX %r14
273 .L__critical_start:
275 #if IS_ENABLED(CONFIG_KVM)
276 /*
277 * sie64a calling convention:
278 * %r2 pointer to sie control block
279 * %r3 guest register save area
280 */
281 ENTRY(sie64a)
282 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
283 lg %r12,__LC_CURRENT
284 stg %r2,__SF_EMPTY(%r15) # save control block pointer
285 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
286 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
287 mvc __SF_EMPTY+24(8,%r15),__TI_flags(%r12) # copy thread flags
288 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
289 jno .Lsie_load_guest_gprs
290 brasl %r14,load_fpu_regs # load guest fp/vx regs
291 .Lsie_load_guest_gprs:
292 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
293 lg %r14,__LC_GMAP # get gmap pointer
294 ltgr %r14,%r14
295 jz .Lsie_gmap
296 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
297 .Lsie_gmap:
298 lg %r14,__SF_EMPTY(%r15) # get control block pointer
299 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
300 tm __SIE_PROG20+3(%r14),3 # last exit...
301 jnz .Lsie_skip
302 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
303 jo .Lsie_skip # exit if fp/vx regs changed
304 BPEXIT __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
305 .Lsie_entry:
306 sie 0(%r14)
307 .Lsie_exit:
308 BPOFF
309 BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
310 .Lsie_skip:
311 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
312 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
313 .Lsie_done:
314 # some program checks are suppressing. C code (e.g. do_protection_exception)
315 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
316 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
317 # Other instructions between sie64a and .Lsie_done should not cause program
318 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
319 # See also .Lcleanup_sie
320 .Lrewind_pad6:
321 nopr 7
322 .Lrewind_pad4:
323 nopr 7
324 .Lrewind_pad2:
325 nopr 7
326 .globl sie_exit
327 sie_exit:
328 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
329 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
330 xgr %r0,%r0 # clear guest registers to
331 xgr %r1,%r1 # prevent speculative use
332 xgr %r2,%r2
333 xgr %r3,%r3
334 xgr %r4,%r4
335 xgr %r5,%r5
336 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
337 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
338 BR_EX %r14
339 .Lsie_fault:
340 lghi %r14,-EFAULT
341 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
342 j sie_exit
344 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
345 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
346 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
347 EX_TABLE(sie_exit,.Lsie_fault)
348 EXPORT_SYMBOL(sie64a)
349 EXPORT_SYMBOL(sie_exit)
350 #endif
352 /*
353 * SVC interrupt handler routine. System calls are synchronous events and
354 * are executed with interrupts enabled.
355 */
357 ENTRY(system_call)
358 stpt __LC_SYNC_ENTER_TIMER
359 .Lsysc_stmg:
360 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
361 BPOFF
362 lg %r12,__LC_CURRENT
363 lghi %r13,__TASK_thread
364 lghi %r14,_PIF_SYSCALL
365 .Lsysc_per:
366 lg %r15,__LC_KERNEL_STACK
367 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
368 .Lsysc_vtime:
369 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
370 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
371 stmg %r0,%r7,__PT_R0(%r11)
372 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
373 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
374 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
375 stg %r14,__PT_FLAGS(%r11)
376 .Lsysc_do_svc:
377 # clear user controlled register to prevent speculative use
378 xgr %r0,%r0
379 # load address of system call table
380 lg %r10,__THREAD_sysc_table(%r13,%r12)
381 llgh %r8,__PT_INT_CODE+2(%r11)
382 slag %r8,%r8,2 # shift and test for svc 0
383 jnz .Lsysc_nr_ok
384 # svc 0: system call number in %r1
385 llgfr %r1,%r1 # clear high word in r1
386 cghi %r1,NR_syscalls
387 jnl .Lsysc_nr_ok
388 sth %r1,__PT_INT_CODE+2(%r11)
389 slag %r8,%r1,2
390 .Lsysc_nr_ok:
391 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
392 stg %r2,__PT_ORIG_GPR2(%r11)
393 stg %r7,STACK_FRAME_OVERHEAD(%r15)
394 lgf %r9,0(%r8,%r10) # get system call add.
395 TSTMSK __TI_flags(%r12),_TIF_TRACE
396 jnz .Lsysc_tracesys
397 BASR_EX %r14,%r9 # call sys_xxxx
398 stg %r2,__PT_R2(%r11) # store return value
400 .Lsysc_return:
401 LOCKDEP_SYS_EXIT
402 .Lsysc_tif:
403 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
404 jnz .Lsysc_work
405 TSTMSK __TI_flags(%r12),_TIF_WORK
406 jnz .Lsysc_work # check for work
407 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
408 jnz .Lsysc_work
409 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
410 .Lsysc_restore:
411 lg %r14,__LC_VDSO_PER_CPU
412 lmg %r0,%r10,__PT_R0(%r11)
413 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
414 .Lsysc_exit_timer:
415 stpt __LC_EXIT_TIMER
416 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
417 lmg %r11,%r15,__PT_R11(%r11)
418 lpswe __LC_RETURN_PSW
419 .Lsysc_done:
421 #
422 # One of the work bits is on. Find out which one.
423 #
424 .Lsysc_work:
425 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
426 jo .Lsysc_mcck_pending
427 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
428 jo .Lsysc_reschedule
429 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
430 jo .Lsysc_syscall_restart
431 #ifdef CONFIG_UPROBES
432 TSTMSK __TI_flags(%r12),_TIF_UPROBE
433 jo .Lsysc_uprobe_notify
434 #endif
435 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
436 jo .Lsysc_guarded_storage
437 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
438 jo .Lsysc_singlestep
439 #ifdef CONFIG_LIVEPATCH
440 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
441 jo .Lsysc_patch_pending # handle live patching just before
442 # signals and possible syscall restart
443 #endif
444 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
445 jo .Lsysc_syscall_restart
446 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
447 jo .Lsysc_sigpending
448 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
449 jo .Lsysc_notify_resume
450 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
451 jo .Lsysc_vxrs
452 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
453 jnz .Lsysc_asce
454 j .Lsysc_return # beware of critical section cleanup
456 #
457 # _TIF_NEED_RESCHED is set, call schedule
458 #
459 .Lsysc_reschedule:
460 larl %r14,.Lsysc_return
461 jg schedule
463 #
464 # _CIF_MCCK_PENDING is set, call handler
465 #
466 .Lsysc_mcck_pending:
467 larl %r14,.Lsysc_return
468 jg s390_handle_mcck # TIF bit will be cleared by handler
470 #
471 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
472 #
473 .Lsysc_asce:
474 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
475 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
476 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
477 jz .Lsysc_return
478 larl %r14,.Lsysc_return
479 jg set_fs_fixup
481 #
482 # CIF_FPU is set, restore floating-point controls and floating-point registers.
483 #
484 .Lsysc_vxrs:
485 larl %r14,.Lsysc_return
486 jg load_fpu_regs
488 #
489 # _TIF_SIGPENDING is set, call do_signal
490 #
491 .Lsysc_sigpending:
492 lgr %r2,%r11 # pass pointer to pt_regs
493 brasl %r14,do_signal
494 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
495 jno .Lsysc_return
496 .Lsysc_do_syscall:
497 lghi %r13,__TASK_thread
498 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
499 lghi %r1,0 # svc 0 returns -ENOSYS
500 j .Lsysc_do_svc
502 #
503 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
504 #
505 .Lsysc_notify_resume:
506 lgr %r2,%r11 # pass pointer to pt_regs
507 larl %r14,.Lsysc_return
508 jg do_notify_resume
510 #
511 # _TIF_UPROBE is set, call uprobe_notify_resume
512 #
513 #ifdef CONFIG_UPROBES
514 .Lsysc_uprobe_notify:
515 lgr %r2,%r11 # pass pointer to pt_regs
516 larl %r14,.Lsysc_return
517 jg uprobe_notify_resume
518 #endif
520 #
521 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
522 #
523 .Lsysc_guarded_storage:
524 lgr %r2,%r11 # pass pointer to pt_regs
525 larl %r14,.Lsysc_return
526 jg gs_load_bc_cb
527 #
528 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
529 #
530 #ifdef CONFIG_LIVEPATCH
531 .Lsysc_patch_pending:
532 lg %r2,__LC_CURRENT # pass pointer to task struct
533 larl %r14,.Lsysc_return
534 jg klp_update_patch_state
535 #endif
537 #
538 # _PIF_PER_TRAP is set, call do_per_trap
539 #
540 .Lsysc_singlestep:
541 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
542 lgr %r2,%r11 # pass pointer to pt_regs
543 larl %r14,.Lsysc_return
544 jg do_per_trap
546 #
547 # _PIF_SYSCALL_RESTART is set, repeat the current system call
548 #
549 .Lsysc_syscall_restart:
550 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
551 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
552 lg %r2,__PT_ORIG_GPR2(%r11)
553 j .Lsysc_do_svc
555 #
556 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
557 # and after the system call
558 #
559 .Lsysc_tracesys:
560 lgr %r2,%r11 # pass pointer to pt_regs
561 la %r3,0
562 llgh %r0,__PT_INT_CODE+2(%r11)
563 stg %r0,__PT_R2(%r11)
564 brasl %r14,do_syscall_trace_enter
565 lghi %r0,NR_syscalls
566 clgr %r0,%r2
567 jnh .Lsysc_tracenogo
568 sllg %r8,%r2,2
569 lgf %r9,0(%r8,%r10)
570 .Lsysc_tracego:
571 lmg %r3,%r7,__PT_R3(%r11)
572 stg %r7,STACK_FRAME_OVERHEAD(%r15)
573 lg %r2,__PT_ORIG_GPR2(%r11)
574 BASR_EX %r14,%r9 # call sys_xxx
575 stg %r2,__PT_R2(%r11) # store return value
576 .Lsysc_tracenogo:
577 TSTMSK __TI_flags(%r12),_TIF_TRACE
578 jz .Lsysc_return
579 lgr %r2,%r11 # pass pointer to pt_regs
580 larl %r14,.Lsysc_return
581 jg do_syscall_trace_exit
583 #
584 # a new process exits the kernel with ret_from_fork
585 #
586 ENTRY(ret_from_fork)
587 la %r11,STACK_FRAME_OVERHEAD(%r15)
588 lg %r12,__LC_CURRENT
589 brasl %r14,schedule_tail
590 TRACE_IRQS_ON
591 ssm __LC_SVC_NEW_PSW # reenable interrupts
592 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
593 jne .Lsysc_tracenogo
594 # it's a kernel thread
595 lmg %r9,%r10,__PT_R9(%r11) # load gprs
596 ENTRY(kernel_thread_starter)
597 la %r2,0(%r10)
598 BASR_EX %r14,%r9
599 j .Lsysc_tracenogo
601 /*
602 * Program check handler routine
603 */
605 ENTRY(pgm_check_handler)
606 stpt __LC_SYNC_ENTER_TIMER
607 BPOFF
608 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
609 lg %r10,__LC_LAST_BREAK
610 lg %r12,__LC_CURRENT
611 larl %r13,cleanup_critical
612 lmg %r8,%r9,__LC_PGM_OLD_PSW
613 tmhh %r8,0x0001 # test problem state bit
614 jnz 2f # -> fault in user space
615 #if IS_ENABLED(CONFIG_KVM)
616 # cleanup critical section for program checks in sie64a
617 lgr %r14,%r9
618 slg %r14,BASED(.Lsie_critical_start)
619 clg %r14,BASED(.Lsie_critical_length)
620 jhe 0f
621 lg %r14,__SF_EMPTY(%r15) # get control block pointer
622 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
623 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
624 larl %r9,sie_exit # skip forward to sie_exit
625 #endif
626 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
627 jnz 1f # -> enabled, can't be a double fault
628 tm __LC_PGM_ILC+3,0x80 # check for per exception
629 jnz .Lpgm_svcper # -> single stepped svc
630 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
631 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
632 j 4f
633 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
634 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
635 lg %r15,__LC_KERNEL_STACK
636 lgr %r14,%r12
637 aghi %r14,__TASK_thread # pointer to thread_struct
638 lghi %r13,__LC_PGM_TDB
639 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
640 jz 3f
641 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
642 3: stg %r10,__THREAD_last_break(%r14)
643 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
644 stmg %r0,%r7,__PT_R0(%r11)
645 # clear user controlled registers to prevent speculative use
646 xgr %r0,%r0
647 xgr %r1,%r1
648 xgr %r2,%r2
649 xgr %r3,%r3
650 xgr %r4,%r4
651 xgr %r5,%r5
652 xgr %r6,%r6
653 xgr %r7,%r7
654 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
655 stmg %r8,%r9,__PT_PSW(%r11)
656 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
657 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
658 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
659 stg %r10,__PT_ARGS(%r11)
660 tm __LC_PGM_ILC+3,0x80 # check for per exception
661 jz 5f
662 tmhh %r8,0x0001 # kernel per event ?
663 jz .Lpgm_kprobe
664 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
665 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
666 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
667 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
668 5: REENABLE_IRQS
669 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
670 larl %r1,pgm_check_table
671 llgh %r10,__PT_INT_CODE+2(%r11)
672 nill %r10,0x007f
673 sll %r10,2
674 je .Lpgm_return
675 lgf %r9,0(%r10,%r1) # load address of handler routine
676 lgr %r2,%r11 # pass pointer to pt_regs
677 BASR_EX %r14,%r9 # branch to interrupt-handler
678 .Lpgm_return:
679 LOCKDEP_SYS_EXIT
680 tm __PT_PSW+1(%r11),0x01 # returning to user ?
681 jno .Lsysc_restore
682 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
683 jo .Lsysc_do_syscall
684 j .Lsysc_tif
686 #
687 # PER event in supervisor state, must be kprobes
688 #
689 .Lpgm_kprobe:
690 REENABLE_IRQS
691 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
692 lgr %r2,%r11 # pass pointer to pt_regs
693 brasl %r14,do_per_trap
694 j .Lpgm_return
696 #
697 # single stepped system call
698 #
699 .Lpgm_svcper:
700 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
701 lghi %r13,__TASK_thread
702 larl %r14,.Lsysc_per
703 stg %r14,__LC_RETURN_PSW+8
704 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
705 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
707 /*
708 * IO interrupt handler routine
709 */
710 ENTRY(io_int_handler)
711 STCK __LC_INT_CLOCK
712 stpt __LC_ASYNC_ENTER_TIMER
713 BPOFF
714 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
715 lg %r12,__LC_CURRENT
716 larl %r13,cleanup_critical
717 lmg %r8,%r9,__LC_IO_OLD_PSW
718 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
719 stmg %r0,%r7,__PT_R0(%r11)
720 # clear user controlled registers to prevent speculative use
721 xgr %r0,%r0
722 xgr %r1,%r1
723 xgr %r2,%r2
724 xgr %r3,%r3
725 xgr %r4,%r4
726 xgr %r5,%r5
727 xgr %r6,%r6
728 xgr %r7,%r7
729 xgr %r10,%r10
730 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
731 stmg %r8,%r9,__PT_PSW(%r11)
732 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
733 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
734 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
735 jo .Lio_restore
736 TRACE_IRQS_OFF
737 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
738 .Lio_loop:
739 lgr %r2,%r11 # pass pointer to pt_regs
740 lghi %r3,IO_INTERRUPT
741 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
742 jz .Lio_call
743 lghi %r3,THIN_INTERRUPT
744 .Lio_call:
745 brasl %r14,do_IRQ
746 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
747 jz .Lio_return
748 tpi 0
749 jz .Lio_return
750 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
751 j .Lio_loop
752 .Lio_return:
753 LOCKDEP_SYS_EXIT
754 TRACE_IRQS_ON
755 .Lio_tif:
756 TSTMSK __TI_flags(%r12),_TIF_WORK
757 jnz .Lio_work # there is work to do (signals etc.)
758 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
759 jnz .Lio_work
760 .Lio_restore:
761 lg %r14,__LC_VDSO_PER_CPU
762 lmg %r0,%r10,__PT_R0(%r11)
763 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
764 tm __PT_PSW+1(%r11),0x01 # returning to user ?
765 jno .Lio_exit_kernel
766 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
767 .Lio_exit_timer:
768 stpt __LC_EXIT_TIMER
769 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
770 .Lio_exit_kernel:
771 lmg %r11,%r15,__PT_R11(%r11)
772 lpswe __LC_RETURN_PSW
773 .Lio_done:
775 #
776 # There is work todo, find out in which context we have been interrupted:
777 # 1) if we return to user space we can do all _TIF_WORK work
778 # 2) if we return to kernel code and kvm is enabled check if we need to
779 # modify the psw to leave SIE
780 # 3) if we return to kernel code and preemptive scheduling is enabled check
781 # the preemption counter and if it is zero call preempt_schedule_irq
782 # Before any work can be done, a switch to the kernel stack is required.
783 #
784 .Lio_work:
785 tm __PT_PSW+1(%r11),0x01 # returning to user ?
786 jo .Lio_work_user # yes -> do resched & signal
787 #ifdef CONFIG_PREEMPT
788 # check for preemptive scheduling
789 icm %r0,15,__LC_PREEMPT_COUNT
790 jnz .Lio_restore # preemption is disabled
791 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
792 jno .Lio_restore
793 # switch to kernel stack
794 lg %r1,__PT_R15(%r11)
795 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
796 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
797 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
798 la %r11,STACK_FRAME_OVERHEAD(%r1)
799 lgr %r15,%r1
800 # TRACE_IRQS_ON already done at .Lio_return, call
801 # TRACE_IRQS_OFF to keep things symmetrical
802 TRACE_IRQS_OFF
803 brasl %r14,preempt_schedule_irq
804 j .Lio_return
805 #else
806 j .Lio_restore
807 #endif
809 #
810 # Need to do work before returning to userspace, switch to kernel stack
811 #
812 .Lio_work_user:
813 lg %r1,__LC_KERNEL_STACK
814 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
815 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
816 la %r11,STACK_FRAME_OVERHEAD(%r1)
817 lgr %r15,%r1
819 #
820 # One of the work bits is on. Find out which one.
821 #
822 .Lio_work_tif:
823 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
824 jo .Lio_mcck_pending
825 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
826 jo .Lio_reschedule
827 #ifdef CONFIG_LIVEPATCH
828 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
829 jo .Lio_patch_pending
830 #endif
831 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
832 jo .Lio_sigpending
833 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
834 jo .Lio_notify_resume
835 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
836 jo .Lio_guarded_storage
837 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
838 jo .Lio_vxrs
839 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
840 jnz .Lio_asce
841 j .Lio_return # beware of critical section cleanup
843 #
844 # _CIF_MCCK_PENDING is set, call handler
845 #
846 .Lio_mcck_pending:
847 # TRACE_IRQS_ON already done at .Lio_return
848 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
849 TRACE_IRQS_OFF
850 j .Lio_return
852 #
853 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
854 #
855 .Lio_asce:
856 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
857 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
858 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
859 jz .Lio_return
860 larl %r14,.Lio_return
861 jg set_fs_fixup
863 #
864 # CIF_FPU is set, restore floating-point controls and floating-point registers.
865 #
866 .Lio_vxrs:
867 larl %r14,.Lio_return
868 jg load_fpu_regs
870 #
871 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
872 #
873 .Lio_guarded_storage:
874 # TRACE_IRQS_ON already done at .Lio_return
875 ssm __LC_SVC_NEW_PSW # reenable interrupts
876 lgr %r2,%r11 # pass pointer to pt_regs
877 brasl %r14,gs_load_bc_cb
878 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
879 TRACE_IRQS_OFF
880 j .Lio_return
882 #
883 # _TIF_NEED_RESCHED is set, call schedule
884 #
885 .Lio_reschedule:
886 # TRACE_IRQS_ON already done at .Lio_return
887 ssm __LC_SVC_NEW_PSW # reenable interrupts
888 brasl %r14,schedule # call scheduler
889 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
890 TRACE_IRQS_OFF
891 j .Lio_return
893 #
894 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
895 #
896 #ifdef CONFIG_LIVEPATCH
897 .Lio_patch_pending:
898 lg %r2,__LC_CURRENT # pass pointer to task struct
899 larl %r14,.Lio_return
900 jg klp_update_patch_state
901 #endif
903 #
904 # _TIF_SIGPENDING or is set, call do_signal
905 #
906 .Lio_sigpending:
907 # TRACE_IRQS_ON already done at .Lio_return
908 ssm __LC_SVC_NEW_PSW # reenable interrupts
909 lgr %r2,%r11 # pass pointer to pt_regs
910 brasl %r14,do_signal
911 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
912 TRACE_IRQS_OFF
913 j .Lio_return
915 #
916 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
917 #
918 .Lio_notify_resume:
919 # TRACE_IRQS_ON already done at .Lio_return
920 ssm __LC_SVC_NEW_PSW # reenable interrupts
921 lgr %r2,%r11 # pass pointer to pt_regs
922 brasl %r14,do_notify_resume
923 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
924 TRACE_IRQS_OFF
925 j .Lio_return
927 /*
928 * External interrupt handler routine
929 */
930 ENTRY(ext_int_handler)
931 STCK __LC_INT_CLOCK
932 stpt __LC_ASYNC_ENTER_TIMER
933 BPOFF
934 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
935 lg %r12,__LC_CURRENT
936 larl %r13,cleanup_critical
937 lmg %r8,%r9,__LC_EXT_OLD_PSW
938 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
939 stmg %r0,%r7,__PT_R0(%r11)
940 # clear user controlled registers to prevent speculative use
941 xgr %r0,%r0
942 xgr %r1,%r1
943 xgr %r2,%r2
944 xgr %r3,%r3
945 xgr %r4,%r4
946 xgr %r5,%r5
947 xgr %r6,%r6
948 xgr %r7,%r7
949 xgr %r10,%r10
950 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
951 stmg %r8,%r9,__PT_PSW(%r11)
952 lghi %r1,__LC_EXT_PARAMS2
953 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
954 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
955 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
956 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
957 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
958 jo .Lio_restore
959 TRACE_IRQS_OFF
960 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
961 lgr %r2,%r11 # pass pointer to pt_regs
962 lghi %r3,EXT_INTERRUPT
963 brasl %r14,do_IRQ
964 j .Lio_return
966 /*
967 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
968 */
969 ENTRY(psw_idle)
970 stg %r3,__SF_EMPTY(%r15)
971 larl %r1,.Lpsw_idle_lpsw+4
972 stg %r1,__SF_EMPTY+8(%r15)
973 #ifdef CONFIG_SMP
974 larl %r1,smp_cpu_mtid
975 llgf %r1,0(%r1)
976 ltgr %r1,%r1
977 jz .Lpsw_idle_stcctm
978 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
979 .Lpsw_idle_stcctm:
980 #endif
981 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
982 BPON
983 STCK __CLOCK_IDLE_ENTER(%r2)
984 stpt __TIMER_IDLE_ENTER(%r2)
985 .Lpsw_idle_lpsw:
986 lpswe __SF_EMPTY(%r15)
987 BR_EX %r14
988 .Lpsw_idle_end:
990 /*
991 * Store floating-point controls and floating-point or vector register
992 * depending whether the vector facility is available. A critical section
993 * cleanup assures that the registers are stored even if interrupted for
994 * some other work. The CIF_FPU flag is set to trigger a lazy restore
995 * of the register contents at return from io or a system call.
996 */
997 ENTRY(save_fpu_regs)
998 lg %r2,__LC_CURRENT
999 aghi %r2,__TASK_thread
1000 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1001 jo .Lsave_fpu_regs_exit
1002 stfpc __THREAD_FPU_fpc(%r2)
1003 lg %r3,__THREAD_FPU_regs(%r2)
1004 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1005 jz .Lsave_fpu_regs_fp # no -> store FP regs
1006 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
1007 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
1008 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
1009 .Lsave_fpu_regs_fp:
1010 std 0,0(%r3)
1011 std 1,8(%r3)
1012 std 2,16(%r3)
1013 std 3,24(%r3)
1014 std 4,32(%r3)
1015 std 5,40(%r3)
1016 std 6,48(%r3)
1017 std 7,56(%r3)
1018 std 8,64(%r3)
1019 std 9,72(%r3)
1020 std 10,80(%r3)
1021 std 11,88(%r3)
1022 std 12,96(%r3)
1023 std 13,104(%r3)
1024 std 14,112(%r3)
1025 std 15,120(%r3)
1026 .Lsave_fpu_regs_done:
1027 oi __LC_CPU_FLAGS+7,_CIF_FPU
1028 .Lsave_fpu_regs_exit:
1029 BR_EX %r14
1030 .Lsave_fpu_regs_end:
1031 EXPORT_SYMBOL(save_fpu_regs)
1033 /*
1034 * Load floating-point controls and floating-point or vector registers.
1035 * A critical section cleanup assures that the register contents are
1036 * loaded even if interrupted for some other work.
1037 *
1038 * There are special calling conventions to fit into sysc and io return work:
1039 * %r15: <kernel stack>
1040 * The function requires:
1041 * %r4
1042 */
1043 load_fpu_regs:
1044 lg %r4,__LC_CURRENT
1045 aghi %r4,__TASK_thread
1046 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1047 jno .Lload_fpu_regs_exit
1048 lfpc __THREAD_FPU_fpc(%r4)
1049 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1050 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
1051 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
1052 VLM %v0,%v15,0,%r4
1053 VLM %v16,%v31,256,%r4
1054 j .Lload_fpu_regs_done
1055 .Lload_fpu_regs_fp:
1056 ld 0,0(%r4)
1057 ld 1,8(%r4)
1058 ld 2,16(%r4)
1059 ld 3,24(%r4)
1060 ld 4,32(%r4)
1061 ld 5,40(%r4)
1062 ld 6,48(%r4)
1063 ld 7,56(%r4)
1064 ld 8,64(%r4)
1065 ld 9,72(%r4)
1066 ld 10,80(%r4)
1067 ld 11,88(%r4)
1068 ld 12,96(%r4)
1069 ld 13,104(%r4)
1070 ld 14,112(%r4)
1071 ld 15,120(%r4)
1072 .Lload_fpu_regs_done:
1073 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
1074 .Lload_fpu_regs_exit:
1075 BR_EX %r14
1076 .Lload_fpu_regs_end:
1078 .L__critical_end:
1080 /*
1081 * Machine check handler routines
1082 */
1083 ENTRY(mcck_int_handler)
1084 STCK __LC_MCCK_CLOCK
1085 BPOFF
1086 la %r1,4095 # revalidate r1
1087 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
1088 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1089 lg %r12,__LC_CURRENT
1090 larl %r13,cleanup_critical
1091 lmg %r8,%r9,__LC_MCK_OLD_PSW
1092 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1093 jo .Lmcck_panic # yes -> rest of mcck code invalid
1094 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1095 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1096 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1097 jo 3f
1098 la %r14,__LC_SYNC_ENTER_TIMER
1099 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1100 jl 0f
1101 la %r14,__LC_ASYNC_ENTER_TIMER
1102 0: clc 0(8,%r14),__LC_EXIT_TIMER
1103 jl 1f
1104 la %r14,__LC_EXIT_TIMER
1105 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1106 jl 2f
1107 la %r14,__LC_LAST_UPDATE_TIMER
1108 2: spt 0(%r14)
1109 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1110 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
1111 jno .Lmcck_panic # no -> skip cleanup critical
1112 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1113 .Lmcck_skip:
1114 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1115 stmg %r0,%r7,__PT_R0(%r11)
1116 # clear user controlled registers to prevent speculative use
1117 xgr %r0,%r0
1118 xgr %r1,%r1
1119 xgr %r2,%r2
1120 xgr %r3,%r3
1121 xgr %r4,%r4
1122 xgr %r5,%r5
1123 xgr %r6,%r6
1124 xgr %r7,%r7
1125 xgr %r10,%r10
1126 mvc __PT_R8(64,%r11),0(%r14)
1127 stmg %r8,%r9,__PT_PSW(%r11)
1128 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1129 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1130 lgr %r2,%r11 # pass pointer to pt_regs
1131 brasl %r14,s390_do_machine_check
1132 tm __PT_PSW+1(%r11),0x01 # returning to user ?
1133 jno .Lmcck_return
1134 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1135 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1136 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1137 la %r11,STACK_FRAME_OVERHEAD(%r1)
1138 lgr %r15,%r1
1139 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1140 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
1141 jno .Lmcck_return
1142 TRACE_IRQS_OFF
1143 brasl %r14,s390_handle_mcck
1144 TRACE_IRQS_ON
1145 .Lmcck_return:
1146 lg %r14,__LC_VDSO_PER_CPU
1147 lmg %r0,%r10,__PT_R0(%r11)
1148 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1149 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1150 jno 0f
1151 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
1152 stpt __LC_EXIT_TIMER
1153 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1154 0: lmg %r11,%r15,__PT_R11(%r11)
1155 lpswe __LC_RETURN_MCCK_PSW
1157 .Lmcck_panic:
1158 lg %r15,__LC_PANIC_STACK
1159 la %r11,STACK_FRAME_OVERHEAD(%r15)
1160 j .Lmcck_skip
1162 #
1163 # PSW restart interrupt handler
1164 #
1165 ENTRY(restart_int_handler)
1166 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1167 jz 0f
1168 .insn s,0xb2800000,__LC_LPP
1169 0: stg %r15,__LC_SAVE_AREA_RESTART
1170 lg %r15,__LC_RESTART_STACK
1171 aghi %r15,-__PT_SIZE # create pt_regs on stack
1172 xc 0(__PT_SIZE,%r15),0(%r15)
1173 stmg %r0,%r14,__PT_R0(%r15)
1174 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1175 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1176 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1177 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1178 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1179 lg %r2,__LC_RESTART_DATA
1180 lg %r3,__LC_RESTART_SOURCE
1181 ltgr %r3,%r3 # test source cpu address
1182 jm 1f # negative -> skip source stop
1183 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1184 brc 10,0b # wait for status stored
1185 1: basr %r14,%r1 # call function
1186 stap __SF_EMPTY(%r15) # store cpu address
1187 llgh %r3,__SF_EMPTY(%r15)
1188 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1189 brc 2,2b
1190 3: j 3b
1192 .section .kprobes.text, "ax"
1194 #ifdef CONFIG_CHECK_STACK
1195 /*
1196 * The synchronous or the asynchronous stack overflowed. We are dead.
1197 * No need to properly save the registers, we are going to panic anyway.
1198 * Setup a pt_regs so that show_trace can provide a good call trace.
1199 */
1200 stack_overflow:
1201 lg %r15,__LC_PANIC_STACK # change to panic stack
1202 la %r11,STACK_FRAME_OVERHEAD(%r15)
1203 stmg %r0,%r7,__PT_R0(%r11)
1204 stmg %r8,%r9,__PT_PSW(%r11)
1205 mvc __PT_R8(64,%r11),0(%r14)
1206 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1207 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1208 lgr %r2,%r11 # pass pointer to pt_regs
1209 jg kernel_stack_overflow
1210 #endif
1212 cleanup_critical:
1213 #if IS_ENABLED(CONFIG_KVM)
1214 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1215 jl 0f
1216 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1217 jl .Lcleanup_sie
1218 #endif
1219 clg %r9,BASED(.Lcleanup_table) # system_call
1220 jl 0f
1221 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1222 jl .Lcleanup_system_call
1223 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1224 jl 0f
1225 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1226 jl .Lcleanup_sysc_tif
1227 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1228 jl .Lcleanup_sysc_restore
1229 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1230 jl 0f
1231 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1232 jl .Lcleanup_io_tif
1233 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1234 jl .Lcleanup_io_restore
1235 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1236 jl 0f
1237 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1238 jl .Lcleanup_idle
1239 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1240 jl 0f
1241 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1242 jl .Lcleanup_save_fpu_regs
1243 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1244 jl 0f
1245 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1246 jl .Lcleanup_load_fpu_regs
1247 0: BR_EX %r14,%r11
1249 .align 8
1250 .Lcleanup_table:
1251 .quad system_call
1252 .quad .Lsysc_do_svc
1253 .quad .Lsysc_tif
1254 .quad .Lsysc_restore
1255 .quad .Lsysc_done
1256 .quad .Lio_tif
1257 .quad .Lio_restore
1258 .quad .Lio_done
1259 .quad psw_idle
1260 .quad .Lpsw_idle_end
1261 .quad save_fpu_regs
1262 .quad .Lsave_fpu_regs_end
1263 .quad load_fpu_regs
1264 .quad .Lload_fpu_regs_end
1266 #if IS_ENABLED(CONFIG_KVM)
1267 .Lcleanup_table_sie:
1268 .quad .Lsie_gmap
1269 .quad .Lsie_done
1271 .Lcleanup_sie:
1272 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1273 je 1f
1274 slg %r9,BASED(.Lsie_crit_mcck_start)
1275 clg %r9,BASED(.Lsie_crit_mcck_length)
1276 jh 1f
1277 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1278 1: BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1279 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1280 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1281 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1282 larl %r9,sie_exit # skip forward to sie_exit
1283 BR_EX %r14,%r11
1284 #endif
1286 .Lcleanup_system_call:
1287 # check if stpt has been executed
1288 clg %r9,BASED(.Lcleanup_system_call_insn)
1289 jh 0f
1290 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1291 cghi %r11,__LC_SAVE_AREA_ASYNC
1292 je 0f
1293 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1294 0: # check if stmg has been executed
1295 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1296 jh 0f
1297 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1298 0: # check if base register setup + TIF bit load has been done
1299 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1300 jhe 0f
1301 # set up saved register r12 task struct pointer
1302 stg %r12,32(%r11)
1303 # set up saved register r13 __TASK_thread offset
1304 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1305 0: # check if the user time update has been done
1306 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1307 jh 0f
1308 lg %r15,__LC_EXIT_TIMER
1309 slg %r15,__LC_SYNC_ENTER_TIMER
1310 alg %r15,__LC_USER_TIMER
1311 stg %r15,__LC_USER_TIMER
1312 0: # check if the system time update has been done
1313 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1314 jh 0f
1315 lg %r15,__LC_LAST_UPDATE_TIMER
1316 slg %r15,__LC_EXIT_TIMER
1317 alg %r15,__LC_SYSTEM_TIMER
1318 stg %r15,__LC_SYSTEM_TIMER
1319 0: # update accounting time stamp
1320 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1321 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
1322 # set up saved register r11
1323 lg %r15,__LC_KERNEL_STACK
1324 la %r9,STACK_FRAME_OVERHEAD(%r15)
1325 stg %r9,24(%r11) # r11 pt_regs pointer
1326 # fill pt_regs
1327 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1328 stmg %r0,%r7,__PT_R0(%r9)
1329 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1330 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1331 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1332 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1333 # setup saved register r15
1334 stg %r15,56(%r11) # r15 stack pointer
1335 # set new psw address and exit
1336 larl %r9,.Lsysc_do_svc
1337 BR_EX %r14,%r11
1338 .Lcleanup_system_call_insn:
1339 .quad system_call
1340 .quad .Lsysc_stmg
1341 .quad .Lsysc_per
1342 .quad .Lsysc_vtime+36
1343 .quad .Lsysc_vtime+42
1344 .Lcleanup_system_call_const:
1345 .quad __TASK_thread
1347 .Lcleanup_sysc_tif:
1348 larl %r9,.Lsysc_tif
1349 BR_EX %r14,%r11
1351 .Lcleanup_sysc_restore:
1352 # check if stpt has been executed
1353 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1354 jh 0f
1355 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1356 cghi %r11,__LC_SAVE_AREA_ASYNC
1357 je 0f
1358 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1359 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1360 je 1f
1361 lg %r9,24(%r11) # get saved pointer to pt_regs
1362 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1363 mvc 0(64,%r11),__PT_R8(%r9)
1364 lmg %r0,%r7,__PT_R0(%r9)
1365 1: lmg %r8,%r9,__LC_RETURN_PSW
1366 BR_EX %r14,%r11
1367 .Lcleanup_sysc_restore_insn:
1368 .quad .Lsysc_exit_timer
1369 .quad .Lsysc_done - 4
1371 .Lcleanup_io_tif:
1372 larl %r9,.Lio_tif
1373 BR_EX %r14,%r11
1375 .Lcleanup_io_restore:
1376 # check if stpt has been executed
1377 clg %r9,BASED(.Lcleanup_io_restore_insn)
1378 jh 0f
1379 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1380 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1381 je 1f
1382 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1383 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1384 mvc 0(64,%r11),__PT_R8(%r9)
1385 lmg %r0,%r7,__PT_R0(%r9)
1386 1: lmg %r8,%r9,__LC_RETURN_PSW
1387 BR_EX %r14,%r11
1388 .Lcleanup_io_restore_insn:
1389 .quad .Lio_exit_timer
1390 .quad .Lio_done - 4
1392 .Lcleanup_idle:
1393 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1394 # copy interrupt clock & cpu timer
1395 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1396 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1397 cghi %r11,__LC_SAVE_AREA_ASYNC
1398 je 0f
1399 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1400 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1401 0: # check if stck & stpt have been executed
1402 clg %r9,BASED(.Lcleanup_idle_insn)
1403 jhe 1f
1404 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1405 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1406 1: # calculate idle cycles
1407 #ifdef CONFIG_SMP
1408 clg %r9,BASED(.Lcleanup_idle_insn)
1409 jl 3f
1410 larl %r1,smp_cpu_mtid
1411 llgf %r1,0(%r1)
1412 ltgr %r1,%r1
1413 jz 3f
1414 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1415 larl %r3,mt_cycles
1416 ag %r3,__LC_PERCPU_OFFSET
1417 la %r4,__SF_EMPTY+16(%r15)
1418 2: lg %r0,0(%r3)
1419 slg %r0,0(%r4)
1420 alg %r0,64(%r4)
1421 stg %r0,0(%r3)
1422 la %r3,8(%r3)
1423 la %r4,8(%r4)
1424 brct %r1,2b
1425 #endif
1426 3: # account system time going idle
1427 lg %r9,__LC_STEAL_TIMER
1428 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1429 slg %r9,__LC_LAST_UPDATE_CLOCK
1430 stg %r9,__LC_STEAL_TIMER
1431 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1432 lg %r9,__LC_SYSTEM_TIMER
1433 alg %r9,__LC_LAST_UPDATE_TIMER
1434 slg %r9,__TIMER_IDLE_ENTER(%r2)
1435 stg %r9,__LC_SYSTEM_TIMER
1436 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1437 # prepare return psw
1438 nihh %r8,0xfcfd # clear irq & wait state bits
1439 lg %r9,48(%r11) # return from psw_idle
1440 BR_EX %r14,%r11
1441 .Lcleanup_idle_insn:
1442 .quad .Lpsw_idle_lpsw
1444 .Lcleanup_save_fpu_regs:
1445 larl %r9,save_fpu_regs
1446 BR_EX %r14,%r11
1448 .Lcleanup_load_fpu_regs:
1449 larl %r9,load_fpu_regs
1450 BR_EX %r14,%r11
1452 /*
1453 * Integer constants
1454 */
1455 .align 8
1456 .Lcritical_start:
1457 .quad .L__critical_start
1458 .Lcritical_length:
1459 .quad .L__critical_end - .L__critical_start
1460 #if IS_ENABLED(CONFIG_KVM)
1461 .Lsie_critical_start:
1462 .quad .Lsie_gmap
1463 .Lsie_critical_length:
1464 .quad .Lsie_done - .Lsie_gmap
1465 .Lsie_crit_mcck_start:
1466 .quad .Lsie_entry
1467 .Lsie_crit_mcck_length:
1468 .quad .Lsie_skip - .Lsie_entry
1469 #endif
1470 .section .rodata, "a"
1471 #define SYSCALL(esame,emu) .long esame
1472 .globl sys_call_table
1473 sys_call_table:
1474 #include "syscalls.S"
1475 #undef SYSCALL
1477 #ifdef CONFIG_COMPAT
1479 #define SYSCALL(esame,emu) .long emu
1480 .globl sys_call_table_emu
1481 sys_call_table_emu:
1482 #include "syscalls.S"
1483 #undef SYSCALL
1484 #endif