x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / arch / s390 / kernel / smp.c
blob27258db640d7371ecb5882f9de6669ab69d99a0a
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * SMP related functions
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
19 #define KMSG_COMPONENT "cpu"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
22 #include <linux/workqueue.h>
23 #include <linux/bootmem.h>
24 #include <linux/export.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/err.h>
28 #include <linux/spinlock.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/kmemleak.h>
31 #include <linux/delay.h>
32 #include <linux/interrupt.h>
33 #include <linux/irqflags.h>
34 #include <linux/cpu.h>
35 #include <linux/slab.h>
36 #include <linux/sched/hotplug.h>
37 #include <linux/sched/task_stack.h>
38 #include <linux/crash_dump.h>
39 #include <linux/memblock.h>
40 #include <asm/asm-offsets.h>
41 #include <asm/diag.h>
42 #include <asm/switch_to.h>
43 #include <asm/facility.h>
44 #include <asm/ipl.h>
45 #include <asm/setup.h>
46 #include <asm/irq.h>
47 #include <asm/tlbflush.h>
48 #include <asm/vtimer.h>
49 #include <asm/lowcore.h>
50 #include <asm/sclp.h>
51 #include <asm/vdso.h>
52 #include <asm/debug.h>
53 #include <asm/os_info.h>
54 #include <asm/sigp.h>
55 #include <asm/idle.h>
56 #include <asm/nmi.h>
57 #include <asm/topology.h>
58 #include "entry.h"
60 enum {
61 ec_schedule = 0,
62 ec_call_function_single,
63 ec_stop_cpu,
66 enum {
67 CPU_STATE_STANDBY,
68 CPU_STATE_CONFIGURED,
71 static DEFINE_PER_CPU(struct cpu *, cpu_device);
73 struct pcpu {
74 struct lowcore *lowcore; /* lowcore page(s) for the cpu */
75 unsigned long ec_mask; /* bit mask for ec_xxx functions */
76 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
77 signed char state; /* physical cpu state */
78 signed char polarization; /* physical polarization */
79 u16 address; /* physical cpu address */
82 static u8 boot_core_type;
83 static struct pcpu pcpu_devices[NR_CPUS];
85 static struct kmem_cache *pcpu_mcesa_cache;
87 unsigned int smp_cpu_mt_shift;
88 EXPORT_SYMBOL(smp_cpu_mt_shift);
90 unsigned int smp_cpu_mtid;
91 EXPORT_SYMBOL(smp_cpu_mtid);
93 #ifdef CONFIG_CRASH_DUMP
94 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
95 #endif
97 static unsigned int smp_max_threads __initdata = -1U;
99 static int __init early_nosmt(char *s)
101 smp_max_threads = 1;
102 return 0;
104 early_param("nosmt", early_nosmt);
106 static int __init early_smt(char *s)
108 get_option(&s, &smp_max_threads);
109 return 0;
111 early_param("smt", early_smt);
114 * The smp_cpu_state_mutex must be held when changing the state or polarization
115 * member of a pcpu data structure within the pcpu_devices arreay.
117 DEFINE_MUTEX(smp_cpu_state_mutex);
120 * Signal processor helper functions.
122 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
124 int cc;
126 while (1) {
127 cc = __pcpu_sigp(addr, order, parm, NULL);
128 if (cc != SIGP_CC_BUSY)
129 return cc;
130 cpu_relax();
134 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
136 int cc, retry;
138 for (retry = 0; ; retry++) {
139 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
140 if (cc != SIGP_CC_BUSY)
141 break;
142 if (retry >= 3)
143 udelay(10);
145 return cc;
148 static inline int pcpu_stopped(struct pcpu *pcpu)
150 u32 uninitialized_var(status);
152 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
153 0, &status) != SIGP_CC_STATUS_STORED)
154 return 0;
155 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
158 static inline int pcpu_running(struct pcpu *pcpu)
160 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
161 0, NULL) != SIGP_CC_STATUS_STORED)
162 return 1;
163 /* Status stored condition code is equivalent to cpu not running. */
164 return 0;
168 * Find struct pcpu by cpu address.
170 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
172 int cpu;
174 for_each_cpu(cpu, mask)
175 if (pcpu_devices[cpu].address == address)
176 return pcpu_devices + cpu;
177 return NULL;
180 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
182 int order;
184 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
185 return;
186 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
187 pcpu->ec_clk = get_tod_clock_fast();
188 pcpu_sigp_retry(pcpu, order, 0);
191 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
192 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
194 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
196 unsigned long async_stack, panic_stack;
197 unsigned long mcesa_origin, mcesa_bits;
198 struct lowcore *lc;
200 mcesa_origin = mcesa_bits = 0;
201 if (pcpu != &pcpu_devices[0]) {
202 pcpu->lowcore = (struct lowcore *)
203 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
204 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
205 panic_stack = __get_free_page(GFP_KERNEL);
206 if (!pcpu->lowcore || !panic_stack || !async_stack)
207 goto out;
208 if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
209 mcesa_origin = (unsigned long)
210 kmem_cache_alloc(pcpu_mcesa_cache, GFP_KERNEL);
211 if (!mcesa_origin)
212 goto out;
213 /* The pointer is stored with mcesa_bits ORed in */
214 kmemleak_not_leak((void *) mcesa_origin);
215 mcesa_bits = MACHINE_HAS_GS ? 11 : 0;
217 } else {
218 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
219 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
220 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK;
221 mcesa_bits = pcpu->lowcore->mcesad & MCESA_LC_MASK;
223 lc = pcpu->lowcore;
224 memcpy(lc, &S390_lowcore, 512);
225 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
226 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
227 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
228 lc->mcesad = mcesa_origin | mcesa_bits;
229 lc->cpu_nr = cpu;
230 lc->spinlock_lockval = arch_spin_lockval(cpu);
231 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
232 if (vdso_alloc_per_cpu(lc))
233 goto out;
234 lowcore_ptr[cpu] = lc;
235 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
236 return 0;
237 out:
238 if (pcpu != &pcpu_devices[0]) {
239 if (mcesa_origin)
240 kmem_cache_free(pcpu_mcesa_cache,
241 (void *) mcesa_origin);
242 free_page(panic_stack);
243 free_pages(async_stack, ASYNC_ORDER);
244 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
246 return -ENOMEM;
249 #ifdef CONFIG_HOTPLUG_CPU
251 static void pcpu_free_lowcore(struct pcpu *pcpu)
253 unsigned long mcesa_origin;
255 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
256 lowcore_ptr[pcpu - pcpu_devices] = NULL;
257 vdso_free_per_cpu(pcpu->lowcore);
258 if (pcpu == &pcpu_devices[0])
259 return;
260 if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
261 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK;
262 kmem_cache_free(pcpu_mcesa_cache, (void *) mcesa_origin);
264 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
265 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
266 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
269 #endif /* CONFIG_HOTPLUG_CPU */
271 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
273 struct lowcore *lc = pcpu->lowcore;
275 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
276 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
277 lc->cpu_nr = cpu;
278 lc->spinlock_lockval = arch_spin_lockval(cpu);
279 lc->percpu_offset = __per_cpu_offset[cpu];
280 lc->kernel_asce = S390_lowcore.kernel_asce;
281 lc->machine_flags = S390_lowcore.machine_flags;
282 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
283 __ctl_store(lc->cregs_save_area, 0, 15);
284 save_access_regs((unsigned int *) lc->access_regs_save_area);
285 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
286 sizeof(lc->stfle_fac_list));
287 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
288 sizeof(lc->alt_stfle_fac_list));
291 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
293 struct lowcore *lc = pcpu->lowcore;
295 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
296 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
297 lc->current_task = (unsigned long) tsk;
298 lc->lpp = LPP_MAGIC;
299 lc->current_pid = tsk->pid;
300 lc->user_timer = tsk->thread.user_timer;
301 lc->guest_timer = tsk->thread.guest_timer;
302 lc->system_timer = tsk->thread.system_timer;
303 lc->hardirq_timer = tsk->thread.hardirq_timer;
304 lc->softirq_timer = tsk->thread.softirq_timer;
305 lc->steal_timer = 0;
308 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
310 struct lowcore *lc = pcpu->lowcore;
312 lc->restart_stack = lc->kernel_stack;
313 lc->restart_fn = (unsigned long) func;
314 lc->restart_data = (unsigned long) data;
315 lc->restart_source = -1UL;
316 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
320 * Call function via PSW restart on pcpu and stop the current cpu.
322 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
323 void *data, unsigned long stack)
325 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
326 unsigned long source_cpu = stap();
328 __load_psw_mask(PSW_KERNEL_BITS);
329 if (pcpu->address == source_cpu)
330 func(data); /* should not return */
331 /* Stop target cpu (if func returns this stops the current cpu). */
332 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
333 /* Restart func on the target cpu and stop the current cpu. */
334 mem_assign_absolute(lc->restart_stack, stack);
335 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
336 mem_assign_absolute(lc->restart_data, (unsigned long) data);
337 mem_assign_absolute(lc->restart_source, source_cpu);
338 __bpon();
339 asm volatile(
340 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
341 " brc 2,0b # busy, try again\n"
342 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
343 " brc 2,1b # busy, try again\n"
344 : : "d" (pcpu->address), "d" (source_cpu),
345 "K" (SIGP_RESTART), "K" (SIGP_STOP)
346 : "0", "1", "cc");
347 for (;;) ;
351 * Enable additional logical cpus for multi-threading.
353 static int pcpu_set_smt(unsigned int mtid)
355 int cc;
357 if (smp_cpu_mtid == mtid)
358 return 0;
359 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
360 if (cc == 0) {
361 smp_cpu_mtid = mtid;
362 smp_cpu_mt_shift = 0;
363 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
364 smp_cpu_mt_shift++;
365 pcpu_devices[0].address = stap();
367 return cc;
371 * Call function on an online CPU.
373 void smp_call_online_cpu(void (*func)(void *), void *data)
375 struct pcpu *pcpu;
377 /* Use the current cpu if it is online. */
378 pcpu = pcpu_find_address(cpu_online_mask, stap());
379 if (!pcpu)
380 /* Use the first online cpu. */
381 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
382 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
386 * Call function on the ipl CPU.
388 void smp_call_ipl_cpu(void (*func)(void *), void *data)
390 struct lowcore *lc = pcpu_devices->lowcore;
392 if (pcpu_devices[0].address == stap())
393 lc = &S390_lowcore;
395 pcpu_delegate(&pcpu_devices[0], func, data,
396 lc->panic_stack - PANIC_FRAME_OFFSET + PAGE_SIZE);
399 int smp_find_processor_id(u16 address)
401 int cpu;
403 for_each_present_cpu(cpu)
404 if (pcpu_devices[cpu].address == address)
405 return cpu;
406 return -1;
409 bool arch_vcpu_is_preempted(int cpu)
411 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
412 return false;
413 if (pcpu_running(pcpu_devices + cpu))
414 return false;
415 return true;
417 EXPORT_SYMBOL(arch_vcpu_is_preempted);
419 void smp_yield_cpu(int cpu)
421 if (MACHINE_HAS_DIAG9C) {
422 diag_stat_inc_norecursion(DIAG_STAT_X09C);
423 asm volatile("diag %0,0,0x9c"
424 : : "d" (pcpu_devices[cpu].address));
425 } else if (MACHINE_HAS_DIAG44) {
426 diag_stat_inc_norecursion(DIAG_STAT_X044);
427 asm volatile("diag 0,0,0x44");
432 * Send cpus emergency shutdown signal. This gives the cpus the
433 * opportunity to complete outstanding interrupts.
435 static void smp_emergency_stop(cpumask_t *cpumask)
437 u64 end;
438 int cpu;
440 end = get_tod_clock() + (1000000UL << 12);
441 for_each_cpu(cpu, cpumask) {
442 struct pcpu *pcpu = pcpu_devices + cpu;
443 set_bit(ec_stop_cpu, &pcpu->ec_mask);
444 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
445 0, NULL) == SIGP_CC_BUSY &&
446 get_tod_clock() < end)
447 cpu_relax();
449 while (get_tod_clock() < end) {
450 for_each_cpu(cpu, cpumask)
451 if (pcpu_stopped(pcpu_devices + cpu))
452 cpumask_clear_cpu(cpu, cpumask);
453 if (cpumask_empty(cpumask))
454 break;
455 cpu_relax();
460 * Stop all cpus but the current one.
462 void smp_send_stop(void)
464 cpumask_t cpumask;
465 int cpu;
467 /* Disable all interrupts/machine checks */
468 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
469 trace_hardirqs_off();
471 debug_set_critical();
472 cpumask_copy(&cpumask, cpu_online_mask);
473 cpumask_clear_cpu(smp_processor_id(), &cpumask);
475 if (oops_in_progress)
476 smp_emergency_stop(&cpumask);
478 /* stop all processors */
479 for_each_cpu(cpu, &cpumask) {
480 struct pcpu *pcpu = pcpu_devices + cpu;
481 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
482 while (!pcpu_stopped(pcpu))
483 cpu_relax();
488 * This is the main routine where commands issued by other
489 * cpus are handled.
491 static void smp_handle_ext_call(void)
493 unsigned long bits;
495 /* handle bit signal external calls */
496 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
497 if (test_bit(ec_stop_cpu, &bits))
498 smp_stop_cpu();
499 if (test_bit(ec_schedule, &bits))
500 scheduler_ipi();
501 if (test_bit(ec_call_function_single, &bits))
502 generic_smp_call_function_single_interrupt();
505 static void do_ext_call_interrupt(struct ext_code ext_code,
506 unsigned int param32, unsigned long param64)
508 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
509 smp_handle_ext_call();
512 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
514 int cpu;
516 for_each_cpu(cpu, mask)
517 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
520 void arch_send_call_function_single_ipi(int cpu)
522 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
526 * this function sends a 'reschedule' IPI to another CPU.
527 * it goes straight through and wastes no time serializing
528 * anything. Worst case is that we lose a reschedule ...
530 void smp_send_reschedule(int cpu)
532 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
536 * parameter area for the set/clear control bit callbacks
538 struct ec_creg_mask_parms {
539 unsigned long orval;
540 unsigned long andval;
541 int cr;
545 * callback for setting/clearing control bits
547 static void smp_ctl_bit_callback(void *info)
549 struct ec_creg_mask_parms *pp = info;
550 unsigned long cregs[16];
552 __ctl_store(cregs, 0, 15);
553 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
554 __ctl_load(cregs, 0, 15);
558 * Set a bit in a control register of all cpus
560 void smp_ctl_set_bit(int cr, int bit)
562 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
564 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
566 EXPORT_SYMBOL(smp_ctl_set_bit);
569 * Clear a bit in a control register of all cpus
571 void smp_ctl_clear_bit(int cr, int bit)
573 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
575 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
577 EXPORT_SYMBOL(smp_ctl_clear_bit);
579 #ifdef CONFIG_CRASH_DUMP
581 int smp_store_status(int cpu)
583 struct pcpu *pcpu = pcpu_devices + cpu;
584 unsigned long pa;
586 pa = __pa(&pcpu->lowcore->floating_pt_save_area);
587 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
588 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
589 return -EIO;
590 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
591 return 0;
592 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
593 if (MACHINE_HAS_GS)
594 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
595 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
596 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
597 return -EIO;
598 return 0;
602 * Collect CPU state of the previous, crashed system.
603 * There are four cases:
604 * 1) standard zfcp dump
605 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
606 * The state for all CPUs except the boot CPU needs to be collected
607 * with sigp stop-and-store-status. The boot CPU state is located in
608 * the absolute lowcore of the memory stored in the HSA. The zcore code
609 * will copy the boot CPU state from the HSA.
610 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
611 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
612 * The state for all CPUs except the boot CPU needs to be collected
613 * with sigp stop-and-store-status. The firmware or the boot-loader
614 * stored the registers of the boot CPU in the absolute lowcore in the
615 * memory of the old system.
616 * 3) kdump and the old kernel did not store the CPU state,
617 * or stand-alone kdump for DASD
618 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
619 * The state for all CPUs except the boot CPU needs to be collected
620 * with sigp stop-and-store-status. The kexec code or the boot-loader
621 * stored the registers of the boot CPU in the memory of the old system.
622 * 4) kdump and the old kernel stored the CPU state
623 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
624 * This case does not exist for s390 anymore, setup_arch explicitly
625 * deactivates the elfcorehdr= kernel parameter
627 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
628 bool is_boot_cpu, unsigned long page)
630 __vector128 *vxrs = (__vector128 *) page;
632 if (is_boot_cpu)
633 vxrs = boot_cpu_vector_save_area;
634 else
635 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
636 save_area_add_vxrs(sa, vxrs);
639 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
640 bool is_boot_cpu, unsigned long page)
642 void *regs = (void *) page;
644 if (is_boot_cpu)
645 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
646 else
647 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
648 save_area_add_regs(sa, regs);
651 void __init smp_save_dump_cpus(void)
653 int addr, boot_cpu_addr, max_cpu_addr;
654 struct save_area *sa;
655 unsigned long page;
656 bool is_boot_cpu;
658 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
659 /* No previous system present, normal boot. */
660 return;
661 /* Allocate a page as dumping area for the store status sigps */
662 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
663 /* Set multi-threading state to the previous system. */
664 pcpu_set_smt(sclp.mtid_prev);
665 boot_cpu_addr = stap();
666 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
667 for (addr = 0; addr <= max_cpu_addr; addr++) {
668 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
669 SIGP_CC_NOT_OPERATIONAL)
670 continue;
671 is_boot_cpu = (addr == boot_cpu_addr);
672 /* Allocate save area */
673 sa = save_area_alloc(is_boot_cpu);
674 if (!sa)
675 panic("could not allocate memory for save area\n");
676 if (MACHINE_HAS_VX)
677 /* Get the vector registers */
678 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
680 * For a zfcp dump OLDMEM_BASE == NULL and the registers
681 * of the boot CPU are stored in the HSA. To retrieve
682 * these registers an SCLP request is required which is
683 * done by drivers/s390/char/zcore.c:init_cpu_info()
685 if (!is_boot_cpu || OLDMEM_BASE)
686 /* Get the CPU registers */
687 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
689 memblock_free(page, PAGE_SIZE);
690 diag308_reset();
691 pcpu_set_smt(0);
693 #endif /* CONFIG_CRASH_DUMP */
695 void smp_cpu_set_polarization(int cpu, int val)
697 pcpu_devices[cpu].polarization = val;
700 int smp_cpu_get_polarization(int cpu)
702 return pcpu_devices[cpu].polarization;
705 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
707 static int use_sigp_detection;
708 int address;
710 if (use_sigp_detection || sclp_get_core_info(info, early)) {
711 use_sigp_detection = 1;
712 for (address = 0;
713 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
714 address += (1U << smp_cpu_mt_shift)) {
715 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
716 SIGP_CC_NOT_OPERATIONAL)
717 continue;
718 info->core[info->configured].core_id =
719 address >> smp_cpu_mt_shift;
720 info->configured++;
722 info->combined = info->configured;
726 static int smp_add_present_cpu(int cpu);
728 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
730 struct pcpu *pcpu;
731 cpumask_t avail;
732 int cpu, nr, i, j;
733 u16 address;
735 nr = 0;
736 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
737 cpu = cpumask_first(&avail);
738 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
739 if (sclp.has_core_type && info->core[i].type != boot_core_type)
740 continue;
741 address = info->core[i].core_id << smp_cpu_mt_shift;
742 for (j = 0; j <= smp_cpu_mtid; j++) {
743 if (pcpu_find_address(cpu_present_mask, address + j))
744 continue;
745 pcpu = pcpu_devices + cpu;
746 pcpu->address = address + j;
747 pcpu->state =
748 (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
749 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
750 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
751 set_cpu_present(cpu, true);
752 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
753 set_cpu_present(cpu, false);
754 else
755 nr++;
756 cpu = cpumask_next(cpu, &avail);
757 if (cpu >= nr_cpu_ids)
758 break;
761 return nr;
764 void __init smp_detect_cpus(void)
766 unsigned int cpu, mtid, c_cpus, s_cpus;
767 struct sclp_core_info *info;
768 u16 address;
770 /* Get CPU information */
771 info = memblock_virt_alloc(sizeof(*info), 8);
772 smp_get_core_info(info, 1);
773 /* Find boot CPU type */
774 if (sclp.has_core_type) {
775 address = stap();
776 for (cpu = 0; cpu < info->combined; cpu++)
777 if (info->core[cpu].core_id == address) {
778 /* The boot cpu dictates the cpu type. */
779 boot_core_type = info->core[cpu].type;
780 break;
782 if (cpu >= info->combined)
783 panic("Could not find boot CPU type");
786 /* Set multi-threading state for the current system */
787 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
788 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
789 pcpu_set_smt(mtid);
791 /* Print number of CPUs */
792 c_cpus = s_cpus = 0;
793 for (cpu = 0; cpu < info->combined; cpu++) {
794 if (sclp.has_core_type &&
795 info->core[cpu].type != boot_core_type)
796 continue;
797 if (cpu < info->configured)
798 c_cpus += smp_cpu_mtid + 1;
799 else
800 s_cpus += smp_cpu_mtid + 1;
802 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
804 /* Add CPUs present at boot */
805 get_online_cpus();
806 __smp_rescan_cpus(info, 0);
807 put_online_cpus();
808 memblock_free_early((unsigned long)info, sizeof(*info));
812 * Activate a secondary processor.
814 static void smp_start_secondary(void *cpuvoid)
816 S390_lowcore.last_update_clock = get_tod_clock();
817 S390_lowcore.restart_stack = (unsigned long) restart_stack;
818 S390_lowcore.restart_fn = (unsigned long) do_restart;
819 S390_lowcore.restart_data = 0;
820 S390_lowcore.restart_source = -1UL;
821 restore_access_regs(S390_lowcore.access_regs_save_area);
822 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
823 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
824 cpu_init();
825 preempt_disable();
826 init_cpu_timer();
827 vtime_init();
828 pfault_init();
829 notify_cpu_starting(smp_processor_id());
830 set_cpu_online(smp_processor_id(), true);
831 inc_irq_stat(CPU_RST);
832 local_irq_enable();
833 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
836 /* Upping and downing of CPUs */
837 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
839 struct pcpu *pcpu;
840 int base, i, rc;
842 pcpu = pcpu_devices + cpu;
843 if (pcpu->state != CPU_STATE_CONFIGURED)
844 return -EIO;
845 base = smp_get_base_cpu(cpu);
846 for (i = 0; i <= smp_cpu_mtid; i++) {
847 if (base + i < nr_cpu_ids)
848 if (cpu_online(base + i))
849 break;
852 * If this is the first CPU of the core to get online
853 * do an initial CPU reset.
855 if (i > smp_cpu_mtid &&
856 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
857 SIGP_CC_ORDER_CODE_ACCEPTED)
858 return -EIO;
860 rc = pcpu_alloc_lowcore(pcpu, cpu);
861 if (rc)
862 return rc;
863 pcpu_prepare_secondary(pcpu, cpu);
864 pcpu_attach_task(pcpu, tidle);
865 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
866 /* Wait until cpu puts itself in the online & active maps */
867 while (!cpu_online(cpu))
868 cpu_relax();
869 return 0;
872 static unsigned int setup_possible_cpus __initdata;
874 static int __init _setup_possible_cpus(char *s)
876 get_option(&s, &setup_possible_cpus);
877 return 0;
879 early_param("possible_cpus", _setup_possible_cpus);
881 #ifdef CONFIG_HOTPLUG_CPU
883 int __cpu_disable(void)
885 unsigned long cregs[16];
887 /* Handle possible pending IPIs */
888 smp_handle_ext_call();
889 set_cpu_online(smp_processor_id(), false);
890 /* Disable pseudo page faults on this cpu. */
891 pfault_fini();
892 /* Disable interrupt sources via control register. */
893 __ctl_store(cregs, 0, 15);
894 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
895 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
896 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
897 __ctl_load(cregs, 0, 15);
898 clear_cpu_flag(CIF_NOHZ_DELAY);
899 return 0;
902 void __cpu_die(unsigned int cpu)
904 struct pcpu *pcpu;
906 /* Wait until target cpu is down */
907 pcpu = pcpu_devices + cpu;
908 while (!pcpu_stopped(pcpu))
909 cpu_relax();
910 pcpu_free_lowcore(pcpu);
911 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
912 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
915 void __noreturn cpu_die(void)
917 idle_task_exit();
918 __bpon();
919 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
920 for (;;) ;
923 #endif /* CONFIG_HOTPLUG_CPU */
925 void __init smp_fill_possible_mask(void)
927 unsigned int possible, sclp_max, cpu;
929 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
930 sclp_max = min(smp_max_threads, sclp_max);
931 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
932 possible = setup_possible_cpus ?: nr_cpu_ids;
933 possible = min(possible, sclp_max);
934 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
935 set_cpu_possible(cpu, true);
938 void __init smp_prepare_cpus(unsigned int max_cpus)
940 unsigned long size;
942 /* request the 0x1201 emergency signal external interrupt */
943 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
944 panic("Couldn't request external interrupt 0x1201");
945 /* request the 0x1202 external call external interrupt */
946 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
947 panic("Couldn't request external interrupt 0x1202");
948 /* create slab cache for the machine-check-extended-save-areas */
949 if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
950 size = 1UL << (MACHINE_HAS_GS ? 11 : 10);
951 pcpu_mcesa_cache = kmem_cache_create("nmi_save_areas",
952 size, size, 0, NULL);
953 if (!pcpu_mcesa_cache)
954 panic("Couldn't create nmi save area cache");
958 void __init smp_prepare_boot_cpu(void)
960 struct pcpu *pcpu = pcpu_devices;
962 WARN_ON(!cpu_present(0) || !cpu_online(0));
963 pcpu->state = CPU_STATE_CONFIGURED;
964 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
965 S390_lowcore.percpu_offset = __per_cpu_offset[0];
966 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
969 void __init smp_cpus_done(unsigned int max_cpus)
973 void __init smp_setup_processor_id(void)
975 pcpu_devices[0].address = stap();
976 S390_lowcore.cpu_nr = 0;
977 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
981 * the frequency of the profiling timer can be changed
982 * by writing a multiplier value into /proc/profile.
984 * usually you want to run this on all CPUs ;)
986 int setup_profiling_timer(unsigned int multiplier)
988 return 0;
991 #ifdef CONFIG_HOTPLUG_CPU
992 static ssize_t cpu_configure_show(struct device *dev,
993 struct device_attribute *attr, char *buf)
995 ssize_t count;
997 mutex_lock(&smp_cpu_state_mutex);
998 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
999 mutex_unlock(&smp_cpu_state_mutex);
1000 return count;
1003 static ssize_t cpu_configure_store(struct device *dev,
1004 struct device_attribute *attr,
1005 const char *buf, size_t count)
1007 struct pcpu *pcpu;
1008 int cpu, val, rc, i;
1009 char delim;
1011 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1012 return -EINVAL;
1013 if (val != 0 && val != 1)
1014 return -EINVAL;
1015 get_online_cpus();
1016 mutex_lock(&smp_cpu_state_mutex);
1017 rc = -EBUSY;
1018 /* disallow configuration changes of online cpus and cpu 0 */
1019 cpu = dev->id;
1020 cpu = smp_get_base_cpu(cpu);
1021 if (cpu == 0)
1022 goto out;
1023 for (i = 0; i <= smp_cpu_mtid; i++)
1024 if (cpu_online(cpu + i))
1025 goto out;
1026 pcpu = pcpu_devices + cpu;
1027 rc = 0;
1028 switch (val) {
1029 case 0:
1030 if (pcpu->state != CPU_STATE_CONFIGURED)
1031 break;
1032 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1033 if (rc)
1034 break;
1035 for (i = 0; i <= smp_cpu_mtid; i++) {
1036 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1037 continue;
1038 pcpu[i].state = CPU_STATE_STANDBY;
1039 smp_cpu_set_polarization(cpu + i,
1040 POLARIZATION_UNKNOWN);
1042 topology_expect_change();
1043 break;
1044 case 1:
1045 if (pcpu->state != CPU_STATE_STANDBY)
1046 break;
1047 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1048 if (rc)
1049 break;
1050 for (i = 0; i <= smp_cpu_mtid; i++) {
1051 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1052 continue;
1053 pcpu[i].state = CPU_STATE_CONFIGURED;
1054 smp_cpu_set_polarization(cpu + i,
1055 POLARIZATION_UNKNOWN);
1057 topology_expect_change();
1058 break;
1059 default:
1060 break;
1062 out:
1063 mutex_unlock(&smp_cpu_state_mutex);
1064 put_online_cpus();
1065 return rc ? rc : count;
1067 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1068 #endif /* CONFIG_HOTPLUG_CPU */
1070 static ssize_t show_cpu_address(struct device *dev,
1071 struct device_attribute *attr, char *buf)
1073 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1075 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1077 static struct attribute *cpu_common_attrs[] = {
1078 #ifdef CONFIG_HOTPLUG_CPU
1079 &dev_attr_configure.attr,
1080 #endif
1081 &dev_attr_address.attr,
1082 NULL,
1085 static struct attribute_group cpu_common_attr_group = {
1086 .attrs = cpu_common_attrs,
1089 static struct attribute *cpu_online_attrs[] = {
1090 &dev_attr_idle_count.attr,
1091 &dev_attr_idle_time_us.attr,
1092 NULL,
1095 static struct attribute_group cpu_online_attr_group = {
1096 .attrs = cpu_online_attrs,
1099 static int smp_cpu_online(unsigned int cpu)
1101 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1103 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1105 static int smp_cpu_pre_down(unsigned int cpu)
1107 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1109 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1110 return 0;
1113 static int smp_add_present_cpu(int cpu)
1115 struct device *s;
1116 struct cpu *c;
1117 int rc;
1119 c = kzalloc(sizeof(*c), GFP_KERNEL);
1120 if (!c)
1121 return -ENOMEM;
1122 per_cpu(cpu_device, cpu) = c;
1123 s = &c->dev;
1124 c->hotpluggable = 1;
1125 rc = register_cpu(c, cpu);
1126 if (rc)
1127 goto out;
1128 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1129 if (rc)
1130 goto out_cpu;
1131 rc = topology_cpu_init(c);
1132 if (rc)
1133 goto out_topology;
1134 return 0;
1136 out_topology:
1137 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1138 out_cpu:
1139 #ifdef CONFIG_HOTPLUG_CPU
1140 unregister_cpu(c);
1141 #endif
1142 out:
1143 return rc;
1146 #ifdef CONFIG_HOTPLUG_CPU
1148 int __ref smp_rescan_cpus(void)
1150 struct sclp_core_info *info;
1151 int nr;
1153 info = kzalloc(sizeof(*info), GFP_KERNEL);
1154 if (!info)
1155 return -ENOMEM;
1156 smp_get_core_info(info, 0);
1157 get_online_cpus();
1158 mutex_lock(&smp_cpu_state_mutex);
1159 nr = __smp_rescan_cpus(info, 1);
1160 mutex_unlock(&smp_cpu_state_mutex);
1161 put_online_cpus();
1162 kfree(info);
1163 if (nr)
1164 topology_schedule_update();
1165 return 0;
1168 static ssize_t __ref rescan_store(struct device *dev,
1169 struct device_attribute *attr,
1170 const char *buf,
1171 size_t count)
1173 int rc;
1175 rc = lock_device_hotplug_sysfs();
1176 if (rc)
1177 return rc;
1178 rc = smp_rescan_cpus();
1179 unlock_device_hotplug();
1180 return rc ? rc : count;
1182 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
1183 #endif /* CONFIG_HOTPLUG_CPU */
1185 static int __init s390_smp_init(void)
1187 int cpu, rc = 0;
1189 #ifdef CONFIG_HOTPLUG_CPU
1190 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1191 if (rc)
1192 return rc;
1193 #endif
1194 for_each_present_cpu(cpu) {
1195 rc = smp_add_present_cpu(cpu);
1196 if (rc)
1197 goto out;
1200 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1201 smp_cpu_online, smp_cpu_pre_down);
1202 rc = rc <= 0 ? rc : 0;
1203 out:
1204 return rc;
1206 subsys_initcall(s390_smp_init);