| blob | 364ea4a207bed9c8d994263855c578dc8b6e5eb2 |
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7 #include "calling.h"
8 #include <asm/asm-offsets.h>
9 #include <asm/current.h>
10 #include <asm/errno.h>
11 #include <asm/ia32_unistd.h>
12 #include <asm/thread_info.h>
13 #include <asm/segment.h>
14 #include <asm/irqflags.h>
15 #include <asm/asm.h>
16 #include <asm/smap.h>
17 #include <linux/linkage.h>
18 #include <linux/err.h>
20 .section .entry.text, "ax"
22 /*
23 * 32-bit SYSENTER entry.
24 *
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
27 *
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO. In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction. This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
33 *
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
38 *
39 * Arguments:
40 * eax system call number
41 * ebx arg1
42 * ecx arg2
43 * edx arg3
44 * esi arg4
45 * edi arg5
46 * ebp user stack
47 * 0(%ebp) arg6
48 */
49 ENTRY(entry_SYSENTER_compat)
50 /* Interrupts are off on entry. */
51 SWAPGS
53 /* We are about to clobber %rsp anyway, clobbering here is OK */
54 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
56 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
58 /*
59 * User tracing code (ptrace or signal handlers) might assume that
60 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
61 * syscall. Just in case the high bits are nonzero, zero-extend
62 * the syscall number. (This could almost certainly be deleted
63 * with no ill effects.)
64 */
65 movl %eax, %eax
67 /* Construct struct pt_regs on stack */
68 pushq $__USER32_DS /* pt_regs->ss */
69 pushq %rbp /* pt_regs->sp (stashed in bp) */
71 /*
72 * Push flags. This is nasty. First, interrupts are currently
73 * off, but we need pt_regs->flags to have IF set. Second, even
74 * if TF was set when SYSENTER started, it's clear by now. We fix
75 * that later using TIF_SINGLESTEP.
76 */
77 pushfq /* pt_regs->flags (except IF = 0) */
78 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */
79 pushq $__USER32_CS /* pt_regs->cs */
80 pushq $0 /* pt_regs->ip = 0 (placeholder) */
81 pushq %rax /* pt_regs->orig_ax */
82 pushq %rdi /* pt_regs->di */
83 pushq %rsi /* pt_regs->si */
84 pushq %rdx /* pt_regs->dx */
85 pushq %rcx /* pt_regs->cx */
86 pushq $-ENOSYS /* pt_regs->ax */
87 pushq $0 /* pt_regs->r8 = 0 */
88 xorl %r8d, %r8d /* nospec r8 */
89 pushq $0 /* pt_regs->r9 = 0 */
90 xorl %r9d, %r9d /* nospec r9 */
91 pushq $0 /* pt_regs->r10 = 0 */
92 xorl %r10d, %r10d /* nospec r10 */
93 pushq $0 /* pt_regs->r11 = 0 */
94 xorl %r11d, %r11d /* nospec r11 */
95 pushq %rbx /* pt_regs->rbx */
96 xorl %ebx, %ebx /* nospec rbx */
97 pushq %rbp /* pt_regs->rbp (will be overwritten) */
98 xorl %ebp, %ebp /* nospec rbp */
99 pushq $0 /* pt_regs->r12 = 0 */
100 xorl %r12d, %r12d /* nospec r12 */
101 pushq $0 /* pt_regs->r13 = 0 */
102 xorl %r13d, %r13d /* nospec r13 */
103 pushq $0 /* pt_regs->r14 = 0 */
104 xorl %r14d, %r14d /* nospec r14 */
105 pushq $0 /* pt_regs->r15 = 0 */
106 xorl %r15d, %r15d /* nospec r15 */
107 cld
109 /*
110 * SYSENTER doesn't filter flags, so we need to clear NT and AC
111 * ourselves. To save a few cycles, we can check whether
112 * either was set instead of doing an unconditional popfq.
113 * This needs to happen before enabling interrupts so that
114 * we don't get preempted with NT set.
115 *
116 * If TF is set, we will single-step all the way to here -- do_debug
117 * will ignore all the traps. (Yes, this is slow, but so is
118 * single-stepping in general. This allows us to avoid having
119 * a more complicated code to handle the case where a user program
120 * forces us to single-step through the SYSENTER entry code.)
121 *
122 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
123 * out-of-line as an optimization: NT is unlikely to be set in the
124 * majority of the cases and instead of polluting the I$ unnecessarily,
125 * we're keeping that code behind a branch which will predict as
126 * not-taken and therefore its instructions won't be fetched.
127 */
128 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
129 jnz .Lsysenter_fix_flags
130 .Lsysenter_flags_fixed:
132 /*
133 * User mode is traced as though IRQs are on, and SYSENTER
134 * turned them off.
135 */
136 TRACE_IRQS_OFF
138 movq %rsp, %rdi
139 call do_fast_syscall_32
140 /* XEN PV guests always use IRET path */
141 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
142 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
143 jmp sysret32_from_system_call
145 .Lsysenter_fix_flags:
146 pushq $X86_EFLAGS_FIXED
147 popfq
148 jmp .Lsysenter_flags_fixed
149 GLOBAL(__end_entry_SYSENTER_compat)
150 ENDPROC(entry_SYSENTER_compat)
152 /*
153 * 32-bit SYSCALL entry.
154 *
155 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
156 * on 64-bit kernels running on AMD CPUs.
157 *
158 * The SYSCALL instruction, in principle, should *only* occur in the
159 * vDSO. In practice, it appears that this really is the case.
160 * As evidence:
161 *
162 * - The calling convention for SYSCALL has changed several times without
163 * anyone noticing.
164 *
165 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
166 * user task that did SYSCALL without immediately reloading SS
167 * would randomly crash.
168 *
169 * - Most programmers do not directly target AMD CPUs, and the 32-bit
170 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
171 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
172 * because the SYSCALL instruction in legacy/native 32-bit mode (as
173 * opposed to compat mode) is sufficiently poorly designed as to be
174 * essentially unusable.
175 *
176 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
177 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
178 * programmed MSRs. RFLAGS gets masked by a value from another MSR
179 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
180 * the stack and does not change RSP.
181 *
182 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
183 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
184 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
185 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
186 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
187 *
188 * Arguments:
189 * eax system call number
190 * ecx return address
191 * ebx arg1
192 * ebp arg2 (note: not saved in the stack frame, should not be touched)
193 * edx arg3
194 * esi arg4
195 * edi arg5
196 * esp user stack
197 * 0(%esp) arg6
198 */
199 ENTRY(entry_SYSCALL_compat)
200 /* Interrupts are off on entry. */
201 swapgs
203 /* Stash user ESP */
204 movl %esp, %r8d
206 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
207 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
209 /* Switch to the kernel stack */
210 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
212 /* Construct struct pt_regs on stack */
213 pushq $__USER32_DS /* pt_regs->ss */
214 pushq %r8 /* pt_regs->sp */
215 pushq %r11 /* pt_regs->flags */
216 pushq $__USER32_CS /* pt_regs->cs */
217 pushq %rcx /* pt_regs->ip */
218 GLOBAL(entry_SYSCALL_compat_after_hwframe)
219 movl %eax, %eax /* discard orig_ax high bits */
220 pushq %rax /* pt_regs->orig_ax */
221 pushq %rdi /* pt_regs->di */
222 pushq %rsi /* pt_regs->si */
223 pushq %rdx /* pt_regs->dx */
224 pushq %rbp /* pt_regs->cx (stashed in bp) */
225 pushq $-ENOSYS /* pt_regs->ax */
226 pushq $0 /* pt_regs->r8 = 0 */
227 xorl %r8d, %r8d /* nospec r8 */
228 pushq $0 /* pt_regs->r9 = 0 */
229 xorl %r9d, %r9d /* nospec r9 */
230 pushq $0 /* pt_regs->r10 = 0 */
231 xorl %r10d, %r10d /* nospec r10 */
232 pushq $0 /* pt_regs->r11 = 0 */
233 xorl %r11d, %r11d /* nospec r11 */
234 pushq %rbx /* pt_regs->rbx */
235 xorl %ebx, %ebx /* nospec rbx */
236 pushq %rbp /* pt_regs->rbp (will be overwritten) */
237 xorl %ebp, %ebp /* nospec rbp */
238 pushq $0 /* pt_regs->r12 = 0 */
239 xorl %r12d, %r12d /* nospec r12 */
240 pushq $0 /* pt_regs->r13 = 0 */
241 xorl %r13d, %r13d /* nospec r13 */
242 pushq $0 /* pt_regs->r14 = 0 */
243 xorl %r14d, %r14d /* nospec r14 */
244 pushq $0 /* pt_regs->r15 = 0 */
245 xorl %r15d, %r15d /* nospec r15 */
247 /*
248 * User mode is traced as though IRQs are on, and SYSENTER
249 * turned them off.
250 */
251 TRACE_IRQS_OFF
253 movq %rsp, %rdi
254 call do_fast_syscall_32
255 /* XEN PV guests always use IRET path */
256 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
257 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
259 /* Opportunistic SYSRET */
260 sysret32_from_system_call:
261 TRACE_IRQS_ON /* User mode traces as IRQs on. */
262 movq RBX(%rsp), %rbx /* pt_regs->rbx */
263 movq RBP(%rsp), %rbp /* pt_regs->rbp */
264 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
265 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
266 addq $RAX, %rsp /* Skip r8-r15 */
267 popq %rax /* pt_regs->rax */
268 popq %rdx /* Skip pt_regs->cx */
269 popq %rdx /* pt_regs->dx */
270 popq %rsi /* pt_regs->si */
271 popq %rdi /* pt_regs->di */
273 /*
274 * USERGS_SYSRET32 does:
275 * GSBASE = user's GS base
276 * EIP = ECX
277 * RFLAGS = R11
278 * CS = __USER32_CS
279 * SS = __USER_DS
280 *
281 * ECX will not match pt_regs->cx, but we're returning to a vDSO
282 * trampoline that will fix up RCX, so this is okay.
283 *
284 * R12-R15 are callee-saved, so they contain whatever was in them
285 * when the system call started, which is already known to user
286 * code. We zero R8-R10 to avoid info leaks.
287 */
288 movq RSP-ORIG_RAX(%rsp), %rsp
290 /*
291 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
292 * on the process stack which is not mapped to userspace and
293 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
294 * switch until after after the last reference to the process
295 * stack.
296 *
297 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
298 */
299 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
301 xorl %r8d, %r8d
302 xorl %r9d, %r9d
303 xorl %r10d, %r10d
304 swapgs
305 sysretl
306 END(entry_SYSCALL_compat)
308 /*
309 * 32-bit legacy system call entry.
310 *
311 * 32-bit x86 Linux system calls traditionally used the INT $0x80
312 * instruction. INT $0x80 lands here.
313 *
314 * This entry point can be used by 32-bit and 64-bit programs to perform
315 * 32-bit system calls. Instances of INT $0x80 can be found inline in
316 * various programs and libraries. It is also used by the vDSO's
317 * __kernel_vsyscall fallback for hardware that doesn't support a faster
318 * entry method. Restarted 32-bit system calls also fall back to INT
319 * $0x80 regardless of what instruction was originally used to do the
320 * system call.
321 *
322 * This is considered a slow path. It is not used by most libc
323 * implementations on modern hardware except during process startup.
324 *
325 * Arguments:
326 * eax system call number
327 * ebx arg1
328 * ecx arg2
329 * edx arg3
330 * esi arg4
331 * edi arg5
332 * ebp arg6
333 */
334 ENTRY(entry_INT80_compat)
335 /*
336 * Interrupts are off on entry.
337 */
338 ASM_CLAC /* Do this early to minimize exposure */
339 SWAPGS
341 /*
342 * User tracing code (ptrace or signal handlers) might assume that
343 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
344 * syscall. Just in case the high bits are nonzero, zero-extend
345 * the syscall number. (This could almost certainly be deleted
346 * with no ill effects.)
347 */
348 movl %eax, %eax
350 pushq %rax /* pt_regs->orig_ax */
352 /* switch to thread stack expects orig_ax to be pushed */
353 call switch_to_thread_stack
355 pushq %rdi /* pt_regs->di */
356 pushq %rsi /* pt_regs->si */
357 pushq %rdx /* pt_regs->dx */
358 pushq %rcx /* pt_regs->cx */
359 pushq $-ENOSYS /* pt_regs->ax */
360 pushq $0 /* pt_regs->r8 = 0 */
361 xorl %r8d, %r8d /* nospec r8 */
362 pushq $0 /* pt_regs->r9 = 0 */
363 xorl %r9d, %r9d /* nospec r9 */
364 pushq $0 /* pt_regs->r10 = 0 */
365 xorl %r10d, %r10d /* nospec r10 */
366 pushq $0 /* pt_regs->r11 = 0 */
367 xorl %r11d, %r11d /* nospec r11 */
368 pushq %rbx /* pt_regs->rbx */
369 xorl %ebx, %ebx /* nospec rbx */
370 pushq %rbp /* pt_regs->rbp */
371 xorl %ebp, %ebp /* nospec rbp */
372 pushq %r12 /* pt_regs->r12 */
373 xorl %r12d, %r12d /* nospec r12 */
374 pushq %r13 /* pt_regs->r13 */
375 xorl %r13d, %r13d /* nospec r13 */
376 pushq %r14 /* pt_regs->r14 */
377 xorl %r14d, %r14d /* nospec r14 */
378 pushq %r15 /* pt_regs->r15 */
379 xorl %r15d, %r15d /* nospec r15 */
380 cld
382 /*
383 * User mode is traced as though IRQs are on, and the interrupt
384 * gate turned them off.
385 */
386 TRACE_IRQS_OFF
388 movq %rsp, %rdi
389 call do_int80_syscall_32
390 .Lsyscall_32_done:
392 /* Go back to user mode. */
393 TRACE_IRQS_ON
394 jmp swapgs_restore_regs_and_return_to_usermode
395 END(entry_INT80_compat)
397 ENTRY(stub32_clone)
398 /*
399 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr).
400 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val).
401 *
402 * The native 64-bit kernel's sys_clone() implements the latter,
403 * so we need to swap arguments here before calling it:
404 */
405 xchg %r8, %rcx
406 jmp sys_clone
407 ENDPROC(stub32_clone)