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x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / drivers / acpi / pci_root.c
blobeb857d6ea1fef04725c28d479e3f3268754f82a3
1 /*
2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/types.h>
26 #include <linux/mutex.h>
27 #include <linux/pm.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/pci.h>
30 #include <linux/pci-acpi.h>
31 #include <linux/pci-aspm.h>
32 #include <linux/dmar.h>
33 #include <linux/acpi.h>
34 #include <linux/slab.h>
35 #include <linux/dmi.h>
36 #include <linux/platform_data/x86/apple.h>
37 #include <acpi/apei.h> /* for acpi_hest_init() */
38
39 #include "internal.h"
40
41 #define _COMPONENT ACPI_PCI_COMPONENT
42 ACPI_MODULE_NAME("pci_root");
43 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
44 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
45 static int acpi_pci_root_add(struct acpi_device *device,
46 const struct acpi_device_id *not_used);
47 static void acpi_pci_root_remove(struct acpi_device *device);
48
49 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
50 {
51 acpiphp_check_host_bridge(adev);
52 return 0;
53 }
54
55 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
56 | OSC_PCI_ASPM_SUPPORT \
57 | OSC_PCI_CLOCK_PM_SUPPORT \
58 | OSC_PCI_MSI_SUPPORT)
59
60 static const struct acpi_device_id root_device_ids[] = {
61 {"PNP0A03", 0},
62 {"", 0},
63 };
64
65 static struct acpi_scan_handler pci_root_handler = {
66 .ids = root_device_ids,
67 .attach = acpi_pci_root_add,
68 .detach = acpi_pci_root_remove,
69 .hotplug = {
70 .enabled = true,
71 .scan_dependent = acpi_pci_root_scan_dependent,
72 },
73 };
74
75 static DEFINE_MUTEX(osc_lock);
76
77 /**
78 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79 * @handle - the ACPI CA node in question.
80 *
81 * Note: we could make this API take a struct acpi_device * instead, but
82 * for now, it's more convenient to operate on an acpi_handle.
83 */
84 int acpi_is_root_bridge(acpi_handle handle)
85 {
86 int ret;
87 struct acpi_device *device;
88
89 ret = acpi_bus_get_device(handle, &device);
90 if (ret)
91 return 0;
92
93 ret = acpi_match_device_ids(device, root_device_ids);
94 if (ret)
95 return 0;
96 else
97 return 1;
98 }
99 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
100
101 static acpi_status
102 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
103 {
104 struct resource *res = data;
105 struct acpi_resource_address64 address;
106 acpi_status status;
107
108 status = acpi_resource_to_address64(resource, &address);
109 if (ACPI_FAILURE(status))
110 return AE_OK;
111
112 if ((address.address.address_length > 0) &&
113 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
114 res->start = address.address.minimum;
115 res->end = address.address.minimum + address.address.address_length - 1;
116 }
117
118 return AE_OK;
119 }
120
121 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
122 struct resource *res)
123 {
124 acpi_status status;
125
126 res->start = -1;
127 status =
128 acpi_walk_resources(handle, METHOD_NAME__CRS,
129 get_root_bridge_busnr_callback, res);
130 if (ACPI_FAILURE(status))
131 return status;
132 if (res->start == -1)
133 return AE_ERROR;
134 return AE_OK;
135 }
136
137 struct pci_osc_bit_struct {
138 u32 bit;
139 char *desc;
140 };
141
142 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
143 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
144 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
145 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147 { OSC_PCI_MSI_SUPPORT, "MSI" },
148 };
149
150 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
151 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
152 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
153 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
154 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
155 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
156 };
157
158 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
159 struct pci_osc_bit_struct *table, int size)
160 {
161 char buf[80];
162 int i, len = 0;
163 struct pci_osc_bit_struct *entry;
164
165 buf[0] = '\0';
166 for (i = 0, entry = table; i < size; i++, entry++)
167 if (word & entry->bit)
168 len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
169 len ? " " : "", entry->desc);
170
171 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
172 }
173
174 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
175 {
176 decode_osc_bits(root, msg, word, pci_osc_support_bit,
177 ARRAY_SIZE(pci_osc_support_bit));
178 }
179
180 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
181 {
182 decode_osc_bits(root, msg, word, pci_osc_control_bit,
183 ARRAY_SIZE(pci_osc_control_bit));
184 }
185
186 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
187
188 static acpi_status acpi_pci_run_osc(acpi_handle handle,
189 const u32 *capbuf, u32 *retval)
190 {
191 struct acpi_osc_context context = {
192 .uuid_str = pci_osc_uuid_str,
193 .rev = 1,
194 .cap.length = 12,
195 .cap.pointer = (void *)capbuf,
196 };
197 acpi_status status;
198
199 status = acpi_run_osc(handle, &context);
200 if (ACPI_SUCCESS(status)) {
201 *retval = *((u32 *)(context.ret.pointer + 8));
202 kfree(context.ret.pointer);
203 }
204 return status;
205 }
206
207 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
208 u32 support,
209 u32 *control)
210 {
211 acpi_status status;
212 u32 result, capbuf[3];
213
214 support &= OSC_PCI_SUPPORT_MASKS;
215 support |= root->osc_support_set;
216
217 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
218 capbuf[OSC_SUPPORT_DWORD] = support;
219 if (control) {
220 *control &= OSC_PCI_CONTROL_MASKS;
221 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
222 } else {
223 /* Run _OSC query only with existing controls. */
224 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
225 }
226
227 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
228 if (ACPI_SUCCESS(status)) {
229 root->osc_support_set = support;
230 if (control)
231 *control = result;
232 }
233 return status;
234 }
235
236 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
237 {
238 acpi_status status;
239
240 mutex_lock(&osc_lock);
241 status = acpi_pci_query_osc(root, flags, NULL);
242 mutex_unlock(&osc_lock);
243 return status;
244 }
245
246 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
247 {
248 struct acpi_pci_root *root;
249 struct acpi_device *device;
250
251 if (acpi_bus_get_device(handle, &device) ||
252 acpi_match_device_ids(device, root_device_ids))
253 return NULL;
254
255 root = acpi_driver_data(device);
256
257 return root;
258 }
259 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
260
261 struct acpi_handle_node {
262 struct list_head node;
263 acpi_handle handle;
264 };
265
266 /**
267 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
268 * @handle: the handle in question
269 *
270 * Given an ACPI CA handle, the desired PCI device is located in the
271 * list of PCI devices.
272 *
273 * If the device is found, its reference count is increased and this
274 * function returns a pointer to its data structure. The caller must
275 * decrement the reference count by calling pci_dev_put().
276 * If no device is found, %NULL is returned.
277 */
278 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
279 {
280 int dev, fn;
281 unsigned long long adr;
282 acpi_status status;
283 acpi_handle phandle;
284 struct pci_bus *pbus;
285 struct pci_dev *pdev = NULL;
286 struct acpi_handle_node *node, *tmp;
287 struct acpi_pci_root *root;
288 LIST_HEAD(device_list);
289
290 /*
291 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
292 */
293 phandle = handle;
294 while (!acpi_is_root_bridge(phandle)) {
295 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
296 if (!node)
297 goto out;
298
299 INIT_LIST_HEAD(&node->node);
300 node->handle = phandle;
301 list_add(&node->node, &device_list);
302
303 status = acpi_get_parent(phandle, &phandle);
304 if (ACPI_FAILURE(status))
305 goto out;
306 }
307
308 root = acpi_pci_find_root(phandle);
309 if (!root)
310 goto out;
311
312 pbus = root->bus;
313
314 /*
315 * Now, walk back down the PCI device tree until we return to our
316 * original handle. Assumes that everything between the PCI root
317 * bridge and the device we're looking for must be a P2P bridge.
318 */
319 list_for_each_entry(node, &device_list, node) {
320 acpi_handle hnd = node->handle;
321 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
322 if (ACPI_FAILURE(status))
323 goto out;
324 dev = (adr >> 16) & 0xffff;
325 fn = adr & 0xffff;
326
327 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
328 if (!pdev || hnd == handle)
329 break;
330
331 pbus = pdev->subordinate;
332 pci_dev_put(pdev);
333
334 /*
335 * This function may be called for a non-PCI device that has a
336 * PCI parent (eg. a disk under a PCI SATA controller). In that
337 * case pdev->subordinate will be NULL for the parent.
338 */
339 if (!pbus) {
340 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
341 pdev = NULL;
342 break;
343 }
344 }
345 out:
346 list_for_each_entry_safe(node, tmp, &device_list, node)
347 kfree(node);
348
349 return pdev;
350 }
351 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
352
353 /**
354 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
355 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
356 * @mask: Mask of _OSC bits to request control of, place to store control mask.
357 * @req: Mask of _OSC bits the control of is essential to the caller.
358 *
359 * Run _OSC query for @mask and if that is successful, compare the returned
360 * mask of control bits with @req. If all of the @req bits are set in the
361 * returned mask, run _OSC request for it.
362 *
363 * The variable at the @mask address may be modified regardless of whether or
364 * not the function returns success. On success it will contain the mask of
365 * _OSC bits the BIOS has granted control of, but its contents are meaningless
366 * on failure.
367 **/
368 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
369 {
370 struct acpi_pci_root *root;
371 acpi_status status = AE_OK;
372 u32 ctrl, capbuf[3];
373
374 if (!mask)
375 return AE_BAD_PARAMETER;
376
377 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
378 if ((ctrl & req) != req)
379 return AE_TYPE;
380
381 root = acpi_pci_find_root(handle);
382 if (!root)
383 return AE_NOT_EXIST;
384
385 mutex_lock(&osc_lock);
386
387 *mask = ctrl | root->osc_control_set;
388 /* No need to evaluate _OSC if the control was already granted. */
389 if ((root->osc_control_set & ctrl) == ctrl)
390 goto out;
391
392 /* Need to check the available controls bits before requesting them. */
393 while (*mask) {
394 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
395 if (ACPI_FAILURE(status))
396 goto out;
397 if (ctrl == *mask)
398 break;
399 decode_osc_control(root, "platform does not support",
400 ctrl & ~(*mask));
401 ctrl = *mask;
402 }
403
404 if ((ctrl & req) != req) {
405 decode_osc_control(root, "not requesting control; platform does not support",
406 req & ~(ctrl));
407 status = AE_SUPPORT;
408 goto out;
409 }
410
411 capbuf[OSC_QUERY_DWORD] = 0;
412 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
413 capbuf[OSC_CONTROL_DWORD] = ctrl;
414 status = acpi_pci_run_osc(handle, capbuf, mask);
415 if (ACPI_SUCCESS(status))
416 root->osc_control_set = *mask;
417 out:
418 mutex_unlock(&osc_lock);
419 return status;
420 }
421 EXPORT_SYMBOL(acpi_pci_osc_control_set);
422
423 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
424 {
425 u32 support, control, requested;
426 acpi_status status;
427 struct acpi_device *device = root->device;
428 acpi_handle handle = device->handle;
429
430 /*
431 * Apple always return failure on _OSC calls when _OSI("Darwin") has
432 * been called successfully. We know the feature set supported by the
433 * platform, so avoid calling _OSC at all
434 */
435 if (x86_apple_machine) {
436 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
437 decode_osc_control(root, "OS assumes control of",
438 root->osc_control_set);
439 return;
440 }
441
442 /*
443 * All supported architectures that use ACPI have support for
444 * PCI domains, so we indicate this in _OSC support capabilities.
445 */
446 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
447 if (pci_ext_cfg_avail())
448 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
449 if (pcie_aspm_support_enabled())
450 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
451 if (pci_msi_enabled())
452 support |= OSC_PCI_MSI_SUPPORT;
453
454 decode_osc_support(root, "OS supports", support);
455 status = acpi_pci_osc_support(root, support);
456 if (ACPI_FAILURE(status)) {
457 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
458 acpi_format_exception(status));
459 *no_aspm = 1;
460 return;
461 }
462
463 if (pcie_ports_disabled) {
464 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
465 return;
466 }
467
468 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
469 decode_osc_support(root, "not requesting OS control; OS requires",
470 ACPI_PCIE_REQ_SUPPORT);
471 return;
472 }
473
474 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
475 | OSC_PCI_EXPRESS_PME_CONTROL;
476
477 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
478 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
479
480 if (pci_aer_available()) {
481 if (aer_acpi_firmware_first())
482 dev_info(&device->dev,
483 "PCIe AER handled by firmware\n");
484 else
485 control |= OSC_PCI_EXPRESS_AER_CONTROL;
486 }
487
488 requested = control;
489 status = acpi_pci_osc_control_set(handle, &control,
490 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
491 if (ACPI_SUCCESS(status)) {
492 decode_osc_control(root, "OS now controls", control);
493 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
494 /*
495 * We have ASPM control, but the FADT indicates that
496 * it's unsupported. Leave existing configuration
497 * intact and prevent the OS from touching it.
498 */
499 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
500 *no_aspm = 1;
501 }
502 } else {
503 decode_osc_control(root, "OS requested", requested);
504 decode_osc_control(root, "platform willing to grant", control);
505 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
506 acpi_format_exception(status));
507
508 /*
509 * We want to disable ASPM here, but aspm_disabled
510 * needs to remain in its state from boot so that we
511 * properly handle PCIe 1.1 devices. So we set this
512 * flag here, to defer the action until after the ACPI
513 * root scan.
514 */
515 *no_aspm = 1;
516 }
517 }
518
519 static int acpi_pci_root_add(struct acpi_device *device,
520 const struct acpi_device_id *not_used)
521 {
522 unsigned long long segment, bus;
523 acpi_status status;
524 int result;
525 struct acpi_pci_root *root;
526 acpi_handle handle = device->handle;
527 int no_aspm = 0;
528 bool hotadd = system_state == SYSTEM_RUNNING;
529
530 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
531 if (!root)
532 return -ENOMEM;
533
534 segment = 0;
535 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
536 &segment);
537 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
538 dev_err(&device->dev, "can't evaluate _SEG\n");
539 result = -ENODEV;
540 goto end;
541 }
542
543 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
544 root->secondary.flags = IORESOURCE_BUS;
545 status = try_get_root_bridge_busnr(handle, &root->secondary);
546 if (ACPI_FAILURE(status)) {
547 /*
548 * We need both the start and end of the downstream bus range
549 * to interpret _CBA (MMCONFIG base address), so it really is
550 * supposed to be in _CRS. If we don't find it there, all we
551 * can do is assume [_BBN-0xFF] or [0-0xFF].
552 */
553 root->secondary.end = 0xFF;
554 dev_warn(&device->dev,
555 FW_BUG "no secondary bus range in _CRS\n");
556 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
557 NULL, &bus);
558 if (ACPI_SUCCESS(status))
559 root->secondary.start = bus;
560 else if (status == AE_NOT_FOUND)
561 root->secondary.start = 0;
562 else {
563 dev_err(&device->dev, "can't evaluate _BBN\n");
564 result = -ENODEV;
565 goto end;
566 }
567 }
568
569 root->device = device;
570 root->segment = segment & 0xFFFF;
571 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
572 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
573 device->driver_data = root;
574
575 if (hotadd && dmar_device_add(handle)) {
576 result = -ENXIO;
577 goto end;
578 }
579
580 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
581 acpi_device_name(device), acpi_device_bid(device),
582 root->segment, &root->secondary);
583
584 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
585
586 negotiate_os_control(root, &no_aspm);
587
588 /*
589 * TBD: Need PCI interface for enumeration/configuration of roots.
590 */
591
592 /*
593 * Scan the Root Bridge
594 * --------------------
595 * Must do this prior to any attempt to bind the root device, as the
596 * PCI namespace does not get created until this call is made (and
597 * thus the root bridge's pci_dev does not exist).
598 */
599 root->bus = pci_acpi_scan_root(root);
600 if (!root->bus) {
601 dev_err(&device->dev,
602 "Bus %04x:%02x not present in PCI namespace\n",
603 root->segment, (unsigned int)root->secondary.start);
604 device->driver_data = NULL;
605 result = -ENODEV;
606 goto remove_dmar;
607 }
608
609 if (no_aspm)
610 pcie_no_aspm();
611
612 pci_acpi_add_bus_pm_notifier(device);
613 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
614
615 if (hotadd) {
616 pcibios_resource_survey_bus(root->bus);
617 pci_assign_unassigned_root_bus_resources(root->bus);
618 /*
619 * This is only called for the hotadd case. For the boot-time
620 * case, we need to wait until after PCI initialization in
621 * order to deal with IOAPICs mapped in on a PCI BAR.
622 *
623 * This is currently x86-specific, because acpi_ioapic_add()
624 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
625 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
626 * (see drivers/acpi/Kconfig).
627 */
628 acpi_ioapic_add(root->device->handle);
629 }
630
631 pci_lock_rescan_remove();
632 pci_bus_add_devices(root->bus);
633 pci_unlock_rescan_remove();
634 return 1;
635
636 remove_dmar:
637 if (hotadd)
638 dmar_device_remove(handle);
639 end:
640 kfree(root);
641 return result;
642 }
643
644 static void acpi_pci_root_remove(struct acpi_device *device)
645 {
646 struct acpi_pci_root *root = acpi_driver_data(device);
647
648 pci_lock_rescan_remove();
649
650 pci_stop_root_bus(root->bus);
651
652 pci_ioapic_remove(root);
653 device_set_wakeup_capable(root->bus->bridge, false);
654 pci_acpi_remove_bus_pm_notifier(device);
655
656 pci_remove_root_bus(root->bus);
657 WARN_ON(acpi_ioapic_remove(root));
658
659 dmar_device_remove(device->handle);
660
661 pci_unlock_rescan_remove();
662
663 kfree(root);
664 }
665
666 /*
667 * Following code to support acpi_pci_root_create() is copied from
668 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
669 * and ARM64.
670 */
671 static void acpi_pci_root_validate_resources(struct device *dev,
672 struct list_head *resources,
673 unsigned long type)
674 {
675 LIST_HEAD(list);
676 struct resource *res1, *res2, *root = NULL;
677 struct resource_entry *tmp, *entry, *entry2;
678
679 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
680 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
681
682 list_splice_init(resources, &list);
683 resource_list_for_each_entry_safe(entry, tmp, &list) {
684 bool free = false;
685 resource_size_t end;
686
687 res1 = entry->res;
688 if (!(res1->flags & type))
689 goto next;
690
691 /* Exclude non-addressable range or non-addressable portion */
692 end = min(res1->end, root->end);
693 if (end <= res1->start) {
694 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
695 res1);
696 free = true;
697 goto next;
698 } else if (res1->end != end) {
699 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
700 res1, (unsigned long long)end + 1,
701 (unsigned long long)res1->end);
702 res1->end = end;
703 }
704
705 resource_list_for_each_entry(entry2, resources) {
706 res2 = entry2->res;
707 if (!(res2->flags & type))
708 continue;
709
710 /*
711 * I don't like throwing away windows because then
712 * our resources no longer match the ACPI _CRS, but
713 * the kernel resource tree doesn't allow overlaps.
714 */
715 if (resource_overlaps(res1, res2)) {
716 res2->start = min(res1->start, res2->start);
717 res2->end = max(res1->end, res2->end);
718 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
719 res2, res1);
720 free = true;
721 goto next;
722 }
723 }
724
725 next:
726 resource_list_del(entry);
727 if (free)
728 resource_list_free_entry(entry);
729 else
730 resource_list_add_tail(entry, resources);
731 }
732 }
733
734 static void acpi_pci_root_remap_iospace(struct resource_entry *entry)
735 {
736 #ifdef PCI_IOBASE
737 struct resource *res = entry->res;
738 resource_size_t cpu_addr = res->start;
739 resource_size_t pci_addr = cpu_addr - entry->offset;
740 resource_size_t length = resource_size(res);
741 unsigned long port;
742
743 if (pci_register_io_range(cpu_addr, length))
744 goto err;
745
746 port = pci_address_to_pio(cpu_addr);
747 if (port == (unsigned long)-1)
748 goto err;
749
750 res->start = port;
751 res->end = port + length - 1;
752 entry->offset = port - pci_addr;
753
754 if (pci_remap_iospace(res, cpu_addr) < 0)
755 goto err;
756
757 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
758 return;
759 err:
760 res->flags |= IORESOURCE_DISABLED;
761 #endif
762 }
763
764 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
765 {
766 int ret;
767 struct list_head *list = &info->resources;
768 struct acpi_device *device = info->bridge;
769 struct resource_entry *entry, *tmp;
770 unsigned long flags;
771
772 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
773 ret = acpi_dev_get_resources(device, list,
774 acpi_dev_filter_resource_type_cb,
775 (void *)flags);
776 if (ret < 0)
777 dev_warn(&device->dev,
778 "failed to parse _CRS method, error code %d\n", ret);
779 else if (ret == 0)
780 dev_dbg(&device->dev,
781 "no IO and memory resources present in _CRS\n");
782 else {
783 resource_list_for_each_entry_safe(entry, tmp, list) {
784 if (entry->res->flags & IORESOURCE_IO)
785 acpi_pci_root_remap_iospace(entry);
786
787 if (entry->res->flags & IORESOURCE_DISABLED)
788 resource_list_destroy_entry(entry);
789 else
790 entry->res->name = info->name;
791 }
792 acpi_pci_root_validate_resources(&device->dev, list,
793 IORESOURCE_MEM);
794 acpi_pci_root_validate_resources(&device->dev, list,
795 IORESOURCE_IO);
796 }
797
798 return ret;
799 }
800
801 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
802 {
803 struct resource_entry *entry, *tmp;
804 struct resource *res, *conflict, *root = NULL;
805
806 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
807 res = entry->res;
808 if (res->flags & IORESOURCE_MEM)
809 root = &iomem_resource;
810 else if (res->flags & IORESOURCE_IO)
811 root = &ioport_resource;
812 else
813 continue;
814
815 /*
816 * Some legacy x86 host bridge drivers use iomem_resource and
817 * ioport_resource as default resource pool, skip it.
818 */
819 if (res == root)
820 continue;
821
822 conflict = insert_resource_conflict(root, res);
823 if (conflict) {
824 dev_info(&info->bridge->dev,
825 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
826 res, conflict->name, conflict);
827 resource_list_destroy_entry(entry);
828 }
829 }
830 }
831
832 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
833 {
834 struct resource *res;
835 struct resource_entry *entry, *tmp;
836
837 if (!info)
838 return;
839
840 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
841 res = entry->res;
842 if (res->parent &&
843 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
844 release_resource(res);
845 resource_list_destroy_entry(entry);
846 }
847
848 info->ops->release_info(info);
849 }
850
851 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
852 {
853 struct resource *res;
854 struct resource_entry *entry;
855
856 resource_list_for_each_entry(entry, &bridge->windows) {
857 res = entry->res;
858 if (res->flags & IORESOURCE_IO)
859 pci_unmap_iospace(res);
860 if (res->parent &&
861 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
862 release_resource(res);
863 }
864 __acpi_pci_root_release_info(bridge->release_data);
865 }
866
867 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
868 struct acpi_pci_root_ops *ops,
869 struct acpi_pci_root_info *info,
870 void *sysdata)
871 {
872 int ret, busnum = root->secondary.start;
873 struct acpi_device *device = root->device;
874 int node = acpi_get_node(device->handle);
875 struct pci_bus *bus;
876
877 info->root = root;
878 info->bridge = device;
879 info->ops = ops;
880 INIT_LIST_HEAD(&info->resources);
881 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
882 root->segment, busnum);
883
884 if (ops->init_info && ops->init_info(info))
885 goto out_release_info;
886 if (ops->prepare_resources)
887 ret = ops->prepare_resources(info);
888 else
889 ret = acpi_pci_probe_root_resources(info);
890 if (ret < 0)
891 goto out_release_info;
892
893 pci_acpi_root_add_resources(info);
894 pci_add_resource(&info->resources, &root->secondary);
895 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
896 sysdata, &info->resources);
897 if (!bus)
898 goto out_release_info;
899
900 pci_scan_child_bus(bus);
901 pci_set_host_bridge_release(to_pci_host_bridge(bus->bridge),
902 acpi_pci_root_release_info, info);
903 if (node != NUMA_NO_NODE)
904 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
905 return bus;
906
907 out_release_info:
908 __acpi_pci_root_release_info(info);
909 return NULL;
910 }
911
912 void __init acpi_pci_root_init(void)
913 {
914 acpi_hest_init();
915 if (acpi_pci_disabled)
916 return;
917
918 pci_acpi_crs_quirks();
919 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
920 }
Linux with added FPC-III support