1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #include <linux/kernel.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/types.h>
17 #include <linux/device.h>
19 #include <linux/err.h>
21 #include <linux/slab.h>
22 #include <linux/delay.h>
23 #include <linux/smp.h>
24 #include <linux/sysfs.h>
25 #include <linux/stat.h>
26 #include <linux/clk.h>
27 #include <linux/cpu.h>
28 #include <linux/coresight.h>
29 #include <linux/coresight-pmu.h>
30 #include <linux/pm_wakeup.h>
31 #include <linux/amba/bus.h>
32 #include <linux/seq_file.h>
33 #include <linux/uaccess.h>
34 #include <linux/perf_event.h>
35 #include <linux/pm_runtime.h>
36 #include <asm/sections.h>
37 #include <asm/local.h>
39 #include "coresight-etm4x.h"
40 #include "coresight-etm-perf.h"
42 static int boot_enable
;
43 module_param_named(boot_enable
, boot_enable
, int, S_IRUGO
);
45 /* The number of ETMv4 currently registered */
46 static int etm4_count
;
47 static struct etmv4_drvdata
*etmdrvdata
[NR_CPUS
];
48 static void etm4_set_default_config(struct etmv4_config
*config
);
49 static int etm4_set_event_filters(struct etmv4_drvdata
*drvdata
,
50 struct perf_event
*event
);
52 static enum cpuhp_state hp_online
;
54 static void etm4_os_unlock(struct etmv4_drvdata
*drvdata
)
56 /* Writing any value to ETMOSLAR unlocks the trace registers */
57 writel_relaxed(0x0, drvdata
->base
+ TRCOSLAR
);
58 drvdata
->os_unlock
= true;
62 static bool etm4_arch_supported(u8 arch
)
64 /* Mask out the minor version number */
65 switch (arch
& 0xf0) {
74 static int etm4_cpu_id(struct coresight_device
*csdev
)
76 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
81 static int etm4_trace_id(struct coresight_device
*csdev
)
83 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
85 return drvdata
->trcid
;
88 static void etm4_enable_hw(void *info
)
91 struct etmv4_drvdata
*drvdata
= info
;
92 struct etmv4_config
*config
= &drvdata
->config
;
94 CS_UNLOCK(drvdata
->base
);
96 etm4_os_unlock(drvdata
);
98 /* Disable the trace unit before programming trace registers */
99 writel_relaxed(0, drvdata
->base
+ TRCPRGCTLR
);
101 /* wait for TRCSTATR.IDLE to go up */
102 if (coresight_timeout(drvdata
->base
, TRCSTATR
, TRCSTATR_IDLE_BIT
, 1))
103 dev_err(drvdata
->dev
,
104 "timeout while waiting for Idle Trace Status\n");
106 writel_relaxed(config
->pe_sel
, drvdata
->base
+ TRCPROCSELR
);
107 writel_relaxed(config
->cfg
, drvdata
->base
+ TRCCONFIGR
);
108 /* nothing specific implemented */
109 writel_relaxed(0x0, drvdata
->base
+ TRCAUXCTLR
);
110 writel_relaxed(config
->eventctrl0
, drvdata
->base
+ TRCEVENTCTL0R
);
111 writel_relaxed(config
->eventctrl1
, drvdata
->base
+ TRCEVENTCTL1R
);
112 writel_relaxed(config
->stall_ctrl
, drvdata
->base
+ TRCSTALLCTLR
);
113 writel_relaxed(config
->ts_ctrl
, drvdata
->base
+ TRCTSCTLR
);
114 writel_relaxed(config
->syncfreq
, drvdata
->base
+ TRCSYNCPR
);
115 writel_relaxed(config
->ccctlr
, drvdata
->base
+ TRCCCCTLR
);
116 writel_relaxed(config
->bb_ctrl
, drvdata
->base
+ TRCBBCTLR
);
117 writel_relaxed(drvdata
->trcid
, drvdata
->base
+ TRCTRACEIDR
);
118 writel_relaxed(config
->vinst_ctrl
, drvdata
->base
+ TRCVICTLR
);
119 writel_relaxed(config
->viiectlr
, drvdata
->base
+ TRCVIIECTLR
);
120 writel_relaxed(config
->vissctlr
,
121 drvdata
->base
+ TRCVISSCTLR
);
122 writel_relaxed(config
->vipcssctlr
,
123 drvdata
->base
+ TRCVIPCSSCTLR
);
124 for (i
= 0; i
< drvdata
->nrseqstate
- 1; i
++)
125 writel_relaxed(config
->seq_ctrl
[i
],
126 drvdata
->base
+ TRCSEQEVRn(i
));
127 writel_relaxed(config
->seq_rst
, drvdata
->base
+ TRCSEQRSTEVR
);
128 writel_relaxed(config
->seq_state
, drvdata
->base
+ TRCSEQSTR
);
129 writel_relaxed(config
->ext_inp
, drvdata
->base
+ TRCEXTINSELR
);
130 for (i
= 0; i
< drvdata
->nr_cntr
; i
++) {
131 writel_relaxed(config
->cntrldvr
[i
],
132 drvdata
->base
+ TRCCNTRLDVRn(i
));
133 writel_relaxed(config
->cntr_ctrl
[i
],
134 drvdata
->base
+ TRCCNTCTLRn(i
));
135 writel_relaxed(config
->cntr_val
[i
],
136 drvdata
->base
+ TRCCNTVRn(i
));
139 /* Resource selector pair 0 is always implemented and reserved */
140 for (i
= 0; i
< drvdata
->nr_resource
* 2; i
++)
141 writel_relaxed(config
->res_ctrl
[i
],
142 drvdata
->base
+ TRCRSCTLRn(i
));
144 for (i
= 0; i
< drvdata
->nr_ss_cmp
; i
++) {
145 writel_relaxed(config
->ss_ctrl
[i
],
146 drvdata
->base
+ TRCSSCCRn(i
));
147 writel_relaxed(config
->ss_status
[i
],
148 drvdata
->base
+ TRCSSCSRn(i
));
149 writel_relaxed(config
->ss_pe_cmp
[i
],
150 drvdata
->base
+ TRCSSPCICRn(i
));
152 for (i
= 0; i
< drvdata
->nr_addr_cmp
; i
++) {
153 writeq_relaxed(config
->addr_val
[i
],
154 drvdata
->base
+ TRCACVRn(i
));
155 writeq_relaxed(config
->addr_acc
[i
],
156 drvdata
->base
+ TRCACATRn(i
));
158 for (i
= 0; i
< drvdata
->numcidc
; i
++)
159 writeq_relaxed(config
->ctxid_pid
[i
],
160 drvdata
->base
+ TRCCIDCVRn(i
));
161 writel_relaxed(config
->ctxid_mask0
, drvdata
->base
+ TRCCIDCCTLR0
);
162 writel_relaxed(config
->ctxid_mask1
, drvdata
->base
+ TRCCIDCCTLR1
);
164 for (i
= 0; i
< drvdata
->numvmidc
; i
++)
165 writeq_relaxed(config
->vmid_val
[i
],
166 drvdata
->base
+ TRCVMIDCVRn(i
));
167 writel_relaxed(config
->vmid_mask0
, drvdata
->base
+ TRCVMIDCCTLR0
);
168 writel_relaxed(config
->vmid_mask1
, drvdata
->base
+ TRCVMIDCCTLR1
);
171 * Request to keep the trace unit powered and also
172 * emulation of powerdown
174 writel_relaxed(readl_relaxed(drvdata
->base
+ TRCPDCR
) | TRCPDCR_PU
,
175 drvdata
->base
+ TRCPDCR
);
177 /* Enable the trace unit */
178 writel_relaxed(1, drvdata
->base
+ TRCPRGCTLR
);
180 /* wait for TRCSTATR.IDLE to go back down to '0' */
181 if (coresight_timeout(drvdata
->base
, TRCSTATR
, TRCSTATR_IDLE_BIT
, 0))
182 dev_err(drvdata
->dev
,
183 "timeout while waiting for Idle Trace Status\n");
185 CS_LOCK(drvdata
->base
);
187 dev_dbg(drvdata
->dev
, "cpu: %d enable smp call done\n", drvdata
->cpu
);
190 static int etm4_parse_event_config(struct etmv4_drvdata
*drvdata
,
191 struct perf_event
*event
)
194 struct etmv4_config
*config
= &drvdata
->config
;
195 struct perf_event_attr
*attr
= &event
->attr
;
202 /* Clear configuration from previous run */
203 memset(config
, 0, sizeof(struct etmv4_config
));
205 if (attr
->exclude_kernel
)
206 config
->mode
= ETM_MODE_EXCL_KERN
;
208 if (attr
->exclude_user
)
209 config
->mode
= ETM_MODE_EXCL_USER
;
211 /* Always start from the default config */
212 etm4_set_default_config(config
);
214 /* Configure filters specified on the perf cmd line, if any. */
215 ret
= etm4_set_event_filters(drvdata
, event
);
219 /* Go from generic option to ETMv4 specifics */
220 if (attr
->config
& BIT(ETM_OPT_CYCACC
)) {
221 config
->cfg
|= BIT(4);
222 /* TRM: Must program this for cycacc to work */
223 config
->ccctlr
= ETM_CYC_THRESHOLD_DEFAULT
;
225 if (attr
->config
& BIT(ETM_OPT_TS
))
226 /* bit[11], Global timestamp tracing bit */
227 config
->cfg
|= BIT(11);
228 /* return stack - enable if selected and supported */
229 if ((attr
->config
& BIT(ETM_OPT_RETSTK
)) && drvdata
->retstack
)
230 /* bit[12], Return stack enable bit */
231 config
->cfg
|= BIT(12);
237 static int etm4_enable_perf(struct coresight_device
*csdev
,
238 struct perf_event
*event
)
241 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
243 if (WARN_ON_ONCE(drvdata
->cpu
!= smp_processor_id())) {
248 /* Configure the tracer based on the session's specifics */
249 ret
= etm4_parse_event_config(drvdata
, event
);
253 etm4_enable_hw(drvdata
);
259 static int etm4_enable_sysfs(struct coresight_device
*csdev
)
261 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
264 spin_lock(&drvdata
->spinlock
);
267 * Executing etm4_enable_hw on the cpu whose ETM is being enabled
268 * ensures that register writes occur when cpu is powered.
270 ret
= smp_call_function_single(drvdata
->cpu
,
271 etm4_enable_hw
, drvdata
, 1);
275 drvdata
->sticky_enable
= true;
276 spin_unlock(&drvdata
->spinlock
);
278 dev_info(drvdata
->dev
, "ETM tracing enabled\n");
282 spin_unlock(&drvdata
->spinlock
);
286 static int etm4_enable(struct coresight_device
*csdev
,
287 struct perf_event
*event
, u32 mode
)
291 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
293 val
= local_cmpxchg(&drvdata
->mode
, CS_MODE_DISABLED
, mode
);
295 /* Someone is already using the tracer */
301 ret
= etm4_enable_sysfs(csdev
);
304 ret
= etm4_enable_perf(csdev
, event
);
310 /* The tracer didn't start */
312 local_set(&drvdata
->mode
, CS_MODE_DISABLED
);
317 static void etm4_disable_hw(void *info
)
320 struct etmv4_drvdata
*drvdata
= info
;
322 CS_UNLOCK(drvdata
->base
);
324 /* power can be removed from the trace unit now */
325 control
= readl_relaxed(drvdata
->base
+ TRCPDCR
);
326 control
&= ~TRCPDCR_PU
;
327 writel_relaxed(control
, drvdata
->base
+ TRCPDCR
);
329 control
= readl_relaxed(drvdata
->base
+ TRCPRGCTLR
);
331 /* EN, bit[0] Trace unit enable bit */
334 /* make sure everything completes before disabling */
337 writel_relaxed(control
, drvdata
->base
+ TRCPRGCTLR
);
339 CS_LOCK(drvdata
->base
);
341 dev_dbg(drvdata
->dev
, "cpu: %d disable smp call done\n", drvdata
->cpu
);
344 static int etm4_disable_perf(struct coresight_device
*csdev
,
345 struct perf_event
*event
)
348 struct etm_filters
*filters
= event
->hw
.addr_filters
;
349 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
351 if (WARN_ON_ONCE(drvdata
->cpu
!= smp_processor_id()))
354 etm4_disable_hw(drvdata
);
357 * Check if the start/stop logic was active when the unit was stopped.
358 * That way we can re-enable the start/stop logic when the process is
359 * scheduled again. Configuration of the start/stop logic happens in
360 * function etm4_set_event_filters().
362 control
= readl_relaxed(drvdata
->base
+ TRCVICTLR
);
363 /* TRCVICTLR::SSSTATUS, bit[9] */
364 filters
->ssstatus
= (control
& BIT(9));
369 static void etm4_disable_sysfs(struct coresight_device
*csdev
)
371 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
374 * Taking hotplug lock here protects from clocks getting disabled
375 * with tracing being left on (crash scenario) if user disable occurs
376 * after cpu online mask indicates the cpu is offline but before the
377 * DYING hotplug callback is serviced by the ETM driver.
380 spin_lock(&drvdata
->spinlock
);
383 * Executing etm4_disable_hw on the cpu whose ETM is being disabled
384 * ensures that register writes occur when cpu is powered.
386 smp_call_function_single(drvdata
->cpu
, etm4_disable_hw
, drvdata
, 1);
388 spin_unlock(&drvdata
->spinlock
);
391 dev_info(drvdata
->dev
, "ETM tracing disabled\n");
394 static void etm4_disable(struct coresight_device
*csdev
,
395 struct perf_event
*event
)
398 struct etmv4_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
401 * For as long as the tracer isn't disabled another entity can't
402 * change its status. As such we can read the status here without
403 * fearing it will change under us.
405 mode
= local_read(&drvdata
->mode
);
408 case CS_MODE_DISABLED
:
411 etm4_disable_sysfs(csdev
);
414 etm4_disable_perf(csdev
, event
);
419 local_set(&drvdata
->mode
, CS_MODE_DISABLED
);
422 static const struct coresight_ops_source etm4_source_ops
= {
423 .cpu_id
= etm4_cpu_id
,
424 .trace_id
= etm4_trace_id
,
425 .enable
= etm4_enable
,
426 .disable
= etm4_disable
,
429 static const struct coresight_ops etm4_cs_ops
= {
430 .source_ops
= &etm4_source_ops
,
433 static void etm4_init_arch_data(void *info
)
441 struct etmv4_drvdata
*drvdata
= info
;
443 /* Make sure all registers are accessible */
444 etm4_os_unlock(drvdata
);
446 CS_UNLOCK(drvdata
->base
);
448 /* find all capabilities of the tracing unit */
449 etmidr0
= readl_relaxed(drvdata
->base
+ TRCIDR0
);
451 /* INSTP0, bits[2:1] P0 tracing support field */
452 if (BMVAL(etmidr0
, 1, 1) && BMVAL(etmidr0
, 2, 2))
453 drvdata
->instrp0
= true;
455 drvdata
->instrp0
= false;
457 /* TRCBB, bit[5] Branch broadcast tracing support bit */
458 if (BMVAL(etmidr0
, 5, 5))
459 drvdata
->trcbb
= true;
461 drvdata
->trcbb
= false;
463 /* TRCCOND, bit[6] Conditional instruction tracing support bit */
464 if (BMVAL(etmidr0
, 6, 6))
465 drvdata
->trccond
= true;
467 drvdata
->trccond
= false;
469 /* TRCCCI, bit[7] Cycle counting instruction bit */
470 if (BMVAL(etmidr0
, 7, 7))
471 drvdata
->trccci
= true;
473 drvdata
->trccci
= false;
475 /* RETSTACK, bit[9] Return stack bit */
476 if (BMVAL(etmidr0
, 9, 9))
477 drvdata
->retstack
= true;
479 drvdata
->retstack
= false;
481 /* NUMEVENT, bits[11:10] Number of events field */
482 drvdata
->nr_event
= BMVAL(etmidr0
, 10, 11);
483 /* QSUPP, bits[16:15] Q element support field */
484 drvdata
->q_support
= BMVAL(etmidr0
, 15, 16);
485 /* TSSIZE, bits[28:24] Global timestamp size field */
486 drvdata
->ts_size
= BMVAL(etmidr0
, 24, 28);
488 /* base architecture of trace unit */
489 etmidr1
= readl_relaxed(drvdata
->base
+ TRCIDR1
);
491 * TRCARCHMIN, bits[7:4] architecture the minor version number
492 * TRCARCHMAJ, bits[11:8] architecture major versin number
494 drvdata
->arch
= BMVAL(etmidr1
, 4, 11);
496 /* maximum size of resources */
497 etmidr2
= readl_relaxed(drvdata
->base
+ TRCIDR2
);
498 /* CIDSIZE, bits[9:5] Indicates the Context ID size */
499 drvdata
->ctxid_size
= BMVAL(etmidr2
, 5, 9);
500 /* VMIDSIZE, bits[14:10] Indicates the VMID size */
501 drvdata
->vmid_size
= BMVAL(etmidr2
, 10, 14);
502 /* CCSIZE, bits[28:25] size of the cycle counter in bits minus 12 */
503 drvdata
->ccsize
= BMVAL(etmidr2
, 25, 28);
505 etmidr3
= readl_relaxed(drvdata
->base
+ TRCIDR3
);
506 /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
507 drvdata
->ccitmin
= BMVAL(etmidr3
, 0, 11);
508 /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
509 drvdata
->s_ex_level
= BMVAL(etmidr3
, 16, 19);
510 /* EXLEVEL_NS, bits[23:20] Non-secure state instruction tracing */
511 drvdata
->ns_ex_level
= BMVAL(etmidr3
, 20, 23);
514 * TRCERR, bit[24] whether a trace unit can trace a
515 * system error exception.
517 if (BMVAL(etmidr3
, 24, 24))
518 drvdata
->trc_error
= true;
520 drvdata
->trc_error
= false;
522 /* SYNCPR, bit[25] implementation has a fixed synchronization period? */
523 if (BMVAL(etmidr3
, 25, 25))
524 drvdata
->syncpr
= true;
526 drvdata
->syncpr
= false;
528 /* STALLCTL, bit[26] is stall control implemented? */
529 if (BMVAL(etmidr3
, 26, 26))
530 drvdata
->stallctl
= true;
532 drvdata
->stallctl
= false;
534 /* SYSSTALL, bit[27] implementation can support stall control? */
535 if (BMVAL(etmidr3
, 27, 27))
536 drvdata
->sysstall
= true;
538 drvdata
->sysstall
= false;
540 /* NUMPROC, bits[30:28] the number of PEs available for tracing */
541 drvdata
->nr_pe
= BMVAL(etmidr3
, 28, 30);
543 /* NOOVERFLOW, bit[31] is trace overflow prevention supported */
544 if (BMVAL(etmidr3
, 31, 31))
545 drvdata
->nooverflow
= true;
547 drvdata
->nooverflow
= false;
549 /* number of resources trace unit supports */
550 etmidr4
= readl_relaxed(drvdata
->base
+ TRCIDR4
);
551 /* NUMACPAIRS, bits[0:3] number of addr comparator pairs for tracing */
552 drvdata
->nr_addr_cmp
= BMVAL(etmidr4
, 0, 3);
553 /* NUMPC, bits[15:12] number of PE comparator inputs for tracing */
554 drvdata
->nr_pe_cmp
= BMVAL(etmidr4
, 12, 15);
556 * NUMRSPAIR, bits[19:16]
557 * The number of resource pairs conveyed by the HW starts at 0, i.e a
558 * value of 0x0 indicate 1 resource pair, 0x1 indicate two and so on.
559 * As such add 1 to the value of NUMRSPAIR for a better representation.
561 drvdata
->nr_resource
= BMVAL(etmidr4
, 16, 19) + 1;
563 * NUMSSCC, bits[23:20] the number of single-shot
564 * comparator control for tracing
566 drvdata
->nr_ss_cmp
= BMVAL(etmidr4
, 20, 23);
567 /* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */
568 drvdata
->numcidc
= BMVAL(etmidr4
, 24, 27);
569 /* NUMVMIDC, bits[31:28] number of VMID comparators for tracing */
570 drvdata
->numvmidc
= BMVAL(etmidr4
, 28, 31);
572 etmidr5
= readl_relaxed(drvdata
->base
+ TRCIDR5
);
573 /* NUMEXTIN, bits[8:0] number of external inputs implemented */
574 drvdata
->nr_ext_inp
= BMVAL(etmidr5
, 0, 8);
575 /* TRACEIDSIZE, bits[21:16] indicates the trace ID width */
576 drvdata
->trcid_size
= BMVAL(etmidr5
, 16, 21);
577 /* ATBTRIG, bit[22] implementation can support ATB triggers? */
578 if (BMVAL(etmidr5
, 22, 22))
579 drvdata
->atbtrig
= true;
581 drvdata
->atbtrig
= false;
583 * LPOVERRIDE, bit[23] implementation supports
584 * low-power state override
586 if (BMVAL(etmidr5
, 23, 23))
587 drvdata
->lpoverride
= true;
589 drvdata
->lpoverride
= false;
590 /* NUMSEQSTATE, bits[27:25] number of sequencer states implemented */
591 drvdata
->nrseqstate
= BMVAL(etmidr5
, 25, 27);
592 /* NUMCNTR, bits[30:28] number of counters available for tracing */
593 drvdata
->nr_cntr
= BMVAL(etmidr5
, 28, 30);
594 CS_LOCK(drvdata
->base
);
597 static void etm4_set_default_config(struct etmv4_config
*config
)
599 /* disable all events tracing */
600 config
->eventctrl0
= 0x0;
601 config
->eventctrl1
= 0x0;
603 /* disable stalling */
604 config
->stall_ctrl
= 0x0;
606 /* enable trace synchronization every 4096 bytes, if available */
607 config
->syncfreq
= 0xC;
609 /* disable timestamp event */
610 config
->ts_ctrl
= 0x0;
612 /* TRCVICTLR::EVENT = 0x01, select the always on logic */
613 config
->vinst_ctrl
|= BIT(0);
616 static u64
etm4_get_access_type(struct etmv4_config
*config
)
621 * EXLEVEL_NS, bits[15:12]
622 * The Exception levels are:
623 * Bit[12] Exception level 0 - Application
624 * Bit[13] Exception level 1 - OS
625 * Bit[14] Exception level 2 - Hypervisor
626 * Bit[15] Never implemented
628 * Always stay away from hypervisor mode.
630 access_type
= ETM_EXLEVEL_NS_HYP
;
632 if (config
->mode
& ETM_MODE_EXCL_KERN
)
633 access_type
|= ETM_EXLEVEL_NS_OS
;
635 if (config
->mode
& ETM_MODE_EXCL_USER
)
636 access_type
|= ETM_EXLEVEL_NS_APP
;
639 * EXLEVEL_S, bits[11:8], don't trace anything happening
642 access_type
|= (ETM_EXLEVEL_S_APP
|
649 static void etm4_set_comparator_filter(struct etmv4_config
*config
,
650 u64 start
, u64 stop
, int comparator
)
652 u64 access_type
= etm4_get_access_type(config
);
654 /* First half of default address comparator */
655 config
->addr_val
[comparator
] = start
;
656 config
->addr_acc
[comparator
] = access_type
;
657 config
->addr_type
[comparator
] = ETM_ADDR_TYPE_RANGE
;
659 /* Second half of default address comparator */
660 config
->addr_val
[comparator
+ 1] = stop
;
661 config
->addr_acc
[comparator
+ 1] = access_type
;
662 config
->addr_type
[comparator
+ 1] = ETM_ADDR_TYPE_RANGE
;
665 * Configure the ViewInst function to include this address range
668 * @comparator is divided by two since it is the index in the
669 * etmv4_config::addr_val array but register TRCVIIECTLR deals with
670 * address range comparator _pairs_.
673 * index 0 -> compatator pair 0
674 * index 2 -> comparator pair 1
675 * index 4 -> comparator pair 2
677 * index 14 -> comparator pair 7
679 config
->viiectlr
|= BIT(comparator
/ 2);
682 static void etm4_set_start_stop_filter(struct etmv4_config
*config
,
683 u64 address
, int comparator
,
684 enum etm_addr_type type
)
687 u64 access_type
= etm4_get_access_type(config
);
689 /* Configure the comparator */
690 config
->addr_val
[comparator
] = address
;
691 config
->addr_acc
[comparator
] = access_type
;
692 config
->addr_type
[comparator
] = type
;
695 * Configure ViewInst Start-Stop control register.
696 * Addresses configured to start tracing go from bit 0 to n-1,
697 * while those configured to stop tracing from 16 to 16 + n-1.
699 shift
= (type
== ETM_ADDR_TYPE_START
? 0 : 16);
700 config
->vissctlr
|= BIT(shift
+ comparator
);
703 static void etm4_set_default_filter(struct etmv4_config
*config
)
708 * Configure address range comparator '0' to encompass all
709 * possible addresses.
714 etm4_set_comparator_filter(config
, start
, stop
,
715 ETM_DEFAULT_ADDR_COMP
);
718 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
719 * in the started state
721 config
->vinst_ctrl
|= BIT(9);
723 /* No start-stop filtering for ViewInst */
724 config
->vissctlr
= 0x0;
727 static void etm4_set_default(struct etmv4_config
*config
)
729 if (WARN_ON_ONCE(!config
))
733 * Make default initialisation trace everything
735 * Select the "always true" resource selector on the
736 * "Enablign Event" line and configure address range comparator
737 * '0' to trace all the possible address range. From there
738 * configure the "include/exclude" engine to include address
739 * range comparator '0'.
741 etm4_set_default_config(config
);
742 etm4_set_default_filter(config
);
745 static int etm4_get_next_comparator(struct etmv4_drvdata
*drvdata
, u32 type
)
747 int nr_comparator
, index
= 0;
748 struct etmv4_config
*config
= &drvdata
->config
;
751 * nr_addr_cmp holds the number of comparator _pair_, so time 2
752 * for the total number of comparators.
754 nr_comparator
= drvdata
->nr_addr_cmp
* 2;
756 /* Go through the tally of comparators looking for a free one. */
757 while (index
< nr_comparator
) {
759 case ETM_ADDR_TYPE_RANGE
:
760 if (config
->addr_type
[index
] == ETM_ADDR_TYPE_NONE
&&
761 config
->addr_type
[index
+ 1] == ETM_ADDR_TYPE_NONE
)
764 /* Address range comparators go in pairs */
767 case ETM_ADDR_TYPE_START
:
768 case ETM_ADDR_TYPE_STOP
:
769 if (config
->addr_type
[index
] == ETM_ADDR_TYPE_NONE
)
772 /* Start/stop address can have odd indexes */
780 /* If we are here all the comparators have been used. */
784 static int etm4_set_event_filters(struct etmv4_drvdata
*drvdata
,
785 struct perf_event
*event
)
787 int i
, comparator
, ret
= 0;
789 struct etmv4_config
*config
= &drvdata
->config
;
790 struct etm_filters
*filters
= event
->hw
.addr_filters
;
795 /* Sync events with what Perf got */
796 perf_event_addr_filters_sync(event
);
799 * If there are no filters to deal with simply go ahead with
800 * the default filter, i.e the entire address range.
802 if (!filters
->nr_filters
)
805 for (i
= 0; i
< filters
->nr_filters
; i
++) {
806 struct etm_filter
*filter
= &filters
->etm_filter
[i
];
807 enum etm_addr_type type
= filter
->type
;
809 /* See if a comparator is free. */
810 comparator
= etm4_get_next_comparator(drvdata
, type
);
811 if (comparator
< 0) {
817 case ETM_ADDR_TYPE_RANGE
:
818 etm4_set_comparator_filter(config
,
823 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
824 * in the started state
826 config
->vinst_ctrl
|= BIT(9);
828 /* No start-stop filtering for ViewInst */
829 config
->vissctlr
= 0x0;
831 case ETM_ADDR_TYPE_START
:
832 case ETM_ADDR_TYPE_STOP
:
833 /* Get the right start or stop address */
834 address
= (type
== ETM_ADDR_TYPE_START
?
838 /* Configure comparator */
839 etm4_set_start_stop_filter(config
, address
,
843 * If filters::ssstatus == 1, trace acquisition was
844 * started but the process was yanked away before the
845 * the stop address was hit. As such the start/stop
846 * logic needs to be re-started so that tracing can
847 * resume where it left.
849 * The start/stop logic status when a process is
850 * scheduled out is checked in function
851 * etm4_disable_perf().
853 if (filters
->ssstatus
)
854 config
->vinst_ctrl
|= BIT(9);
856 /* No include/exclude filtering for ViewInst */
857 config
->viiectlr
= 0x0;
869 etm4_set_default_filter(config
);
875 void etm4_config_trace_mode(struct etmv4_config
*config
)
880 mode
&= (ETM_MODE_EXCL_KERN
| ETM_MODE_EXCL_USER
);
882 /* excluding kernel AND user space doesn't make sense */
883 WARN_ON_ONCE(mode
== (ETM_MODE_EXCL_KERN
| ETM_MODE_EXCL_USER
));
885 /* nothing to do if neither flags are set */
886 if (!(mode
& ETM_MODE_EXCL_KERN
) && !(mode
& ETM_MODE_EXCL_USER
))
889 addr_acc
= config
->addr_acc
[ETM_DEFAULT_ADDR_COMP
];
890 /* clear default config */
891 addr_acc
&= ~(ETM_EXLEVEL_NS_APP
| ETM_EXLEVEL_NS_OS
);
894 * EXLEVEL_NS, bits[15:12]
895 * The Exception levels are:
896 * Bit[12] Exception level 0 - Application
897 * Bit[13] Exception level 1 - OS
898 * Bit[14] Exception level 2 - Hypervisor
899 * Bit[15] Never implemented
901 if (mode
& ETM_MODE_EXCL_KERN
)
902 addr_acc
|= ETM_EXLEVEL_NS_OS
;
904 addr_acc
|= ETM_EXLEVEL_NS_APP
;
906 config
->addr_acc
[ETM_DEFAULT_ADDR_COMP
] = addr_acc
;
907 config
->addr_acc
[ETM_DEFAULT_ADDR_COMP
+ 1] = addr_acc
;
910 static int etm4_online_cpu(unsigned int cpu
)
912 if (!etmdrvdata
[cpu
])
915 if (etmdrvdata
[cpu
]->boot_enable
&& !etmdrvdata
[cpu
]->sticky_enable
)
916 coresight_enable(etmdrvdata
[cpu
]->csdev
);
920 static int etm4_starting_cpu(unsigned int cpu
)
922 if (!etmdrvdata
[cpu
])
925 spin_lock(&etmdrvdata
[cpu
]->spinlock
);
926 if (!etmdrvdata
[cpu
]->os_unlock
) {
927 etm4_os_unlock(etmdrvdata
[cpu
]);
928 etmdrvdata
[cpu
]->os_unlock
= true;
931 if (local_read(&etmdrvdata
[cpu
]->mode
))
932 etm4_enable_hw(etmdrvdata
[cpu
]);
933 spin_unlock(&etmdrvdata
[cpu
]->spinlock
);
937 static int etm4_dying_cpu(unsigned int cpu
)
939 if (!etmdrvdata
[cpu
])
942 spin_lock(&etmdrvdata
[cpu
]->spinlock
);
943 if (local_read(&etmdrvdata
[cpu
]->mode
))
944 etm4_disable_hw(etmdrvdata
[cpu
]);
945 spin_unlock(&etmdrvdata
[cpu
]->spinlock
);
949 static void etm4_init_trace_id(struct etmv4_drvdata
*drvdata
)
951 drvdata
->trcid
= coresight_get_trace_id(drvdata
->cpu
);
954 static int etm4_probe(struct amba_device
*adev
, const struct amba_id
*id
)
958 struct device
*dev
= &adev
->dev
;
959 struct coresight_platform_data
*pdata
= NULL
;
960 struct etmv4_drvdata
*drvdata
;
961 struct resource
*res
= &adev
->res
;
962 struct coresight_desc desc
= { 0 };
963 struct device_node
*np
= adev
->dev
.of_node
;
965 drvdata
= devm_kzalloc(dev
, sizeof(*drvdata
), GFP_KERNEL
);
970 pdata
= of_get_coresight_platform_data(dev
, np
);
972 return PTR_ERR(pdata
);
973 adev
->dev
.platform_data
= pdata
;
976 drvdata
->dev
= &adev
->dev
;
977 dev_set_drvdata(dev
, drvdata
);
979 /* Validity for the resource is already checked by the AMBA core */
980 base
= devm_ioremap_resource(dev
, res
);
982 return PTR_ERR(base
);
984 drvdata
->base
= base
;
986 spin_lock_init(&drvdata
->spinlock
);
988 drvdata
->cpu
= pdata
? pdata
->cpu
: 0;
991 etmdrvdata
[drvdata
->cpu
] = drvdata
;
993 if (smp_call_function_single(drvdata
->cpu
,
994 etm4_init_arch_data
, drvdata
, 1))
995 dev_err(dev
, "ETM arch init failed\n");
998 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING
,
999 "arm/coresight4:starting",
1000 etm4_starting_cpu
, etm4_dying_cpu
);
1001 ret
= cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ONLINE_DYN
,
1002 "arm/coresight4:online",
1003 etm4_online_cpu
, NULL
);
1005 goto err_arch_supported
;
1011 if (etm4_arch_supported(drvdata
->arch
) == false) {
1013 goto err_arch_supported
;
1016 etm4_init_trace_id(drvdata
);
1017 etm4_set_default(&drvdata
->config
);
1019 desc
.type
= CORESIGHT_DEV_TYPE_SOURCE
;
1020 desc
.subtype
.source_subtype
= CORESIGHT_DEV_SUBTYPE_SOURCE_PROC
;
1021 desc
.ops
= &etm4_cs_ops
;
1024 desc
.groups
= coresight_etmv4_groups
;
1025 drvdata
->csdev
= coresight_register(&desc
);
1026 if (IS_ERR(drvdata
->csdev
)) {
1027 ret
= PTR_ERR(drvdata
->csdev
);
1028 goto err_arch_supported
;
1031 ret
= etm_perf_symlink(drvdata
->csdev
, true);
1033 coresight_unregister(drvdata
->csdev
);
1034 goto err_arch_supported
;
1037 pm_runtime_put(&adev
->dev
);
1038 dev_info(dev
, "CPU%d: ETM v%d.%d initialized\n",
1039 drvdata
->cpu
, drvdata
->arch
>> 4, drvdata
->arch
& 0xf);
1042 coresight_enable(drvdata
->csdev
);
1043 drvdata
->boot_enable
= true;
1049 if (--etm4_count
== 0) {
1050 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING
);
1052 cpuhp_remove_state_nocalls(hp_online
);
1057 #define ETM4x_AMBA_ID(pid) \
1060 .mask = 0x000fffff, \
1063 static const struct amba_id etm4_ids
[] = {
1064 ETM4x_AMBA_ID(0x000bb95d), /* Cortex-A53 */
1065 ETM4x_AMBA_ID(0x000bb95e), /* Cortex-A57 */
1066 ETM4x_AMBA_ID(0x000bb95a), /* Cortex-A72 */
1067 ETM4x_AMBA_ID(0x000bb959), /* Cortex-A73 */
1068 ETM4x_AMBA_ID(0x000bb9da), /* Cortex-A35 */
1072 static struct amba_driver etm4x_driver
= {
1074 .name
= "coresight-etm4x",
1075 .suppress_bind_attrs
= true,
1077 .probe
= etm4_probe
,
1078 .id_table
= etm4_ids
,
1080 builtin_amba_driver(etm4x_driver
);