2 * This file is part of STM32 DAC driver
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
5 * Authors: Amelie Delaunay <amelie.delaunay@st.com>
6 * Fabrice Gasnier <fabrice.gasnier@st.com>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 * or FITNESS FOR A PARTICULAR PURPOSE.
17 * See the GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <linux/bitfield.h>
24 #include <linux/delay.h>
25 #include <linux/iio/iio.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
30 #include "stm32-dac-core.h"
32 #define STM32_DAC_CHANNEL_1 1
33 #define STM32_DAC_CHANNEL_2 2
34 #define STM32_DAC_IS_CHAN_1(ch) ((ch) & STM32_DAC_CHANNEL_1)
37 * struct stm32_dac - private data of DAC driver
38 * @common: reference to DAC common data
41 struct stm32_dac_common
*common
;
44 static int stm32_dac_is_enabled(struct iio_dev
*indio_dev
, int channel
)
46 struct stm32_dac
*dac
= iio_priv(indio_dev
);
50 ret
= regmap_read(dac
->common
->regmap
, STM32_DAC_CR
, &val
);
53 if (STM32_DAC_IS_CHAN_1(channel
))
54 en
= FIELD_GET(STM32_DAC_CR_EN1
, val
);
56 en
= FIELD_GET(STM32_DAC_CR_EN2
, val
);
61 static int stm32_dac_set_enable_state(struct iio_dev
*indio_dev
, int ch
,
64 struct stm32_dac
*dac
= iio_priv(indio_dev
);
65 u32 msk
= STM32_DAC_IS_CHAN_1(ch
) ? STM32_DAC_CR_EN1
: STM32_DAC_CR_EN2
;
66 u32 en
= enable
? msk
: 0;
69 ret
= regmap_update_bits(dac
->common
->regmap
, STM32_DAC_CR
, msk
, en
);
71 dev_err(&indio_dev
->dev
, "%s failed\n", en
?
72 "Enable" : "Disable");
77 * When HFSEL is set, it is not allowed to write the DHRx register
78 * during 8 clock cycles after the ENx bit is set. It is not allowed
79 * to make software/hardware trigger during this period either.
81 if (en
&& dac
->common
->hfsel
)
87 static int stm32_dac_get_value(struct stm32_dac
*dac
, int channel
, int *val
)
91 if (STM32_DAC_IS_CHAN_1(channel
))
92 ret
= regmap_read(dac
->common
->regmap
, STM32_DAC_DOR1
, val
);
94 ret
= regmap_read(dac
->common
->regmap
, STM32_DAC_DOR2
, val
);
96 return ret
? ret
: IIO_VAL_INT
;
99 static int stm32_dac_set_value(struct stm32_dac
*dac
, int channel
, int val
)
103 if (STM32_DAC_IS_CHAN_1(channel
))
104 ret
= regmap_write(dac
->common
->regmap
, STM32_DAC_DHR12R1
, val
);
106 ret
= regmap_write(dac
->common
->regmap
, STM32_DAC_DHR12R2
, val
);
111 static int stm32_dac_read_raw(struct iio_dev
*indio_dev
,
112 struct iio_chan_spec
const *chan
,
113 int *val
, int *val2
, long mask
)
115 struct stm32_dac
*dac
= iio_priv(indio_dev
);
118 case IIO_CHAN_INFO_RAW
:
119 return stm32_dac_get_value(dac
, chan
->channel
, val
);
120 case IIO_CHAN_INFO_SCALE
:
121 *val
= dac
->common
->vref_mv
;
122 *val2
= chan
->scan_type
.realbits
;
123 return IIO_VAL_FRACTIONAL_LOG2
;
129 static int stm32_dac_write_raw(struct iio_dev
*indio_dev
,
130 struct iio_chan_spec
const *chan
,
131 int val
, int val2
, long mask
)
133 struct stm32_dac
*dac
= iio_priv(indio_dev
);
136 case IIO_CHAN_INFO_RAW
:
137 return stm32_dac_set_value(dac
, chan
->channel
, val
);
143 static int stm32_dac_debugfs_reg_access(struct iio_dev
*indio_dev
,
144 unsigned reg
, unsigned writeval
,
147 struct stm32_dac
*dac
= iio_priv(indio_dev
);
150 return regmap_write(dac
->common
->regmap
, reg
, writeval
);
152 return regmap_read(dac
->common
->regmap
, reg
, readval
);
155 static const struct iio_info stm32_dac_iio_info
= {
156 .read_raw
= stm32_dac_read_raw
,
157 .write_raw
= stm32_dac_write_raw
,
158 .debugfs_reg_access
= stm32_dac_debugfs_reg_access
,
159 .driver_module
= THIS_MODULE
,
162 static const char * const stm32_dac_powerdown_modes
[] = {
166 static int stm32_dac_get_powerdown_mode(struct iio_dev
*indio_dev
,
167 const struct iio_chan_spec
*chan
)
172 static int stm32_dac_set_powerdown_mode(struct iio_dev
*indio_dev
,
173 const struct iio_chan_spec
*chan
,
179 static ssize_t
stm32_dac_read_powerdown(struct iio_dev
*indio_dev
,
181 const struct iio_chan_spec
*chan
,
184 int ret
= stm32_dac_is_enabled(indio_dev
, chan
->channel
);
189 return sprintf(buf
, "%d\n", ret
? 0 : 1);
192 static ssize_t
stm32_dac_write_powerdown(struct iio_dev
*indio_dev
,
194 const struct iio_chan_spec
*chan
,
195 const char *buf
, size_t len
)
200 ret
= strtobool(buf
, &powerdown
);
204 ret
= stm32_dac_set_enable_state(indio_dev
, chan
->channel
, !powerdown
);
211 static const struct iio_enum stm32_dac_powerdown_mode_en
= {
212 .items
= stm32_dac_powerdown_modes
,
213 .num_items
= ARRAY_SIZE(stm32_dac_powerdown_modes
),
214 .get
= stm32_dac_get_powerdown_mode
,
215 .set
= stm32_dac_set_powerdown_mode
,
218 static const struct iio_chan_spec_ext_info stm32_dac_ext_info
[] = {
221 .read
= stm32_dac_read_powerdown
,
222 .write
= stm32_dac_write_powerdown
,
223 .shared
= IIO_SEPARATE
,
225 IIO_ENUM("powerdown_mode", IIO_SEPARATE
, &stm32_dac_powerdown_mode_en
),
226 IIO_ENUM_AVAILABLE("powerdown_mode", &stm32_dac_powerdown_mode_en
),
230 #define STM32_DAC_CHANNEL(chan, name) { \
231 .type = IIO_VOLTAGE, \
235 .info_mask_separate = \
236 BIT(IIO_CHAN_INFO_RAW) | \
237 BIT(IIO_CHAN_INFO_SCALE), \
238 /* scan_index is always 0 as num_channels is 1 */ \
244 .datasheet_name = name, \
245 .ext_info = stm32_dac_ext_info \
248 static const struct iio_chan_spec stm32_dac_channels
[] = {
249 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_1
, "out1"),
250 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_2
, "out2"),
253 static int stm32_dac_chan_of_init(struct iio_dev
*indio_dev
)
255 struct device_node
*np
= indio_dev
->dev
.of_node
;
260 ret
= of_property_read_u32(np
, "reg", &channel
);
262 dev_err(&indio_dev
->dev
, "Failed to read reg property\n");
266 for (i
= 0; i
< ARRAY_SIZE(stm32_dac_channels
); i
++) {
267 if (stm32_dac_channels
[i
].channel
== channel
)
270 if (i
>= ARRAY_SIZE(stm32_dac_channels
)) {
271 dev_err(&indio_dev
->dev
, "Invalid reg property\n");
275 indio_dev
->channels
= &stm32_dac_channels
[i
];
277 * Expose only one channel here, as they can be used independently,
278 * with separate trigger. Then separate IIO devices are instantiated
281 indio_dev
->num_channels
= 1;
286 static int stm32_dac_probe(struct platform_device
*pdev
)
288 struct device_node
*np
= pdev
->dev
.of_node
;
289 struct iio_dev
*indio_dev
;
290 struct stm32_dac
*dac
;
296 indio_dev
= devm_iio_device_alloc(&pdev
->dev
, sizeof(*dac
));
299 platform_set_drvdata(pdev
, indio_dev
);
301 dac
= iio_priv(indio_dev
);
302 dac
->common
= dev_get_drvdata(pdev
->dev
.parent
);
303 indio_dev
->name
= dev_name(&pdev
->dev
);
304 indio_dev
->dev
.parent
= &pdev
->dev
;
305 indio_dev
->dev
.of_node
= pdev
->dev
.of_node
;
306 indio_dev
->info
= &stm32_dac_iio_info
;
307 indio_dev
->modes
= INDIO_DIRECT_MODE
;
309 ret
= stm32_dac_chan_of_init(indio_dev
);
313 return devm_iio_device_register(&pdev
->dev
, indio_dev
);
316 static const struct of_device_id stm32_dac_of_match
[] = {
317 { .compatible
= "st,stm32-dac", },
320 MODULE_DEVICE_TABLE(of
, stm32_dac_of_match
);
322 static struct platform_driver stm32_dac_driver
= {
323 .probe
= stm32_dac_probe
,
326 .of_match_table
= stm32_dac_of_match
,
329 module_platform_driver(stm32_dac_driver
);
331 MODULE_ALIAS("platform:stm32-dac");
332 MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
333 MODULE_DESCRIPTION("STMicroelectronics STM32 DAC driver");
334 MODULE_LICENSE("GPL v2");