x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / drivers / pci / host / pci-hyperv.c
blob53d1c08cef4dc6d4f3c0ee661cb29e9ff7120c37
1 /*
2 * Copyright (c) Microsoft Corporation.
4 * Author:
5 * Jake Oshins <jakeo@microsoft.com>
7 * This driver acts as a paravirtual front-end for PCI Express root buses.
8 * When a PCI Express function (either an entire device or an SR-IOV
9 * Virtual Function) is being passed through to the VM, this driver exposes
10 * a new bus to the guest VM. This is modeled as a root PCI bus because
11 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
12 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
13 * until a device as been exposed using this driver.
15 * Each root PCI bus has its own PCI domain, which is called "Segment" in
16 * the PCI Firmware Specifications. Thus while each device passed through
17 * to the VM using this front-end will appear at "device 0", the domain will
18 * be unique. Typically, each bus will have one PCI function on it, though
19 * this driver does support more than one.
21 * In order to map the interrupts from the device through to the guest VM,
22 * this driver also implements an IRQ Domain, which handles interrupts (either
23 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
24 * set up, torn down, or reaffined, this driver communicates with the
25 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
26 * interrupt will be delivered to the correct virtual processor at the right
27 * vector. This driver does not support level-triggered (line-based)
28 * interrupts, and will report that the Interrupt Line register in the
29 * function's configuration space is zero.
31 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
32 * facilities. For instance, the configuration space of a function exposed
33 * by Hyper-V is mapped into a single page of memory space, and the
34 * read and write handlers for config space must be aware of this mechanism.
35 * Similarly, device setup and teardown involves messages sent to and from
36 * the PCI back-end driver in Hyper-V.
38 * This program is free software; you can redistribute it and/or modify it
39 * under the terms of the GNU General Public License version 2 as published
40 * by the Free Software Foundation.
42 * This program is distributed in the hope that it will be useful, but
43 * WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
45 * NON INFRINGEMENT. See the GNU General Public License for more
46 * details.
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/delay.h>
54 #include <linux/semaphore.h>
55 #include <linux/irqdomain.h>
56 #include <linux/irq.h>
58 #include <asm/irqdomain.h>
59 #include <asm/apic.h>
60 #include <linux/msi.h>
61 #include <linux/hyperv.h>
62 #include <linux/refcount.h>
63 #include <asm/mshyperv.h>
66 * Protocol versions. The low word is the minor version, the high word the
67 * major version.
70 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
71 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
72 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
74 enum pci_protocol_version_t {
75 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
76 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
79 #define CPU_AFFINITY_ALL -1ULL
82 * Supported protocol versions in the order of probing - highest go
83 * first.
85 static enum pci_protocol_version_t pci_protocol_versions[] = {
86 PCI_PROTOCOL_VERSION_1_2,
87 PCI_PROTOCOL_VERSION_1_1,
91 * Protocol version negotiated by hv_pci_protocol_negotiation().
93 static enum pci_protocol_version_t pci_protocol_version;
95 #define PCI_CONFIG_MMIO_LENGTH 0x2000
96 #define CFG_PAGE_OFFSET 0x1000
97 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
99 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
101 #define STATUS_REVISION_MISMATCH 0xC0000059
103 /* space for 32bit serial number as string */
104 #define SLOT_NAME_SIZE 11
107 * Message Types
110 enum pci_message_type {
112 * Version 1.1
114 PCI_MESSAGE_BASE = 0x42490000,
115 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
116 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
117 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
118 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
119 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
120 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
121 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
122 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
123 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
124 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
125 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
126 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
127 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
128 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
129 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
130 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
131 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
132 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
133 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
134 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
135 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
136 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
137 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
138 PCI_MESSAGE_MAXIMUM
142 * Structures defining the virtual PCI Express protocol.
145 union pci_version {
146 struct {
147 u16 minor_version;
148 u16 major_version;
149 } parts;
150 u32 version;
151 } __packed;
154 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
155 * which is all this driver does. This representation is the one used in
156 * Windows, which is what is expected when sending this back and forth with
157 * the Hyper-V parent partition.
159 union win_slot_encoding {
160 struct {
161 u32 dev:5;
162 u32 func:3;
163 u32 reserved:24;
164 } bits;
165 u32 slot;
166 } __packed;
169 * Pretty much as defined in the PCI Specifications.
171 struct pci_function_description {
172 u16 v_id; /* vendor ID */
173 u16 d_id; /* device ID */
174 u8 rev;
175 u8 prog_intf;
176 u8 subclass;
177 u8 base_class;
178 u32 subsystem_id;
179 union win_slot_encoding win_slot;
180 u32 ser; /* serial number */
181 } __packed;
184 * struct hv_msi_desc
185 * @vector: IDT entry
186 * @delivery_mode: As defined in Intel's Programmer's
187 * Reference Manual, Volume 3, Chapter 8.
188 * @vector_count: Number of contiguous entries in the
189 * Interrupt Descriptor Table that are
190 * occupied by this Message-Signaled
191 * Interrupt. For "MSI", as first defined
192 * in PCI 2.2, this can be between 1 and
193 * 32. For "MSI-X," as first defined in PCI
194 * 3.0, this must be 1, as each MSI-X table
195 * entry would have its own descriptor.
196 * @reserved: Empty space
197 * @cpu_mask: All the target virtual processors.
199 struct hv_msi_desc {
200 u8 vector;
201 u8 delivery_mode;
202 u16 vector_count;
203 u32 reserved;
204 u64 cpu_mask;
205 } __packed;
208 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
209 * @vector: IDT entry
210 * @delivery_mode: As defined in Intel's Programmer's
211 * Reference Manual, Volume 3, Chapter 8.
212 * @vector_count: Number of contiguous entries in the
213 * Interrupt Descriptor Table that are
214 * occupied by this Message-Signaled
215 * Interrupt. For "MSI", as first defined
216 * in PCI 2.2, this can be between 1 and
217 * 32. For "MSI-X," as first defined in PCI
218 * 3.0, this must be 1, as each MSI-X table
219 * entry would have its own descriptor.
220 * @processor_count: number of bits enabled in array.
221 * @processor_array: All the target virtual processors.
223 struct hv_msi_desc2 {
224 u8 vector;
225 u8 delivery_mode;
226 u16 vector_count;
227 u16 processor_count;
228 u16 processor_array[32];
229 } __packed;
232 * struct tran_int_desc
233 * @reserved: unused, padding
234 * @vector_count: same as in hv_msi_desc
235 * @data: This is the "data payload" value that is
236 * written by the device when it generates
237 * a message-signaled interrupt, either MSI
238 * or MSI-X.
239 * @address: This is the address to which the data
240 * payload is written on interrupt
241 * generation.
243 struct tran_int_desc {
244 u16 reserved;
245 u16 vector_count;
246 u32 data;
247 u64 address;
248 } __packed;
251 * A generic message format for virtual PCI.
252 * Specific message formats are defined later in the file.
255 struct pci_message {
256 u32 type;
257 } __packed;
259 struct pci_child_message {
260 struct pci_message message_type;
261 union win_slot_encoding wslot;
262 } __packed;
264 struct pci_incoming_message {
265 struct vmpacket_descriptor hdr;
266 struct pci_message message_type;
267 } __packed;
269 struct pci_response {
270 struct vmpacket_descriptor hdr;
271 s32 status; /* negative values are failures */
272 } __packed;
274 struct pci_packet {
275 void (*completion_func)(void *context, struct pci_response *resp,
276 int resp_packet_size);
277 void *compl_ctxt;
279 struct pci_message message[0];
283 * Specific message types supporting the PCI protocol.
287 * Version negotiation message. Sent from the guest to the host.
288 * The guest is free to try different versions until the host
289 * accepts the version.
291 * pci_version: The protocol version requested.
292 * is_last_attempt: If TRUE, this is the last version guest will request.
293 * reservedz: Reserved field, set to zero.
296 struct pci_version_request {
297 struct pci_message message_type;
298 u32 protocol_version;
299 } __packed;
302 * Bus D0 Entry. This is sent from the guest to the host when the virtual
303 * bus (PCI Express port) is ready for action.
306 struct pci_bus_d0_entry {
307 struct pci_message message_type;
308 u32 reserved;
309 u64 mmio_base;
310 } __packed;
312 struct pci_bus_relations {
313 struct pci_incoming_message incoming;
314 u32 device_count;
315 struct pci_function_description func[0];
316 } __packed;
318 struct pci_q_res_req_response {
319 struct vmpacket_descriptor hdr;
320 s32 status; /* negative values are failures */
321 u32 probed_bar[6];
322 } __packed;
324 struct pci_set_power {
325 struct pci_message message_type;
326 union win_slot_encoding wslot;
327 u32 power_state; /* In Windows terms */
328 u32 reserved;
329 } __packed;
331 struct pci_set_power_response {
332 struct vmpacket_descriptor hdr;
333 s32 status; /* negative values are failures */
334 union win_slot_encoding wslot;
335 u32 resultant_state; /* In Windows terms */
336 u32 reserved;
337 } __packed;
339 struct pci_resources_assigned {
340 struct pci_message message_type;
341 union win_slot_encoding wslot;
342 u8 memory_range[0x14][6]; /* not used here */
343 u32 msi_descriptors;
344 u32 reserved[4];
345 } __packed;
347 struct pci_resources_assigned2 {
348 struct pci_message message_type;
349 union win_slot_encoding wslot;
350 u8 memory_range[0x14][6]; /* not used here */
351 u32 msi_descriptor_count;
352 u8 reserved[70];
353 } __packed;
355 struct pci_create_interrupt {
356 struct pci_message message_type;
357 union win_slot_encoding wslot;
358 struct hv_msi_desc int_desc;
359 } __packed;
361 struct pci_create_int_response {
362 struct pci_response response;
363 u32 reserved;
364 struct tran_int_desc int_desc;
365 } __packed;
367 struct pci_create_interrupt2 {
368 struct pci_message message_type;
369 union win_slot_encoding wslot;
370 struct hv_msi_desc2 int_desc;
371 } __packed;
373 struct pci_delete_interrupt {
374 struct pci_message message_type;
375 union win_slot_encoding wslot;
376 struct tran_int_desc int_desc;
377 } __packed;
379 struct pci_dev_incoming {
380 struct pci_incoming_message incoming;
381 union win_slot_encoding wslot;
382 } __packed;
384 struct pci_eject_response {
385 struct pci_message message_type;
386 union win_slot_encoding wslot;
387 u32 status;
388 } __packed;
390 static int pci_ring_size = (4 * PAGE_SIZE);
393 * Definitions or interrupt steering hypercall.
395 #define HV_PARTITION_ID_SELF ((u64)-1)
396 #define HVCALL_RETARGET_INTERRUPT 0x7e
398 struct hv_interrupt_entry {
399 u32 source; /* 1 for MSI(-X) */
400 u32 reserved1;
401 u32 address;
402 u32 data;
405 #define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */
407 struct hv_vp_set {
408 u64 format; /* 0 (HvGenericSetSparse4k) */
409 u64 valid_banks;
410 u64 masks[HV_VP_SET_BANK_COUNT_MAX];
414 * flags for hv_device_interrupt_target.flags
416 #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
417 #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
419 struct hv_device_interrupt_target {
420 u32 vector;
421 u32 flags;
422 union {
423 u64 vp_mask;
424 struct hv_vp_set vp_set;
428 struct retarget_msi_interrupt {
429 u64 partition_id; /* use "self" */
430 u64 device_id;
431 struct hv_interrupt_entry int_entry;
432 u64 reserved2;
433 struct hv_device_interrupt_target int_target;
434 } __packed;
437 * Driver specific state.
440 enum hv_pcibus_state {
441 hv_pcibus_init = 0,
442 hv_pcibus_probed,
443 hv_pcibus_installed,
444 hv_pcibus_removed,
445 hv_pcibus_maximum
448 struct hv_pcibus_device {
449 struct pci_sysdata sysdata;
450 enum hv_pcibus_state state;
451 atomic_t remove_lock;
452 struct hv_device *hdev;
453 resource_size_t low_mmio_space;
454 resource_size_t high_mmio_space;
455 struct resource *mem_config;
456 struct resource *low_mmio_res;
457 struct resource *high_mmio_res;
458 struct completion *survey_event;
459 struct completion remove_event;
460 struct pci_bus *pci_bus;
461 spinlock_t config_lock; /* Avoid two threads writing index page */
462 spinlock_t device_list_lock; /* Protect lists below */
463 void __iomem *cfg_addr;
465 struct list_head resources_for_children;
467 struct list_head children;
468 struct list_head dr_list;
470 struct msi_domain_info msi_info;
471 struct msi_controller msi_chip;
472 struct irq_domain *irq_domain;
474 /* hypercall arg, must not cross page boundary */
475 struct retarget_msi_interrupt retarget_msi_interrupt_params;
477 spinlock_t retarget_msi_interrupt_lock;
479 struct workqueue_struct *wq;
483 * Tracks "Device Relations" messages from the host, which must be both
484 * processed in order and deferred so that they don't run in the context
485 * of the incoming packet callback.
487 struct hv_dr_work {
488 struct work_struct wrk;
489 struct hv_pcibus_device *bus;
492 struct hv_dr_state {
493 struct list_head list_entry;
494 u32 device_count;
495 struct pci_function_description func[0];
498 enum hv_pcichild_state {
499 hv_pcichild_init = 0,
500 hv_pcichild_requirements,
501 hv_pcichild_resourced,
502 hv_pcichild_ejecting,
503 hv_pcichild_maximum
506 enum hv_pcidev_ref_reason {
507 hv_pcidev_ref_invalid = 0,
508 hv_pcidev_ref_initial,
509 hv_pcidev_ref_by_slot,
510 hv_pcidev_ref_packet,
511 hv_pcidev_ref_pnp,
512 hv_pcidev_ref_childlist,
513 hv_pcidev_irqdata,
514 hv_pcidev_ref_max
517 struct hv_pci_dev {
518 /* List protected by pci_rescan_remove_lock */
519 struct list_head list_entry;
520 refcount_t refs;
521 enum hv_pcichild_state state;
522 struct pci_slot *pci_slot;
523 struct pci_function_description desc;
524 bool reported_missing;
525 struct hv_pcibus_device *hbus;
526 struct work_struct wrk;
529 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
530 * read it back, for each of the BAR offsets within config space.
532 u32 probed_bar[6];
535 struct hv_pci_compl {
536 struct completion host_event;
537 s32 completion_status;
540 static void hv_pci_onchannelcallback(void *context);
543 * hv_pci_generic_compl() - Invoked for a completion packet
544 * @context: Set up by the sender of the packet.
545 * @resp: The response packet
546 * @resp_packet_size: Size in bytes of the packet
548 * This function is used to trigger an event and report status
549 * for any message for which the completion packet contains a
550 * status and nothing else.
552 static void hv_pci_generic_compl(void *context, struct pci_response *resp,
553 int resp_packet_size)
555 struct hv_pci_compl *comp_pkt = context;
557 if (resp_packet_size >= offsetofend(struct pci_response, status))
558 comp_pkt->completion_status = resp->status;
559 else
560 comp_pkt->completion_status = -1;
562 complete(&comp_pkt->host_event);
565 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
566 u32 wslot);
567 static void get_pcichild(struct hv_pci_dev *hv_pcidev,
568 enum hv_pcidev_ref_reason reason);
569 static void put_pcichild(struct hv_pci_dev *hv_pcidev,
570 enum hv_pcidev_ref_reason reason);
572 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
573 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
576 * There is no good way to get notified from vmbus_onoffer_rescind(),
577 * so let's use polling here, since this is not a hot path.
579 static int wait_for_response(struct hv_device *hdev,
580 struct completion *comp)
582 while (true) {
583 if (hdev->channel->rescind) {
584 dev_warn_once(&hdev->device, "The device is gone.\n");
585 return -ENODEV;
588 if (wait_for_completion_timeout(comp, HZ / 10))
589 break;
592 return 0;
596 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
597 * @devfn: The Linux representation of PCI slot
599 * Windows uses a slightly different representation of PCI slot.
601 * Return: The Windows representation
603 static u32 devfn_to_wslot(int devfn)
605 union win_slot_encoding wslot;
607 wslot.slot = 0;
608 wslot.bits.dev = PCI_SLOT(devfn);
609 wslot.bits.func = PCI_FUNC(devfn);
611 return wslot.slot;
615 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
616 * @wslot: The Windows representation of PCI slot
618 * Windows uses a slightly different representation of PCI slot.
620 * Return: The Linux representation
622 static int wslot_to_devfn(u32 wslot)
624 union win_slot_encoding slot_no;
626 slot_no.slot = wslot;
627 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
631 * PCI Configuration Space for these root PCI buses is implemented as a pair
632 * of pages in memory-mapped I/O space. Writing to the first page chooses
633 * the PCI function being written or read. Once the first page has been
634 * written to, the following page maps in the entire configuration space of
635 * the function.
639 * _hv_pcifront_read_config() - Internal PCI config read
640 * @hpdev: The PCI driver's representation of the device
641 * @where: Offset within config space
642 * @size: Size of the transfer
643 * @val: Pointer to the buffer receiving the data
645 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
646 int size, u32 *val)
648 unsigned long flags;
649 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
652 * If the attempt is to read the IDs or the ROM BAR, simulate that.
654 if (where + size <= PCI_COMMAND) {
655 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
656 } else if (where >= PCI_CLASS_REVISION && where + size <=
657 PCI_CACHE_LINE_SIZE) {
658 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
659 PCI_CLASS_REVISION, size);
660 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
661 PCI_ROM_ADDRESS) {
662 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
663 PCI_SUBSYSTEM_VENDOR_ID, size);
664 } else if (where >= PCI_ROM_ADDRESS && where + size <=
665 PCI_CAPABILITY_LIST) {
666 /* ROM BARs are unimplemented */
667 *val = 0;
668 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
669 PCI_INTERRUPT_PIN) {
671 * Interrupt Line and Interrupt PIN are hard-wired to zero
672 * because this front-end only supports message-signaled
673 * interrupts.
675 *val = 0;
676 } else if (where + size <= CFG_PAGE_SIZE) {
677 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
678 /* Choose the function to be read. (See comment above) */
679 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
680 /* Make sure the function was chosen before we start reading. */
681 mb();
682 /* Read from that function's config space. */
683 switch (size) {
684 case 1:
685 *val = readb(addr);
686 break;
687 case 2:
688 *val = readw(addr);
689 break;
690 default:
691 *val = readl(addr);
692 break;
695 * Make sure the write was done before we release the spinlock
696 * allowing consecutive reads/writes.
698 mb();
699 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
700 } else {
701 dev_err(&hpdev->hbus->hdev->device,
702 "Attempt to read beyond a function's config space.\n");
706 static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
708 u16 ret;
709 unsigned long flags;
710 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
711 PCI_VENDOR_ID;
713 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
715 /* Choose the function to be read. (See comment above) */
716 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
717 /* Make sure the function was chosen before we start reading. */
718 mb();
719 /* Read from that function's config space. */
720 ret = readw(addr);
722 * mb() is not required here, because the spin_unlock_irqrestore()
723 * is a barrier.
726 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
728 return ret;
732 * _hv_pcifront_write_config() - Internal PCI config write
733 * @hpdev: The PCI driver's representation of the device
734 * @where: Offset within config space
735 * @size: Size of the transfer
736 * @val: The data being transferred
738 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
739 int size, u32 val)
741 unsigned long flags;
742 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
744 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
745 where + size <= PCI_CAPABILITY_LIST) {
746 /* SSIDs and ROM BARs are read-only */
747 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
748 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
749 /* Choose the function to be written. (See comment above) */
750 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
751 /* Make sure the function was chosen before we start writing. */
752 wmb();
753 /* Write to that function's config space. */
754 switch (size) {
755 case 1:
756 writeb(val, addr);
757 break;
758 case 2:
759 writew(val, addr);
760 break;
761 default:
762 writel(val, addr);
763 break;
766 * Make sure the write was done before we release the spinlock
767 * allowing consecutive reads/writes.
769 mb();
770 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
771 } else {
772 dev_err(&hpdev->hbus->hdev->device,
773 "Attempt to write beyond a function's config space.\n");
778 * hv_pcifront_read_config() - Read configuration space
779 * @bus: PCI Bus structure
780 * @devfn: Device/function
781 * @where: Offset from base
782 * @size: Byte/word/dword
783 * @val: Value to be read
785 * Return: PCIBIOS_SUCCESSFUL on success
786 * PCIBIOS_DEVICE_NOT_FOUND on failure
788 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
789 int where, int size, u32 *val)
791 struct hv_pcibus_device *hbus =
792 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
793 struct hv_pci_dev *hpdev;
795 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
796 if (!hpdev)
797 return PCIBIOS_DEVICE_NOT_FOUND;
799 _hv_pcifront_read_config(hpdev, where, size, val);
801 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
802 return PCIBIOS_SUCCESSFUL;
806 * hv_pcifront_write_config() - Write configuration space
807 * @bus: PCI Bus structure
808 * @devfn: Device/function
809 * @where: Offset from base
810 * @size: Byte/word/dword
811 * @val: Value to be written to device
813 * Return: PCIBIOS_SUCCESSFUL on success
814 * PCIBIOS_DEVICE_NOT_FOUND on failure
816 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
817 int where, int size, u32 val)
819 struct hv_pcibus_device *hbus =
820 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
821 struct hv_pci_dev *hpdev;
823 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
824 if (!hpdev)
825 return PCIBIOS_DEVICE_NOT_FOUND;
827 _hv_pcifront_write_config(hpdev, where, size, val);
829 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
830 return PCIBIOS_SUCCESSFUL;
833 /* PCIe operations */
834 static struct pci_ops hv_pcifront_ops = {
835 .read = hv_pcifront_read_config,
836 .write = hv_pcifront_write_config,
839 /* Interrupt management hooks */
840 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
841 struct tran_int_desc *int_desc)
843 struct pci_delete_interrupt *int_pkt;
844 struct {
845 struct pci_packet pkt;
846 u8 buffer[sizeof(struct pci_delete_interrupt)];
847 } ctxt;
849 memset(&ctxt, 0, sizeof(ctxt));
850 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
851 int_pkt->message_type.type =
852 PCI_DELETE_INTERRUPT_MESSAGE;
853 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
854 int_pkt->int_desc = *int_desc;
855 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
856 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
857 kfree(int_desc);
861 * hv_msi_free() - Free the MSI.
862 * @domain: The interrupt domain pointer
863 * @info: Extra MSI-related context
864 * @irq: Identifies the IRQ.
866 * The Hyper-V parent partition and hypervisor are tracking the
867 * messages that are in use, keeping the interrupt redirection
868 * table up to date. This callback sends a message that frees
869 * the IRT entry and related tracking nonsense.
871 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
872 unsigned int irq)
874 struct hv_pcibus_device *hbus;
875 struct hv_pci_dev *hpdev;
876 struct pci_dev *pdev;
877 struct tran_int_desc *int_desc;
878 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
879 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
881 pdev = msi_desc_to_pci_dev(msi);
882 hbus = info->data;
883 int_desc = irq_data_get_irq_chip_data(irq_data);
884 if (!int_desc)
885 return;
887 irq_data->chip_data = NULL;
888 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
889 if (!hpdev) {
890 kfree(int_desc);
891 return;
894 hv_int_desc_free(hpdev, int_desc);
895 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
898 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
899 bool force)
901 struct irq_data *parent = data->parent_data;
903 return parent->chip->irq_set_affinity(parent, dest, force);
906 static void hv_irq_mask(struct irq_data *data)
908 pci_msi_mask_irq(data);
912 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
913 * affinity.
914 * @data: Describes the IRQ
916 * Build new a destination for the MSI and make a hypercall to
917 * update the Interrupt Redirection Table. "Device Logical ID"
918 * is built out of this PCI bus's instance GUID and the function
919 * number of the device.
921 static void hv_irq_unmask(struct irq_data *data)
923 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
924 struct irq_cfg *cfg = irqd_cfg(data);
925 struct retarget_msi_interrupt *params;
926 struct hv_pcibus_device *hbus;
927 struct cpumask *dest;
928 struct pci_bus *pbus;
929 struct pci_dev *pdev;
930 unsigned long flags;
931 u32 var_size = 0;
932 int cpu_vmbus;
933 int cpu;
934 u64 res;
936 dest = irq_data_get_effective_affinity_mask(data);
937 pdev = msi_desc_to_pci_dev(msi_desc);
938 pbus = pdev->bus;
939 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
941 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
943 params = &hbus->retarget_msi_interrupt_params;
944 memset(params, 0, sizeof(*params));
945 params->partition_id = HV_PARTITION_ID_SELF;
946 params->int_entry.source = 1; /* MSI(-X) */
947 params->int_entry.address = msi_desc->msg.address_lo;
948 params->int_entry.data = msi_desc->msg.data;
949 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
950 (hbus->hdev->dev_instance.b[4] << 16) |
951 (hbus->hdev->dev_instance.b[7] << 8) |
952 (hbus->hdev->dev_instance.b[6] & 0xf8) |
953 PCI_FUNC(pdev->devfn);
954 params->int_target.vector = cfg->vector;
957 * Honoring apic->irq_delivery_mode set to dest_Fixed by
958 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
959 * spurious interrupt storm. Not doing so does not seem to have a
960 * negative effect (yet?).
963 if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
965 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
966 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
967 * with >64 VP support.
968 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
969 * is not sufficient for this hypercall.
971 params->int_target.flags |=
972 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
973 params->int_target.vp_set.valid_banks =
974 (1ull << HV_VP_SET_BANK_COUNT_MAX) - 1;
977 * var-sized hypercall, var-size starts after vp_mask (thus
978 * vp_set.format does not count, but vp_set.valid_banks does).
980 var_size = 1 + HV_VP_SET_BANK_COUNT_MAX;
982 for_each_cpu_and(cpu, dest, cpu_online_mask) {
983 cpu_vmbus = hv_cpu_number_to_vp_number(cpu);
985 if (cpu_vmbus >= HV_VP_SET_BANK_COUNT_MAX * 64) {
986 dev_err(&hbus->hdev->device,
987 "too high CPU %d", cpu_vmbus);
988 res = 1;
989 goto exit_unlock;
992 params->int_target.vp_set.masks[cpu_vmbus / 64] |=
993 (1ULL << (cpu_vmbus & 63));
995 } else {
996 for_each_cpu_and(cpu, dest, cpu_online_mask) {
997 params->int_target.vp_mask |=
998 (1ULL << hv_cpu_number_to_vp_number(cpu));
1002 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1003 params, NULL);
1005 exit_unlock:
1006 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1008 if (res) {
1009 dev_err(&hbus->hdev->device,
1010 "%s() failed: %#llx", __func__, res);
1011 return;
1014 pci_msi_unmask_irq(data);
1017 struct compose_comp_ctxt {
1018 struct hv_pci_compl comp_pkt;
1019 struct tran_int_desc int_desc;
1022 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1023 int resp_packet_size)
1025 struct compose_comp_ctxt *comp_pkt = context;
1026 struct pci_create_int_response *int_resp =
1027 (struct pci_create_int_response *)resp;
1029 comp_pkt->comp_pkt.completion_status = resp->status;
1030 comp_pkt->int_desc = int_resp->int_desc;
1031 complete(&comp_pkt->comp_pkt.host_event);
1034 static u32 hv_compose_msi_req_v1(
1035 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1036 u32 slot, u8 vector)
1038 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1039 int_pkt->wslot.slot = slot;
1040 int_pkt->int_desc.vector = vector;
1041 int_pkt->int_desc.vector_count = 1;
1042 int_pkt->int_desc.delivery_mode =
1043 (apic->irq_delivery_mode == dest_LowestPrio) ?
1044 dest_LowestPrio : dest_Fixed;
1047 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1048 * hv_irq_unmask().
1050 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1052 return sizeof(*int_pkt);
1055 static u32 hv_compose_msi_req_v2(
1056 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1057 u32 slot, u8 vector)
1059 int cpu;
1061 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1062 int_pkt->wslot.slot = slot;
1063 int_pkt->int_desc.vector = vector;
1064 int_pkt->int_desc.vector_count = 1;
1065 int_pkt->int_desc.delivery_mode =
1066 (apic->irq_delivery_mode == dest_LowestPrio) ?
1067 dest_LowestPrio : dest_Fixed;
1070 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1071 * by subsequent retarget in hv_irq_unmask().
1073 cpu = cpumask_first_and(affinity, cpu_online_mask);
1074 int_pkt->int_desc.processor_array[0] =
1075 hv_cpu_number_to_vp_number(cpu);
1076 int_pkt->int_desc.processor_count = 1;
1078 return sizeof(*int_pkt);
1082 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1083 * @data: Everything about this MSI
1084 * @msg: Buffer that is filled in by this function
1086 * This function unpacks the IRQ looking for target CPU set, IDT
1087 * vector and mode and sends a message to the parent partition
1088 * asking for a mapping for that tuple in this partition. The
1089 * response supplies a data value and address to which that data
1090 * should be written to trigger that interrupt.
1092 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1094 struct irq_cfg *cfg = irqd_cfg(data);
1095 struct hv_pcibus_device *hbus;
1096 struct hv_pci_dev *hpdev;
1097 struct pci_bus *pbus;
1098 struct pci_dev *pdev;
1099 struct cpumask *dest;
1100 unsigned long flags;
1101 struct compose_comp_ctxt comp;
1102 struct tran_int_desc *int_desc;
1103 struct {
1104 struct pci_packet pci_pkt;
1105 union {
1106 struct pci_create_interrupt v1;
1107 struct pci_create_interrupt2 v2;
1108 } int_pkts;
1109 } __packed ctxt;
1111 u32 size;
1112 int ret;
1114 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1115 dest = irq_data_get_effective_affinity_mask(data);
1116 pbus = pdev->bus;
1117 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1118 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1119 if (!hpdev)
1120 goto return_null_message;
1122 /* Free any previous message that might have already been composed. */
1123 if (data->chip_data) {
1124 int_desc = data->chip_data;
1125 data->chip_data = NULL;
1126 hv_int_desc_free(hpdev, int_desc);
1129 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1130 if (!int_desc)
1131 goto drop_reference;
1133 memset(&ctxt, 0, sizeof(ctxt));
1134 init_completion(&comp.comp_pkt.host_event);
1135 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1136 ctxt.pci_pkt.compl_ctxt = &comp;
1138 switch (pci_protocol_version) {
1139 case PCI_PROTOCOL_VERSION_1_1:
1140 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1141 dest,
1142 hpdev->desc.win_slot.slot,
1143 cfg->vector);
1144 break;
1146 case PCI_PROTOCOL_VERSION_1_2:
1147 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1148 dest,
1149 hpdev->desc.win_slot.slot,
1150 cfg->vector);
1151 break;
1153 default:
1154 /* As we only negotiate protocol versions known to this driver,
1155 * this path should never hit. However, this is it not a hot
1156 * path so we print a message to aid future updates.
1158 dev_err(&hbus->hdev->device,
1159 "Unexpected vPCI protocol, update driver.");
1160 goto free_int_desc;
1163 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1164 size, (unsigned long)&ctxt.pci_pkt,
1165 VM_PKT_DATA_INBAND,
1166 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1167 if (ret) {
1168 dev_err(&hbus->hdev->device,
1169 "Sending request for interrupt failed: 0x%x",
1170 comp.comp_pkt.completion_status);
1171 goto free_int_desc;
1175 * Since this function is called with IRQ locks held, can't
1176 * do normal wait for completion; instead poll.
1178 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1179 /* 0xFFFF means an invalid PCI VENDOR ID. */
1180 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1181 dev_err_once(&hbus->hdev->device,
1182 "the device has gone\n");
1183 goto free_int_desc;
1187 * When the higher level interrupt code calls us with
1188 * interrupt disabled, we must poll the channel by calling
1189 * the channel callback directly when channel->target_cpu is
1190 * the current CPU. When the higher level interrupt code
1191 * calls us with interrupt enabled, let's add the
1192 * local_irq_save()/restore() to avoid race:
1193 * hv_pci_onchannelcallback() can also run in tasklet.
1195 local_irq_save(flags);
1197 if (hbus->hdev->channel->target_cpu == smp_processor_id())
1198 hv_pci_onchannelcallback(hbus);
1200 local_irq_restore(flags);
1202 if (hpdev->state == hv_pcichild_ejecting) {
1203 dev_err_once(&hbus->hdev->device,
1204 "the device is being ejected\n");
1205 goto free_int_desc;
1208 udelay(100);
1211 if (comp.comp_pkt.completion_status < 0) {
1212 dev_err(&hbus->hdev->device,
1213 "Request for interrupt failed: 0x%x",
1214 comp.comp_pkt.completion_status);
1215 goto free_int_desc;
1219 * Record the assignment so that this can be unwound later. Using
1220 * irq_set_chip_data() here would be appropriate, but the lock it takes
1221 * is already held.
1223 *int_desc = comp.int_desc;
1224 data->chip_data = int_desc;
1226 /* Pass up the result. */
1227 msg->address_hi = comp.int_desc.address >> 32;
1228 msg->address_lo = comp.int_desc.address & 0xffffffff;
1229 msg->data = comp.int_desc.data;
1231 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
1232 return;
1234 free_int_desc:
1235 kfree(int_desc);
1236 drop_reference:
1237 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
1238 return_null_message:
1239 msg->address_hi = 0;
1240 msg->address_lo = 0;
1241 msg->data = 0;
1244 /* HW Interrupt Chip Descriptor */
1245 static struct irq_chip hv_msi_irq_chip = {
1246 .name = "Hyper-V PCIe MSI",
1247 .irq_compose_msi_msg = hv_compose_msi_msg,
1248 .irq_set_affinity = hv_set_affinity,
1249 .irq_ack = irq_chip_ack_parent,
1250 .irq_mask = hv_irq_mask,
1251 .irq_unmask = hv_irq_unmask,
1254 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1255 msi_alloc_info_t *arg)
1257 return arg->msi_hwirq;
1260 static struct msi_domain_ops hv_msi_ops = {
1261 .get_hwirq = hv_msi_domain_ops_get_hwirq,
1262 .msi_prepare = pci_msi_prepare,
1263 .set_desc = pci_msi_set_desc,
1264 .msi_free = hv_msi_free,
1268 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1269 * @hbus: The root PCI bus
1271 * This function creates an IRQ domain which will be used for
1272 * interrupts from devices that have been passed through. These
1273 * devices only support MSI and MSI-X, not line-based interrupts
1274 * or simulations of line-based interrupts through PCIe's
1275 * fabric-layer messages. Because interrupts are remapped, we
1276 * can support multi-message MSI here.
1278 * Return: '0' on success and error value on failure
1280 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1282 hbus->msi_info.chip = &hv_msi_irq_chip;
1283 hbus->msi_info.ops = &hv_msi_ops;
1284 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1285 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1286 MSI_FLAG_PCI_MSIX);
1287 hbus->msi_info.handler = handle_edge_irq;
1288 hbus->msi_info.handler_name = "edge";
1289 hbus->msi_info.data = hbus;
1290 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1291 &hbus->msi_info,
1292 x86_vector_domain);
1293 if (!hbus->irq_domain) {
1294 dev_err(&hbus->hdev->device,
1295 "Failed to build an MSI IRQ domain\n");
1296 return -ENODEV;
1299 return 0;
1303 * get_bar_size() - Get the address space consumed by a BAR
1304 * @bar_val: Value that a BAR returned after -1 was written
1305 * to it.
1307 * This function returns the size of the BAR, rounded up to 1
1308 * page. It has to be rounded up because the hypervisor's page
1309 * table entry that maps the BAR into the VM can't specify an
1310 * offset within a page. The invariant is that the hypervisor
1311 * must place any BARs of smaller than page length at the
1312 * beginning of a page.
1314 * Return: Size in bytes of the consumed MMIO space.
1316 static u64 get_bar_size(u64 bar_val)
1318 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1319 PAGE_SIZE);
1323 * survey_child_resources() - Total all MMIO requirements
1324 * @hbus: Root PCI bus, as understood by this driver
1326 static void survey_child_resources(struct hv_pcibus_device *hbus)
1328 struct list_head *iter;
1329 struct hv_pci_dev *hpdev;
1330 resource_size_t bar_size = 0;
1331 unsigned long flags;
1332 struct completion *event;
1333 u64 bar_val;
1334 int i;
1336 /* If nobody is waiting on the answer, don't compute it. */
1337 event = xchg(&hbus->survey_event, NULL);
1338 if (!event)
1339 return;
1341 /* If the answer has already been computed, go with it. */
1342 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1343 complete(event);
1344 return;
1347 spin_lock_irqsave(&hbus->device_list_lock, flags);
1350 * Due to an interesting quirk of the PCI spec, all memory regions
1351 * for a child device are a power of 2 in size and aligned in memory,
1352 * so it's sufficient to just add them up without tracking alignment.
1354 list_for_each(iter, &hbus->children) {
1355 hpdev = container_of(iter, struct hv_pci_dev, list_entry);
1356 for (i = 0; i < 6; i++) {
1357 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1358 dev_err(&hbus->hdev->device,
1359 "There's an I/O BAR in this list!\n");
1361 if (hpdev->probed_bar[i] != 0) {
1363 * A probed BAR has all the upper bits set that
1364 * can be changed.
1367 bar_val = hpdev->probed_bar[i];
1368 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1369 bar_val |=
1370 ((u64)hpdev->probed_bar[++i] << 32);
1371 else
1372 bar_val |= 0xffffffff00000000ULL;
1374 bar_size = get_bar_size(bar_val);
1376 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1377 hbus->high_mmio_space += bar_size;
1378 else
1379 hbus->low_mmio_space += bar_size;
1384 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1385 complete(event);
1389 * prepopulate_bars() - Fill in BARs with defaults
1390 * @hbus: Root PCI bus, as understood by this driver
1392 * The core PCI driver code seems much, much happier if the BARs
1393 * for a device have values upon first scan. So fill them in.
1394 * The algorithm below works down from large sizes to small,
1395 * attempting to pack the assignments optimally. The assumption,
1396 * enforced in other parts of the code, is that the beginning of
1397 * the memory-mapped I/O space will be aligned on the largest
1398 * BAR size.
1400 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1402 resource_size_t high_size = 0;
1403 resource_size_t low_size = 0;
1404 resource_size_t high_base = 0;
1405 resource_size_t low_base = 0;
1406 resource_size_t bar_size;
1407 struct hv_pci_dev *hpdev;
1408 struct list_head *iter;
1409 unsigned long flags;
1410 u64 bar_val;
1411 u32 command;
1412 bool high;
1413 int i;
1415 if (hbus->low_mmio_space) {
1416 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1417 low_base = hbus->low_mmio_res->start;
1420 if (hbus->high_mmio_space) {
1421 high_size = 1ULL <<
1422 (63 - __builtin_clzll(hbus->high_mmio_space));
1423 high_base = hbus->high_mmio_res->start;
1426 spin_lock_irqsave(&hbus->device_list_lock, flags);
1428 /* Pick addresses for the BARs. */
1429 do {
1430 list_for_each(iter, &hbus->children) {
1431 hpdev = container_of(iter, struct hv_pci_dev,
1432 list_entry);
1433 for (i = 0; i < 6; i++) {
1434 bar_val = hpdev->probed_bar[i];
1435 if (bar_val == 0)
1436 continue;
1437 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1438 if (high) {
1439 bar_val |=
1440 ((u64)hpdev->probed_bar[i + 1]
1441 << 32);
1442 } else {
1443 bar_val |= 0xffffffffULL << 32;
1445 bar_size = get_bar_size(bar_val);
1446 if (high) {
1447 if (high_size != bar_size) {
1448 i++;
1449 continue;
1451 _hv_pcifront_write_config(hpdev,
1452 PCI_BASE_ADDRESS_0 + (4 * i),
1454 (u32)(high_base & 0xffffff00));
1455 i++;
1456 _hv_pcifront_write_config(hpdev,
1457 PCI_BASE_ADDRESS_0 + (4 * i),
1458 4, (u32)(high_base >> 32));
1459 high_base += bar_size;
1460 } else {
1461 if (low_size != bar_size)
1462 continue;
1463 _hv_pcifront_write_config(hpdev,
1464 PCI_BASE_ADDRESS_0 + (4 * i),
1466 (u32)(low_base & 0xffffff00));
1467 low_base += bar_size;
1470 if (high_size <= 1 && low_size <= 1) {
1471 /* Set the memory enable bit. */
1472 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1473 &command);
1474 command |= PCI_COMMAND_MEMORY;
1475 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1476 command);
1477 break;
1481 high_size >>= 1;
1482 low_size >>= 1;
1483 } while (high_size || low_size);
1485 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1489 * Assign entries in sysfs pci slot directory.
1491 * Note that this function does not need to lock the children list
1492 * because it is called from pci_devices_present_work which
1493 * is serialized with hv_eject_device_work because they are on the
1494 * same ordered workqueue. Therefore hbus->children list will not change
1495 * even when pci_create_slot sleeps.
1497 static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1499 struct hv_pci_dev *hpdev;
1500 char name[SLOT_NAME_SIZE];
1501 int slot_nr;
1503 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1504 if (hpdev->pci_slot)
1505 continue;
1507 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1508 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1509 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1510 name, NULL);
1511 if (!hpdev->pci_slot)
1512 pr_warn("pci_create slot %s failed\n", name);
1517 * create_root_hv_pci_bus() - Expose a new root PCI bus
1518 * @hbus: Root PCI bus, as understood by this driver
1520 * Return: 0 on success, -errno on failure
1522 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1524 /* Register the device */
1525 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1526 0, /* bus number is always zero */
1527 &hv_pcifront_ops,
1528 &hbus->sysdata,
1529 &hbus->resources_for_children);
1530 if (!hbus->pci_bus)
1531 return -ENODEV;
1533 hbus->pci_bus->msi = &hbus->msi_chip;
1534 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1536 pci_lock_rescan_remove();
1537 pci_scan_child_bus(hbus->pci_bus);
1538 pci_bus_assign_resources(hbus->pci_bus);
1539 hv_pci_assign_slots(hbus);
1540 pci_bus_add_devices(hbus->pci_bus);
1541 pci_unlock_rescan_remove();
1542 hbus->state = hv_pcibus_installed;
1543 return 0;
1546 struct q_res_req_compl {
1547 struct completion host_event;
1548 struct hv_pci_dev *hpdev;
1552 * q_resource_requirements() - Query Resource Requirements
1553 * @context: The completion context.
1554 * @resp: The response that came from the host.
1555 * @resp_packet_size: The size in bytes of resp.
1557 * This function is invoked on completion of a Query Resource
1558 * Requirements packet.
1560 static void q_resource_requirements(void *context, struct pci_response *resp,
1561 int resp_packet_size)
1563 struct q_res_req_compl *completion = context;
1564 struct pci_q_res_req_response *q_res_req =
1565 (struct pci_q_res_req_response *)resp;
1566 int i;
1568 if (resp->status < 0) {
1569 dev_err(&completion->hpdev->hbus->hdev->device,
1570 "query resource requirements failed: %x\n",
1571 resp->status);
1572 } else {
1573 for (i = 0; i < 6; i++) {
1574 completion->hpdev->probed_bar[i] =
1575 q_res_req->probed_bar[i];
1579 complete(&completion->host_event);
1582 static void get_pcichild(struct hv_pci_dev *hpdev,
1583 enum hv_pcidev_ref_reason reason)
1585 refcount_inc(&hpdev->refs);
1588 static void put_pcichild(struct hv_pci_dev *hpdev,
1589 enum hv_pcidev_ref_reason reason)
1591 if (refcount_dec_and_test(&hpdev->refs))
1592 kfree(hpdev);
1596 * new_pcichild_device() - Create a new child device
1597 * @hbus: The internal struct tracking this root PCI bus.
1598 * @desc: The information supplied so far from the host
1599 * about the device.
1601 * This function creates the tracking structure for a new child
1602 * device and kicks off the process of figuring out what it is.
1604 * Return: Pointer to the new tracking struct
1606 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1607 struct pci_function_description *desc)
1609 struct hv_pci_dev *hpdev;
1610 struct pci_child_message *res_req;
1611 struct q_res_req_compl comp_pkt;
1612 struct {
1613 struct pci_packet init_packet;
1614 u8 buffer[sizeof(struct pci_child_message)];
1615 } pkt;
1616 unsigned long flags;
1617 int ret;
1619 hpdev = kzalloc(sizeof(*hpdev), GFP_ATOMIC);
1620 if (!hpdev)
1621 return NULL;
1623 hpdev->hbus = hbus;
1625 memset(&pkt, 0, sizeof(pkt));
1626 init_completion(&comp_pkt.host_event);
1627 comp_pkt.hpdev = hpdev;
1628 pkt.init_packet.compl_ctxt = &comp_pkt;
1629 pkt.init_packet.completion_func = q_resource_requirements;
1630 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1631 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1632 res_req->wslot.slot = desc->win_slot.slot;
1634 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1635 sizeof(struct pci_child_message),
1636 (unsigned long)&pkt.init_packet,
1637 VM_PKT_DATA_INBAND,
1638 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1639 if (ret)
1640 goto error;
1642 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1643 goto error;
1645 hpdev->desc = *desc;
1646 refcount_set(&hpdev->refs, 1);
1647 get_pcichild(hpdev, hv_pcidev_ref_childlist);
1648 spin_lock_irqsave(&hbus->device_list_lock, flags);
1650 list_add_tail(&hpdev->list_entry, &hbus->children);
1651 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1652 return hpdev;
1654 error:
1655 kfree(hpdev);
1656 return NULL;
1660 * get_pcichild_wslot() - Find device from slot
1661 * @hbus: Root PCI bus, as understood by this driver
1662 * @wslot: Location on the bus
1664 * This function looks up a PCI device and returns the internal
1665 * representation of it. It acquires a reference on it, so that
1666 * the device won't be deleted while somebody is using it. The
1667 * caller is responsible for calling put_pcichild() to release
1668 * this reference.
1670 * Return: Internal representation of a PCI device
1672 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1673 u32 wslot)
1675 unsigned long flags;
1676 struct hv_pci_dev *iter, *hpdev = NULL;
1678 spin_lock_irqsave(&hbus->device_list_lock, flags);
1679 list_for_each_entry(iter, &hbus->children, list_entry) {
1680 if (iter->desc.win_slot.slot == wslot) {
1681 hpdev = iter;
1682 get_pcichild(hpdev, hv_pcidev_ref_by_slot);
1683 break;
1686 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1688 return hpdev;
1692 * pci_devices_present_work() - Handle new list of child devices
1693 * @work: Work struct embedded in struct hv_dr_work
1695 * "Bus Relations" is the Windows term for "children of this
1696 * bus." The terminology is preserved here for people trying to
1697 * debug the interaction between Hyper-V and Linux. This
1698 * function is called when the parent partition reports a list
1699 * of functions that should be observed under this PCI Express
1700 * port (bus).
1702 * This function updates the list, and must tolerate being
1703 * called multiple times with the same information. The typical
1704 * number of child devices is one, with very atypical cases
1705 * involving three or four, so the algorithms used here can be
1706 * simple and inefficient.
1708 * It must also treat the omission of a previously observed device as
1709 * notification that the device no longer exists.
1711 * Note that this function is serialized with hv_eject_device_work(),
1712 * because both are pushed to the ordered workqueue hbus->wq.
1714 static void pci_devices_present_work(struct work_struct *work)
1716 u32 child_no;
1717 bool found;
1718 struct list_head *iter;
1719 struct pci_function_description *new_desc;
1720 struct hv_pci_dev *hpdev;
1721 struct hv_pcibus_device *hbus;
1722 struct list_head removed;
1723 struct hv_dr_work *dr_wrk;
1724 struct hv_dr_state *dr = NULL;
1725 unsigned long flags;
1727 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1728 hbus = dr_wrk->bus;
1729 kfree(dr_wrk);
1731 INIT_LIST_HEAD(&removed);
1733 /* Pull this off the queue and process it if it was the last one. */
1734 spin_lock_irqsave(&hbus->device_list_lock, flags);
1735 while (!list_empty(&hbus->dr_list)) {
1736 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1737 list_entry);
1738 list_del(&dr->list_entry);
1740 /* Throw this away if the list still has stuff in it. */
1741 if (!list_empty(&hbus->dr_list)) {
1742 kfree(dr);
1743 continue;
1746 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1748 if (!dr) {
1749 put_hvpcibus(hbus);
1750 return;
1753 /* First, mark all existing children as reported missing. */
1754 spin_lock_irqsave(&hbus->device_list_lock, flags);
1755 list_for_each(iter, &hbus->children) {
1756 hpdev = container_of(iter, struct hv_pci_dev,
1757 list_entry);
1758 hpdev->reported_missing = true;
1760 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1762 /* Next, add back any reported devices. */
1763 for (child_no = 0; child_no < dr->device_count; child_no++) {
1764 found = false;
1765 new_desc = &dr->func[child_no];
1767 spin_lock_irqsave(&hbus->device_list_lock, flags);
1768 list_for_each(iter, &hbus->children) {
1769 hpdev = container_of(iter, struct hv_pci_dev,
1770 list_entry);
1771 if ((hpdev->desc.win_slot.slot ==
1772 new_desc->win_slot.slot) &&
1773 (hpdev->desc.v_id == new_desc->v_id) &&
1774 (hpdev->desc.d_id == new_desc->d_id) &&
1775 (hpdev->desc.ser == new_desc->ser)) {
1776 hpdev->reported_missing = false;
1777 found = true;
1780 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1782 if (!found) {
1783 hpdev = new_pcichild_device(hbus, new_desc);
1784 if (!hpdev)
1785 dev_err(&hbus->hdev->device,
1786 "couldn't record a child device.\n");
1790 /* Move missing children to a list on the stack. */
1791 spin_lock_irqsave(&hbus->device_list_lock, flags);
1792 do {
1793 found = false;
1794 list_for_each(iter, &hbus->children) {
1795 hpdev = container_of(iter, struct hv_pci_dev,
1796 list_entry);
1797 if (hpdev->reported_missing) {
1798 found = true;
1799 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1800 list_move_tail(&hpdev->list_entry, &removed);
1801 break;
1804 } while (found);
1805 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1807 /* Delete everything that should no longer exist. */
1808 while (!list_empty(&removed)) {
1809 hpdev = list_first_entry(&removed, struct hv_pci_dev,
1810 list_entry);
1811 list_del(&hpdev->list_entry);
1812 put_pcichild(hpdev, hv_pcidev_ref_initial);
1815 switch (hbus->state) {
1816 case hv_pcibus_installed:
1818 * Tell the core to rescan bus
1819 * because there may have been changes.
1821 pci_lock_rescan_remove();
1822 pci_scan_child_bus(hbus->pci_bus);
1823 hv_pci_assign_slots(hbus);
1824 pci_unlock_rescan_remove();
1825 break;
1827 case hv_pcibus_init:
1828 case hv_pcibus_probed:
1829 survey_child_resources(hbus);
1830 break;
1832 default:
1833 break;
1836 put_hvpcibus(hbus);
1837 kfree(dr);
1841 * hv_pci_devices_present() - Handles list of new children
1842 * @hbus: Root PCI bus, as understood by this driver
1843 * @relations: Packet from host listing children
1845 * This function is invoked whenever a new list of devices for
1846 * this bus appears.
1848 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
1849 struct pci_bus_relations *relations)
1851 struct hv_dr_state *dr;
1852 struct hv_dr_work *dr_wrk;
1853 unsigned long flags;
1855 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
1856 if (!dr_wrk)
1857 return;
1859 dr = kzalloc(offsetof(struct hv_dr_state, func) +
1860 (sizeof(struct pci_function_description) *
1861 (relations->device_count)), GFP_NOWAIT);
1862 if (!dr) {
1863 kfree(dr_wrk);
1864 return;
1867 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
1868 dr_wrk->bus = hbus;
1869 dr->device_count = relations->device_count;
1870 if (dr->device_count != 0) {
1871 memcpy(dr->func, relations->func,
1872 sizeof(struct pci_function_description) *
1873 dr->device_count);
1876 spin_lock_irqsave(&hbus->device_list_lock, flags);
1877 list_add_tail(&dr->list_entry, &hbus->dr_list);
1878 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1880 get_hvpcibus(hbus);
1881 queue_work(hbus->wq, &dr_wrk->wrk);
1885 * hv_eject_device_work() - Asynchronously handles ejection
1886 * @work: Work struct embedded in internal device struct
1888 * This function handles ejecting a device. Windows will
1889 * attempt to gracefully eject a device, waiting 60 seconds to
1890 * hear back from the guest OS that this completed successfully.
1891 * If this timer expires, the device will be forcibly removed.
1893 static void hv_eject_device_work(struct work_struct *work)
1895 struct pci_eject_response *ejct_pkt;
1896 struct hv_pci_dev *hpdev;
1897 struct pci_dev *pdev;
1898 unsigned long flags;
1899 int wslot;
1900 struct {
1901 struct pci_packet pkt;
1902 u8 buffer[sizeof(struct pci_eject_response)];
1903 } ctxt;
1905 hpdev = container_of(work, struct hv_pci_dev, wrk);
1907 if (hpdev->state != hv_pcichild_ejecting) {
1908 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1909 return;
1913 * Ejection can come before or after the PCI bus has been set up, so
1914 * attempt to find it and tear down the bus state, if it exists. This
1915 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
1916 * because hbus->pci_bus may not exist yet.
1918 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
1919 pdev = pci_get_domain_bus_and_slot(hpdev->hbus->sysdata.domain, 0,
1920 wslot);
1921 if (pdev) {
1922 pci_lock_rescan_remove();
1923 pci_stop_and_remove_bus_device(pdev);
1924 pci_dev_put(pdev);
1925 pci_unlock_rescan_remove();
1928 spin_lock_irqsave(&hpdev->hbus->device_list_lock, flags);
1929 list_del(&hpdev->list_entry);
1930 spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);
1932 if (hpdev->pci_slot)
1933 pci_destroy_slot(hpdev->pci_slot);
1935 memset(&ctxt, 0, sizeof(ctxt));
1936 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1937 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
1938 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1939 vmbus_sendpacket(hpdev->hbus->hdev->channel, ejct_pkt,
1940 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
1941 VM_PKT_DATA_INBAND, 0);
1943 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1944 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1945 put_hvpcibus(hpdev->hbus);
1949 * hv_pci_eject_device() - Handles device ejection
1950 * @hpdev: Internal device tracking struct
1952 * This function is invoked when an ejection packet arrives. It
1953 * just schedules work so that we don't re-enter the packet
1954 * delivery code handling the ejection.
1956 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
1958 hpdev->state = hv_pcichild_ejecting;
1959 get_pcichild(hpdev, hv_pcidev_ref_pnp);
1960 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
1961 get_hvpcibus(hpdev->hbus);
1962 queue_work(hpdev->hbus->wq, &hpdev->wrk);
1966 * hv_pci_onchannelcallback() - Handles incoming packets
1967 * @context: Internal bus tracking struct
1969 * This function is invoked whenever the host sends a packet to
1970 * this channel (which is private to this root PCI bus).
1972 static void hv_pci_onchannelcallback(void *context)
1974 const int packet_size = 0x100;
1975 int ret;
1976 struct hv_pcibus_device *hbus = context;
1977 u32 bytes_recvd;
1978 u64 req_id;
1979 struct vmpacket_descriptor *desc;
1980 unsigned char *buffer;
1981 int bufferlen = packet_size;
1982 struct pci_packet *comp_packet;
1983 struct pci_response *response;
1984 struct pci_incoming_message *new_message;
1985 struct pci_bus_relations *bus_rel;
1986 struct pci_dev_incoming *dev_message;
1987 struct hv_pci_dev *hpdev;
1989 buffer = kmalloc(bufferlen, GFP_ATOMIC);
1990 if (!buffer)
1991 return;
1993 while (1) {
1994 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
1995 bufferlen, &bytes_recvd, &req_id);
1997 if (ret == -ENOBUFS) {
1998 kfree(buffer);
1999 /* Handle large packet */
2000 bufferlen = bytes_recvd;
2001 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2002 if (!buffer)
2003 return;
2004 continue;
2007 /* Zero length indicates there are no more packets. */
2008 if (ret || !bytes_recvd)
2009 break;
2012 * All incoming packets must be at least as large as a
2013 * response.
2015 if (bytes_recvd <= sizeof(struct pci_response))
2016 continue;
2017 desc = (struct vmpacket_descriptor *)buffer;
2019 switch (desc->type) {
2020 case VM_PKT_COMP:
2023 * The host is trusted, and thus it's safe to interpret
2024 * this transaction ID as a pointer.
2026 comp_packet = (struct pci_packet *)req_id;
2027 response = (struct pci_response *)buffer;
2028 comp_packet->completion_func(comp_packet->compl_ctxt,
2029 response,
2030 bytes_recvd);
2031 break;
2033 case VM_PKT_DATA_INBAND:
2035 new_message = (struct pci_incoming_message *)buffer;
2036 switch (new_message->message_type.type) {
2037 case PCI_BUS_RELATIONS:
2039 bus_rel = (struct pci_bus_relations *)buffer;
2040 if (bytes_recvd <
2041 offsetof(struct pci_bus_relations, func) +
2042 (sizeof(struct pci_function_description) *
2043 (bus_rel->device_count))) {
2044 dev_err(&hbus->hdev->device,
2045 "bus relations too small\n");
2046 break;
2049 hv_pci_devices_present(hbus, bus_rel);
2050 break;
2052 case PCI_EJECT:
2054 dev_message = (struct pci_dev_incoming *)buffer;
2055 hpdev = get_pcichild_wslot(hbus,
2056 dev_message->wslot.slot);
2057 if (hpdev) {
2058 hv_pci_eject_device(hpdev);
2059 put_pcichild(hpdev,
2060 hv_pcidev_ref_by_slot);
2062 break;
2064 default:
2065 dev_warn(&hbus->hdev->device,
2066 "Unimplemented protocol message %x\n",
2067 new_message->message_type.type);
2068 break;
2070 break;
2072 default:
2073 dev_err(&hbus->hdev->device,
2074 "unhandled packet type %d, tid %llx len %d\n",
2075 desc->type, req_id, bytes_recvd);
2076 break;
2080 kfree(buffer);
2084 * hv_pci_protocol_negotiation() - Set up protocol
2085 * @hdev: VMBus's tracking struct for this root PCI bus
2087 * This driver is intended to support running on Windows 10
2088 * (server) and later versions. It will not run on earlier
2089 * versions, as they assume that many of the operations which
2090 * Linux needs accomplished with a spinlock held were done via
2091 * asynchronous messaging via VMBus. Windows 10 increases the
2092 * surface area of PCI emulation so that these actions can take
2093 * place by suspending a virtual processor for their duration.
2095 * This function negotiates the channel protocol version,
2096 * failing if the host doesn't support the necessary protocol
2097 * level.
2099 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
2101 struct pci_version_request *version_req;
2102 struct hv_pci_compl comp_pkt;
2103 struct pci_packet *pkt;
2104 int ret;
2105 int i;
2108 * Initiate the handshake with the host and negotiate
2109 * a version that the host can support. We start with the
2110 * highest version number and go down if the host cannot
2111 * support it.
2113 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2114 if (!pkt)
2115 return -ENOMEM;
2117 init_completion(&comp_pkt.host_event);
2118 pkt->completion_func = hv_pci_generic_compl;
2119 pkt->compl_ctxt = &comp_pkt;
2120 version_req = (struct pci_version_request *)&pkt->message;
2121 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2123 for (i = 0; i < ARRAY_SIZE(pci_protocol_versions); i++) {
2124 version_req->protocol_version = pci_protocol_versions[i];
2125 ret = vmbus_sendpacket(hdev->channel, version_req,
2126 sizeof(struct pci_version_request),
2127 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2128 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2129 if (!ret)
2130 ret = wait_for_response(hdev, &comp_pkt.host_event);
2132 if (ret) {
2133 dev_err(&hdev->device,
2134 "PCI Pass-through VSP failed to request version: %d",
2135 ret);
2136 goto exit;
2139 if (comp_pkt.completion_status >= 0) {
2140 pci_protocol_version = pci_protocol_versions[i];
2141 dev_info(&hdev->device,
2142 "PCI VMBus probing: Using version %#x\n",
2143 pci_protocol_version);
2144 goto exit;
2147 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2148 dev_err(&hdev->device,
2149 "PCI Pass-through VSP failed version request: %#x",
2150 comp_pkt.completion_status);
2151 ret = -EPROTO;
2152 goto exit;
2155 reinit_completion(&comp_pkt.host_event);
2158 dev_err(&hdev->device,
2159 "PCI pass-through VSP failed to find supported version");
2160 ret = -EPROTO;
2162 exit:
2163 kfree(pkt);
2164 return ret;
2168 * hv_pci_free_bridge_windows() - Release memory regions for the
2169 * bus
2170 * @hbus: Root PCI bus, as understood by this driver
2172 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2175 * Set the resources back to the way they looked when they
2176 * were allocated by setting IORESOURCE_BUSY again.
2179 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2180 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2181 vmbus_free_mmio(hbus->low_mmio_res->start,
2182 resource_size(hbus->low_mmio_res));
2185 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2186 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2187 vmbus_free_mmio(hbus->high_mmio_res->start,
2188 resource_size(hbus->high_mmio_res));
2193 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2194 * for the bus
2195 * @hbus: Root PCI bus, as understood by this driver
2197 * This function calls vmbus_allocate_mmio(), which is itself a
2198 * bit of a compromise. Ideally, we might change the pnp layer
2199 * in the kernel such that it comprehends either PCI devices
2200 * which are "grandchildren of ACPI," with some intermediate bus
2201 * node (in this case, VMBus) or change it such that it
2202 * understands VMBus. The pnp layer, however, has been declared
2203 * deprecated, and not subject to change.
2205 * The workaround, implemented here, is to ask VMBus to allocate
2206 * MMIO space for this bus. VMBus itself knows which ranges are
2207 * appropriate by looking at its own ACPI objects. Then, after
2208 * these ranges are claimed, they're modified to look like they
2209 * would have looked if the ACPI and pnp code had allocated
2210 * bridge windows. These descriptors have to exist in this form
2211 * in order to satisfy the code which will get invoked when the
2212 * endpoint PCI function driver calls request_mem_region() or
2213 * request_mem_region_exclusive().
2215 * Return: 0 on success, -errno on failure
2217 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2219 resource_size_t align;
2220 int ret;
2222 if (hbus->low_mmio_space) {
2223 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2224 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2225 (u64)(u32)0xffffffff,
2226 hbus->low_mmio_space,
2227 align, false);
2228 if (ret) {
2229 dev_err(&hbus->hdev->device,
2230 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2231 hbus->low_mmio_space);
2232 return ret;
2235 /* Modify this resource to become a bridge window. */
2236 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2237 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2238 pci_add_resource(&hbus->resources_for_children,
2239 hbus->low_mmio_res);
2242 if (hbus->high_mmio_space) {
2243 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2244 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2245 0x100000000, -1,
2246 hbus->high_mmio_space, align,
2247 false);
2248 if (ret) {
2249 dev_err(&hbus->hdev->device,
2250 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2251 hbus->high_mmio_space);
2252 goto release_low_mmio;
2255 /* Modify this resource to become a bridge window. */
2256 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2257 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2258 pci_add_resource(&hbus->resources_for_children,
2259 hbus->high_mmio_res);
2262 return 0;
2264 release_low_mmio:
2265 if (hbus->low_mmio_res) {
2266 vmbus_free_mmio(hbus->low_mmio_res->start,
2267 resource_size(hbus->low_mmio_res));
2270 return ret;
2274 * hv_allocate_config_window() - Find MMIO space for PCI Config
2275 * @hbus: Root PCI bus, as understood by this driver
2277 * This function claims memory-mapped I/O space for accessing
2278 * configuration space for the functions on this bus.
2280 * Return: 0 on success, -errno on failure
2282 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2284 int ret;
2287 * Set up a region of MMIO space to use for accessing configuration
2288 * space.
2290 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2291 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2292 if (ret)
2293 return ret;
2296 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2297 * resource claims (those which cannot be overlapped) and the ranges
2298 * which are valid for the children of this bus, which are intended
2299 * to be overlapped by those children. Set the flag on this claim
2300 * meaning that this region can't be overlapped.
2303 hbus->mem_config->flags |= IORESOURCE_BUSY;
2305 return 0;
2308 static void hv_free_config_window(struct hv_pcibus_device *hbus)
2310 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2314 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2315 * @hdev: VMBus's tracking struct for this root PCI bus
2317 * Return: 0 on success, -errno on failure
2319 static int hv_pci_enter_d0(struct hv_device *hdev)
2321 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2322 struct pci_bus_d0_entry *d0_entry;
2323 struct hv_pci_compl comp_pkt;
2324 struct pci_packet *pkt;
2325 int ret;
2328 * Tell the host that the bus is ready to use, and moved into the
2329 * powered-on state. This includes telling the host which region
2330 * of memory-mapped I/O space has been chosen for configuration space
2331 * access.
2333 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2334 if (!pkt)
2335 return -ENOMEM;
2337 init_completion(&comp_pkt.host_event);
2338 pkt->completion_func = hv_pci_generic_compl;
2339 pkt->compl_ctxt = &comp_pkt;
2340 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2341 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2342 d0_entry->mmio_base = hbus->mem_config->start;
2344 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2345 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2346 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2347 if (!ret)
2348 ret = wait_for_response(hdev, &comp_pkt.host_event);
2350 if (ret)
2351 goto exit;
2353 if (comp_pkt.completion_status < 0) {
2354 dev_err(&hdev->device,
2355 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2356 comp_pkt.completion_status);
2357 ret = -EPROTO;
2358 goto exit;
2361 ret = 0;
2363 exit:
2364 kfree(pkt);
2365 return ret;
2369 * hv_pci_query_relations() - Ask host to send list of child
2370 * devices
2371 * @hdev: VMBus's tracking struct for this root PCI bus
2373 * Return: 0 on success, -errno on failure
2375 static int hv_pci_query_relations(struct hv_device *hdev)
2377 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2378 struct pci_message message;
2379 struct completion comp;
2380 int ret;
2382 /* Ask the host to send along the list of child devices */
2383 init_completion(&comp);
2384 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2385 return -ENOTEMPTY;
2387 memset(&message, 0, sizeof(message));
2388 message.type = PCI_QUERY_BUS_RELATIONS;
2390 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2391 0, VM_PKT_DATA_INBAND, 0);
2392 if (!ret)
2393 ret = wait_for_response(hdev, &comp);
2395 return ret;
2399 * hv_send_resources_allocated() - Report local resource choices
2400 * @hdev: VMBus's tracking struct for this root PCI bus
2402 * The host OS is expecting to be sent a request as a message
2403 * which contains all the resources that the device will use.
2404 * The response contains those same resources, "translated"
2405 * which is to say, the values which should be used by the
2406 * hardware, when it delivers an interrupt. (MMIO resources are
2407 * used in local terms.) This is nice for Windows, and lines up
2408 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2409 * is deeply expecting to scan an emulated PCI configuration
2410 * space. So this message is sent here only to drive the state
2411 * machine on the host forward.
2413 * Return: 0 on success, -errno on failure
2415 static int hv_send_resources_allocated(struct hv_device *hdev)
2417 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2418 struct pci_resources_assigned *res_assigned;
2419 struct pci_resources_assigned2 *res_assigned2;
2420 struct hv_pci_compl comp_pkt;
2421 struct hv_pci_dev *hpdev;
2422 struct pci_packet *pkt;
2423 size_t size_res;
2424 u32 wslot;
2425 int ret;
2427 size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
2428 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2430 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2431 if (!pkt)
2432 return -ENOMEM;
2434 ret = 0;
2436 for (wslot = 0; wslot < 256; wslot++) {
2437 hpdev = get_pcichild_wslot(hbus, wslot);
2438 if (!hpdev)
2439 continue;
2441 memset(pkt, 0, sizeof(*pkt) + size_res);
2442 init_completion(&comp_pkt.host_event);
2443 pkt->completion_func = hv_pci_generic_compl;
2444 pkt->compl_ctxt = &comp_pkt;
2446 if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2447 res_assigned =
2448 (struct pci_resources_assigned *)&pkt->message;
2449 res_assigned->message_type.type =
2450 PCI_RESOURCES_ASSIGNED;
2451 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2452 } else {
2453 res_assigned2 =
2454 (struct pci_resources_assigned2 *)&pkt->message;
2455 res_assigned2->message_type.type =
2456 PCI_RESOURCES_ASSIGNED2;
2457 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2459 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2461 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2462 size_res, (unsigned long)pkt,
2463 VM_PKT_DATA_INBAND,
2464 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2465 if (!ret)
2466 ret = wait_for_response(hdev, &comp_pkt.host_event);
2467 if (ret)
2468 break;
2470 if (comp_pkt.completion_status < 0) {
2471 ret = -EPROTO;
2472 dev_err(&hdev->device,
2473 "resource allocated returned 0x%x",
2474 comp_pkt.completion_status);
2475 break;
2479 kfree(pkt);
2480 return ret;
2484 * hv_send_resources_released() - Report local resources
2485 * released
2486 * @hdev: VMBus's tracking struct for this root PCI bus
2488 * Return: 0 on success, -errno on failure
2490 static int hv_send_resources_released(struct hv_device *hdev)
2492 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2493 struct pci_child_message pkt;
2494 struct hv_pci_dev *hpdev;
2495 u32 wslot;
2496 int ret;
2498 for (wslot = 0; wslot < 256; wslot++) {
2499 hpdev = get_pcichild_wslot(hbus, wslot);
2500 if (!hpdev)
2501 continue;
2503 memset(&pkt, 0, sizeof(pkt));
2504 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2505 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2507 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2509 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2510 VM_PKT_DATA_INBAND, 0);
2511 if (ret)
2512 return ret;
2515 return 0;
2518 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2520 atomic_inc(&hbus->remove_lock);
2523 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2525 if (atomic_dec_and_test(&hbus->remove_lock))
2526 complete(&hbus->remove_event);
2530 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2531 * @hdev: VMBus's tracking struct for this root PCI bus
2532 * @dev_id: Identifies the device itself
2534 * Return: 0 on success, -errno on failure
2536 static int hv_pci_probe(struct hv_device *hdev,
2537 const struct hv_vmbus_device_id *dev_id)
2539 struct hv_pcibus_device *hbus;
2540 int ret;
2543 * hv_pcibus_device contains the hypercall arguments for retargeting in
2544 * hv_irq_unmask(). Those must not cross a page boundary.
2546 BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE);
2548 hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL);
2549 if (!hbus)
2550 return -ENOMEM;
2551 hbus->state = hv_pcibus_init;
2554 * The PCI bus "domain" is what is called "segment" in ACPI and
2555 * other specs. Pull it from the instance ID, to get something
2556 * unique. Bytes 8 and 9 are what is used in Windows guests, so
2557 * do the same thing for consistency. Note that, since this code
2558 * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
2559 * that (1) the only domain in use for something that looks like
2560 * a physical PCI bus (which is actually emulated by the
2561 * hypervisor) is domain 0 and (2) there will be no overlap
2562 * between domains derived from these instance IDs in the same
2563 * VM.
2565 hbus->sysdata.domain = hdev->dev_instance.b[9] |
2566 hdev->dev_instance.b[8] << 8;
2568 hbus->hdev = hdev;
2569 atomic_inc(&hbus->remove_lock);
2570 INIT_LIST_HEAD(&hbus->children);
2571 INIT_LIST_HEAD(&hbus->dr_list);
2572 INIT_LIST_HEAD(&hbus->resources_for_children);
2573 spin_lock_init(&hbus->config_lock);
2574 spin_lock_init(&hbus->device_list_lock);
2575 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
2576 init_completion(&hbus->remove_event);
2577 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
2578 hbus->sysdata.domain);
2579 if (!hbus->wq) {
2580 ret = -ENOMEM;
2581 goto free_bus;
2584 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2585 hv_pci_onchannelcallback, hbus);
2586 if (ret)
2587 goto destroy_wq;
2589 hv_set_drvdata(hdev, hbus);
2591 ret = hv_pci_protocol_negotiation(hdev);
2592 if (ret)
2593 goto close;
2595 ret = hv_allocate_config_window(hbus);
2596 if (ret)
2597 goto close;
2599 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2600 PCI_CONFIG_MMIO_LENGTH);
2601 if (!hbus->cfg_addr) {
2602 dev_err(&hdev->device,
2603 "Unable to map a virtual address for config space\n");
2604 ret = -ENOMEM;
2605 goto free_config;
2608 hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
2609 if (!hbus->sysdata.fwnode) {
2610 ret = -ENOMEM;
2611 goto unmap;
2614 ret = hv_pcie_init_irq_domain(hbus);
2615 if (ret)
2616 goto free_fwnode;
2618 ret = hv_pci_query_relations(hdev);
2619 if (ret)
2620 goto free_irq_domain;
2622 ret = hv_pci_enter_d0(hdev);
2623 if (ret)
2624 goto free_irq_domain;
2626 ret = hv_pci_allocate_bridge_windows(hbus);
2627 if (ret)
2628 goto free_irq_domain;
2630 ret = hv_send_resources_allocated(hdev);
2631 if (ret)
2632 goto free_windows;
2634 prepopulate_bars(hbus);
2636 hbus->state = hv_pcibus_probed;
2638 ret = create_root_hv_pci_bus(hbus);
2639 if (ret)
2640 goto free_windows;
2642 return 0;
2644 free_windows:
2645 hv_pci_free_bridge_windows(hbus);
2646 free_irq_domain:
2647 irq_domain_remove(hbus->irq_domain);
2648 free_fwnode:
2649 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2650 unmap:
2651 iounmap(hbus->cfg_addr);
2652 free_config:
2653 hv_free_config_window(hbus);
2654 close:
2655 vmbus_close(hdev->channel);
2656 destroy_wq:
2657 destroy_workqueue(hbus->wq);
2658 free_bus:
2659 free_page((unsigned long)hbus);
2660 return ret;
2663 static void hv_pci_bus_exit(struct hv_device *hdev)
2665 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2666 struct {
2667 struct pci_packet teardown_packet;
2668 u8 buffer[sizeof(struct pci_message)];
2669 } pkt;
2670 struct pci_bus_relations relations;
2671 struct hv_pci_compl comp_pkt;
2672 int ret;
2675 * After the host sends the RESCIND_CHANNEL message, it doesn't
2676 * access the per-channel ringbuffer any longer.
2678 if (hdev->channel->rescind)
2679 return;
2681 /* Delete any children which might still exist. */
2682 memset(&relations, 0, sizeof(relations));
2683 hv_pci_devices_present(hbus, &relations);
2685 ret = hv_send_resources_released(hdev);
2686 if (ret)
2687 dev_err(&hdev->device,
2688 "Couldn't send resources released packet(s)\n");
2690 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
2691 init_completion(&comp_pkt.host_event);
2692 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
2693 pkt.teardown_packet.compl_ctxt = &comp_pkt;
2694 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
2696 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
2697 sizeof(struct pci_message),
2698 (unsigned long)&pkt.teardown_packet,
2699 VM_PKT_DATA_INBAND,
2700 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2701 if (!ret)
2702 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
2706 * hv_pci_remove() - Remove routine for this VMBus channel
2707 * @hdev: VMBus's tracking struct for this root PCI bus
2709 * Return: 0 on success, -errno on failure
2711 static int hv_pci_remove(struct hv_device *hdev)
2713 struct hv_pcibus_device *hbus;
2715 hbus = hv_get_drvdata(hdev);
2716 if (hbus->state == hv_pcibus_installed) {
2717 /* Remove the bus from PCI's point of view. */
2718 pci_lock_rescan_remove();
2719 pci_stop_root_bus(hbus->pci_bus);
2720 pci_remove_root_bus(hbus->pci_bus);
2721 pci_unlock_rescan_remove();
2722 hbus->state = hv_pcibus_removed;
2725 hv_pci_bus_exit(hdev);
2727 vmbus_close(hdev->channel);
2729 iounmap(hbus->cfg_addr);
2730 hv_free_config_window(hbus);
2731 pci_free_resource_list(&hbus->resources_for_children);
2732 hv_pci_free_bridge_windows(hbus);
2733 irq_domain_remove(hbus->irq_domain);
2734 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2735 put_hvpcibus(hbus);
2736 wait_for_completion(&hbus->remove_event);
2737 destroy_workqueue(hbus->wq);
2738 free_page((unsigned long)hbus);
2739 return 0;
2742 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
2743 /* PCI Pass-through Class ID */
2744 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
2745 { HV_PCIE_GUID, },
2746 { },
2749 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
2751 static struct hv_driver hv_pci_drv = {
2752 .name = "hv_pci",
2753 .id_table = hv_pci_id_table,
2754 .probe = hv_pci_probe,
2755 .remove = hv_pci_remove,
2758 static void __exit exit_hv_pci_drv(void)
2760 vmbus_driver_unregister(&hv_pci_drv);
2763 static int __init init_hv_pci_drv(void)
2765 return vmbus_driver_register(&hv_pci_drv);
2768 module_init(init_hv_pci_drv);
2769 module_exit(exit_hv_pci_drv);
2771 MODULE_DESCRIPTION("Hyper-V PCI");
2772 MODULE_LICENSE("GPL v2");