x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / drivers / pinctrl / mvebu / pinctrl-mvebu.c
blob163d4614b0f80233957d23a13949fe32330bb6be
1 /*
2 * Marvell MVEBU pinctrl core driver
4 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15 #include <linux/io.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_platform.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/pinctrl/machine.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/mfd/syscon.h>
26 #include <linux/regmap.h>
28 #include "pinctrl-mvebu.h"
30 #define MPPS_PER_REG 8
31 #define MPP_BITS 4
32 #define MPP_MASK 0xf
34 struct mvebu_pinctrl_function {
35 const char *name;
36 const char **groups;
37 unsigned num_groups;
40 struct mvebu_pinctrl_group {
41 const char *name;
42 const struct mvebu_mpp_ctrl *ctrl;
43 struct mvebu_mpp_ctrl_data *data;
44 struct mvebu_mpp_ctrl_setting *settings;
45 unsigned num_settings;
46 unsigned gid;
47 unsigned *pins;
48 unsigned npins;
51 struct mvebu_pinctrl {
52 struct device *dev;
53 struct pinctrl_dev *pctldev;
54 struct pinctrl_desc desc;
55 struct mvebu_pinctrl_group *groups;
56 unsigned num_groups;
57 struct mvebu_pinctrl_function *functions;
58 unsigned num_functions;
59 u8 variant;
62 int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
63 unsigned int pid, unsigned long *config)
65 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
66 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
68 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK;
70 return 0;
73 int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
74 unsigned int pid, unsigned long config)
76 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
77 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
78 unsigned long reg;
80 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift);
81 writel(reg | (config << shift), data->base + off);
83 return 0;
86 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid(
87 struct mvebu_pinctrl *pctl, unsigned pid)
89 unsigned n;
90 for (n = 0; n < pctl->num_groups; n++) {
91 if (pid >= pctl->groups[n].pins[0] &&
92 pid < pctl->groups[n].pins[0] +
93 pctl->groups[n].npins)
94 return &pctl->groups[n];
96 return NULL;
99 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name(
100 struct mvebu_pinctrl *pctl, const char *name)
102 unsigned n;
103 for (n = 0; n < pctl->num_groups; n++) {
104 if (strcmp(name, pctl->groups[n].name) == 0)
105 return &pctl->groups[n];
107 return NULL;
110 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val(
111 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
112 unsigned long config)
114 unsigned n;
115 for (n = 0; n < grp->num_settings; n++) {
116 if (config == grp->settings[n].val) {
117 if (!pctl->variant || (pctl->variant &
118 grp->settings[n].variant))
119 return &grp->settings[n];
122 return NULL;
125 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name(
126 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
127 const char *name)
129 unsigned n;
130 for (n = 0; n < grp->num_settings; n++) {
131 if (strcmp(name, grp->settings[n].name) == 0) {
132 if (!pctl->variant || (pctl->variant &
133 grp->settings[n].variant))
134 return &grp->settings[n];
137 return NULL;
140 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting(
141 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp)
143 unsigned n;
144 for (n = 0; n < grp->num_settings; n++) {
145 if (grp->settings[n].flags &
146 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
147 if (!pctl->variant || (pctl->variant &
148 grp->settings[n].variant))
149 return &grp->settings[n];
152 return NULL;
155 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
156 struct mvebu_pinctrl *pctl, const char *name)
158 unsigned n;
159 for (n = 0; n < pctl->num_functions; n++) {
160 if (strcmp(name, pctl->functions[n].name) == 0)
161 return &pctl->functions[n];
163 return NULL;
166 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
167 unsigned gid, unsigned long *config)
169 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
170 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
172 if (!grp->ctrl)
173 return -EINVAL;
175 return grp->ctrl->mpp_get(grp->data, grp->pins[0], config);
178 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
179 unsigned gid, unsigned long *configs,
180 unsigned num_configs)
182 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
183 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
184 int i, ret;
186 if (!grp->ctrl)
187 return -EINVAL;
189 for (i = 0; i < num_configs; i++) {
190 ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]);
191 if (ret)
192 return ret;
193 } /* for each config */
195 return 0;
198 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
199 struct seq_file *s, unsigned gid)
201 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
202 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
203 struct mvebu_mpp_ctrl_setting *curr;
204 unsigned long config;
205 unsigned n;
207 if (mvebu_pinconf_group_get(pctldev, gid, &config))
208 return;
210 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config);
212 if (curr) {
213 seq_printf(s, "current: %s", curr->name);
214 if (curr->subname)
215 seq_printf(s, "(%s)", curr->subname);
216 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
217 seq_putc(s, '(');
218 if (curr->flags & MVEBU_SETTING_GPI)
219 seq_putc(s, 'i');
220 if (curr->flags & MVEBU_SETTING_GPO)
221 seq_putc(s, 'o');
222 seq_putc(s, ')');
224 } else {
225 seq_puts(s, "current: UNKNOWN");
228 if (grp->num_settings > 1) {
229 seq_puts(s, ", available = [");
230 for (n = 0; n < grp->num_settings; n++) {
231 if (curr == &grp->settings[n])
232 continue;
234 /* skip unsupported settings for this variant */
235 if (pctl->variant &&
236 !(pctl->variant & grp->settings[n].variant))
237 continue;
239 seq_printf(s, " %s", grp->settings[n].name);
240 if (grp->settings[n].subname)
241 seq_printf(s, "(%s)", grp->settings[n].subname);
242 if (grp->settings[n].flags &
243 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
244 seq_putc(s, '(');
245 if (grp->settings[n].flags & MVEBU_SETTING_GPI)
246 seq_putc(s, 'i');
247 if (grp->settings[n].flags & MVEBU_SETTING_GPO)
248 seq_putc(s, 'o');
249 seq_putc(s, ')');
252 seq_puts(s, " ]");
256 static const struct pinconf_ops mvebu_pinconf_ops = {
257 .pin_config_group_get = mvebu_pinconf_group_get,
258 .pin_config_group_set = mvebu_pinconf_group_set,
259 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show,
262 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev)
264 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
266 return pctl->num_functions;
269 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev,
270 unsigned fid)
272 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
274 return pctl->functions[fid].name;
277 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid,
278 const char * const **groups,
279 unsigned * const num_groups)
281 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
283 *groups = pctl->functions[fid].groups;
284 *num_groups = pctl->functions[fid].num_groups;
285 return 0;
288 static int mvebu_pinmux_set(struct pinctrl_dev *pctldev, unsigned fid,
289 unsigned gid)
291 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
292 struct mvebu_pinctrl_function *func = &pctl->functions[fid];
293 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
294 struct mvebu_mpp_ctrl_setting *setting;
295 int ret;
296 unsigned long config;
298 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp,
299 func->name);
300 if (!setting) {
301 dev_err(pctl->dev,
302 "unable to find setting %s in group %s\n",
303 func->name, func->groups[gid]);
304 return -EINVAL;
307 config = setting->val;
308 ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
309 if (ret) {
310 dev_err(pctl->dev, "cannot set group %s to %s\n",
311 func->groups[gid], func->name);
312 return ret;
315 return 0;
318 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
319 struct pinctrl_gpio_range *range, unsigned offset)
321 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
322 struct mvebu_pinctrl_group *grp;
323 struct mvebu_mpp_ctrl_setting *setting;
324 unsigned long config;
326 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
327 if (!grp)
328 return -EINVAL;
330 if (grp->ctrl->mpp_gpio_req)
331 return grp->ctrl->mpp_gpio_req(grp->data, offset);
333 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
334 if (!setting)
335 return -ENOTSUPP;
337 config = setting->val;
339 return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
342 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
343 struct pinctrl_gpio_range *range, unsigned offset, bool input)
345 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
346 struct mvebu_pinctrl_group *grp;
347 struct mvebu_mpp_ctrl_setting *setting;
349 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
350 if (!grp)
351 return -EINVAL;
353 if (grp->ctrl->mpp_gpio_dir)
354 return grp->ctrl->mpp_gpio_dir(grp->data, offset, input);
356 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
357 if (!setting)
358 return -ENOTSUPP;
360 if ((input && (setting->flags & MVEBU_SETTING_GPI)) ||
361 (!input && (setting->flags & MVEBU_SETTING_GPO)))
362 return 0;
364 return -ENOTSUPP;
367 static const struct pinmux_ops mvebu_pinmux_ops = {
368 .get_functions_count = mvebu_pinmux_get_funcs_count,
369 .get_function_name = mvebu_pinmux_get_func_name,
370 .get_function_groups = mvebu_pinmux_get_groups,
371 .gpio_request_enable = mvebu_pinmux_gpio_request_enable,
372 .gpio_set_direction = mvebu_pinmux_gpio_set_direction,
373 .set_mux = mvebu_pinmux_set,
376 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
378 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
379 return pctl->num_groups;
382 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
383 unsigned gid)
385 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
386 return pctl->groups[gid].name;
389 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
390 unsigned gid, const unsigned **pins,
391 unsigned *num_pins)
393 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
394 *pins = pctl->groups[gid].pins;
395 *num_pins = pctl->groups[gid].npins;
396 return 0;
399 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
400 struct device_node *np,
401 struct pinctrl_map **map,
402 unsigned *num_maps)
404 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
405 struct property *prop;
406 const char *function;
407 const char *group;
408 int ret, nmaps, n;
410 *map = NULL;
411 *num_maps = 0;
413 ret = of_property_read_string(np, "marvell,function", &function);
414 if (ret) {
415 dev_err(pctl->dev,
416 "missing marvell,function in node %s\n", np->name);
417 return 0;
420 nmaps = of_property_count_strings(np, "marvell,pins");
421 if (nmaps < 0) {
422 dev_err(pctl->dev,
423 "missing marvell,pins in node %s\n", np->name);
424 return 0;
427 *map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL);
428 if (!*map)
429 return -ENOMEM;
431 n = 0;
432 of_property_for_each_string(np, "marvell,pins", prop, group) {
433 struct mvebu_pinctrl_group *grp =
434 mvebu_pinctrl_find_group_by_name(pctl, group);
436 if (!grp) {
437 dev_err(pctl->dev, "unknown pin %s", group);
438 continue;
441 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) {
442 dev_err(pctl->dev, "unsupported function %s on pin %s",
443 function, group);
444 continue;
447 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP;
448 (*map)[n].data.mux.group = group;
449 (*map)[n].data.mux.function = function;
450 n++;
453 *num_maps = nmaps;
455 return 0;
458 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
459 struct pinctrl_map *map, unsigned num_maps)
461 kfree(map);
464 static const struct pinctrl_ops mvebu_pinctrl_ops = {
465 .get_groups_count = mvebu_pinctrl_get_groups_count,
466 .get_group_name = mvebu_pinctrl_get_group_name,
467 .get_group_pins = mvebu_pinctrl_get_group_pins,
468 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map,
469 .dt_free_map = mvebu_pinctrl_dt_free_map,
472 static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize,
473 const char *name)
475 if (*funcsize <= 0)
476 return -EOVERFLOW;
478 while (funcs->num_groups) {
479 /* function already there */
480 if (strcmp(funcs->name, name) == 0) {
481 funcs->num_groups++;
482 return -EEXIST;
484 funcs++;
487 /* append new unique function */
488 funcs->name = name;
489 funcs->num_groups = 1;
490 (*funcsize)--;
492 return 0;
495 static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
496 struct mvebu_pinctrl *pctl)
498 struct mvebu_pinctrl_function *funcs;
499 int num = 0, funcsize = pctl->desc.npins;
500 int n, s;
502 /* we allocate functions for number of pins and hope
503 * there are fewer unique functions than pins available */
504 funcs = devm_kzalloc(&pdev->dev, funcsize *
505 sizeof(struct mvebu_pinctrl_function), GFP_KERNEL);
506 if (!funcs)
507 return -ENOMEM;
509 for (n = 0; n < pctl->num_groups; n++) {
510 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
511 for (s = 0; s < grp->num_settings; s++) {
512 int ret;
514 /* skip unsupported settings on this variant */
515 if (pctl->variant &&
516 !(pctl->variant & grp->settings[s].variant))
517 continue;
519 /* check for unique functions and count groups */
520 ret = _add_function(funcs, &funcsize,
521 grp->settings[s].name);
522 if (ret == -EOVERFLOW)
523 dev_err(&pdev->dev,
524 "More functions than pins(%d)\n",
525 pctl->desc.npins);
526 if (ret < 0)
527 continue;
529 num++;
533 pctl->num_functions = num;
534 pctl->functions = funcs;
536 for (n = 0; n < pctl->num_groups; n++) {
537 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
538 for (s = 0; s < grp->num_settings; s++) {
539 struct mvebu_pinctrl_function *f;
540 const char **groups;
542 /* skip unsupported settings on this variant */
543 if (pctl->variant &&
544 !(pctl->variant & grp->settings[s].variant))
545 continue;
547 f = mvebu_pinctrl_find_function_by_name(pctl,
548 grp->settings[s].name);
550 /* allocate group name array if not done already */
551 if (!f->groups) {
552 f->groups = devm_kzalloc(&pdev->dev,
553 f->num_groups * sizeof(char *),
554 GFP_KERNEL);
555 if (!f->groups)
556 return -ENOMEM;
559 /* find next free group name and assign current name */
560 groups = f->groups;
561 while (*groups)
562 groups++;
563 *groups = grp->name;
567 return 0;
570 int mvebu_pinctrl_probe(struct platform_device *pdev)
572 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
573 struct mvebu_pinctrl *pctl;
574 struct pinctrl_pin_desc *pdesc;
575 unsigned gid, n, k;
576 unsigned size, noname = 0;
577 char *noname_buf;
578 void *p;
579 int ret;
581 if (!soc || !soc->controls || !soc->modes) {
582 dev_err(&pdev->dev, "wrong pinctrl soc info\n");
583 return -EINVAL;
586 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
587 GFP_KERNEL);
588 if (!pctl)
589 return -ENOMEM;
591 pctl->desc.name = dev_name(&pdev->dev);
592 pctl->desc.owner = THIS_MODULE;
593 pctl->desc.pctlops = &mvebu_pinctrl_ops;
594 pctl->desc.pmxops = &mvebu_pinmux_ops;
595 pctl->desc.confops = &mvebu_pinconf_ops;
596 pctl->variant = soc->variant;
597 pctl->dev = &pdev->dev;
598 platform_set_drvdata(pdev, pctl);
600 /* count controls and create names for mvebu generic
601 register controls; also does sanity checks */
602 pctl->num_groups = 0;
603 pctl->desc.npins = 0;
604 for (n = 0; n < soc->ncontrols; n++) {
605 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
607 pctl->desc.npins += ctrl->npins;
608 /* initialize control's pins[] array */
609 for (k = 0; k < ctrl->npins; k++)
610 ctrl->pins[k] = ctrl->pid + k;
613 * We allow to pass controls with NULL name that we treat
614 * as a range of one-pin groups with generic mvebu register
615 * controls.
617 if (!ctrl->name) {
618 pctl->num_groups += ctrl->npins;
619 noname += ctrl->npins;
620 } else {
621 pctl->num_groups += 1;
625 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins *
626 sizeof(struct pinctrl_pin_desc), GFP_KERNEL);
627 if (!pdesc)
628 return -ENOMEM;
630 for (n = 0; n < pctl->desc.npins; n++)
631 pdesc[n].number = n;
632 pctl->desc.pins = pdesc;
635 * allocate groups and name buffers for unnamed groups.
637 size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8;
638 p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
639 if (!p) {
640 dev_err(&pdev->dev, "failed to alloc group data\n");
641 return -ENOMEM;
643 pctl->groups = p;
644 noname_buf = p + pctl->num_groups * sizeof(*pctl->groups);
646 /* assign mpp controls to groups */
647 gid = 0;
648 for (n = 0; n < soc->ncontrols; n++) {
649 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
650 struct mvebu_mpp_ctrl_data *data = soc->control_data ?
651 &soc->control_data[n] : NULL;
653 pctl->groups[gid].gid = gid;
654 pctl->groups[gid].ctrl = ctrl;
655 pctl->groups[gid].data = data;
656 pctl->groups[gid].name = ctrl->name;
657 pctl->groups[gid].pins = ctrl->pins;
658 pctl->groups[gid].npins = ctrl->npins;
661 * We treat unnamed controls as a range of one-pin groups
662 * with generic mvebu register controls. Use one group for
663 * each in this range and assign a default group name.
665 if (!ctrl->name) {
666 pctl->groups[gid].name = noname_buf;
667 pctl->groups[gid].npins = 1;
668 sprintf(noname_buf, "mpp%d", ctrl->pid+0);
669 noname_buf += 8;
671 for (k = 1; k < ctrl->npins; k++) {
672 gid++;
673 pctl->groups[gid].gid = gid;
674 pctl->groups[gid].ctrl = ctrl;
675 pctl->groups[gid].data = data;
676 pctl->groups[gid].name = noname_buf;
677 pctl->groups[gid].pins = &ctrl->pins[k];
678 pctl->groups[gid].npins = 1;
679 sprintf(noname_buf, "mpp%d", ctrl->pid+k);
680 noname_buf += 8;
683 gid++;
686 /* assign mpp modes to groups */
687 for (n = 0; n < soc->nmodes; n++) {
688 struct mvebu_mpp_mode *mode = &soc->modes[n];
689 struct mvebu_mpp_ctrl_setting *set = &mode->settings[0];
690 struct mvebu_pinctrl_group *grp;
691 unsigned num_settings;
692 unsigned supp_settings;
694 for (num_settings = 0, supp_settings = 0; ; set++) {
695 if (!set->name)
696 break;
698 num_settings++;
700 /* skip unsupported settings for this variant */
701 if (pctl->variant && !(pctl->variant & set->variant))
702 continue;
704 supp_settings++;
706 /* find gpio/gpo/gpi settings */
707 if (strcmp(set->name, "gpio") == 0)
708 set->flags = MVEBU_SETTING_GPI |
709 MVEBU_SETTING_GPO;
710 else if (strcmp(set->name, "gpo") == 0)
711 set->flags = MVEBU_SETTING_GPO;
712 else if (strcmp(set->name, "gpi") == 0)
713 set->flags = MVEBU_SETTING_GPI;
716 /* skip modes with no settings for this variant */
717 if (!supp_settings)
718 continue;
720 grp = mvebu_pinctrl_find_group_by_pid(pctl, mode->pid);
721 if (!grp) {
722 dev_warn(&pdev->dev, "unknown pinctrl group %d\n",
723 mode->pid);
724 continue;
727 grp->settings = mode->settings;
728 grp->num_settings = num_settings;
731 ret = mvebu_pinctrl_build_functions(pdev, pctl);
732 if (ret) {
733 dev_err(&pdev->dev, "unable to build functions\n");
734 return ret;
737 pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
738 if (IS_ERR(pctl->pctldev)) {
739 dev_err(&pdev->dev, "unable to register pinctrl driver\n");
740 return PTR_ERR(pctl->pctldev);
743 dev_info(&pdev->dev, "registered pinctrl driver\n");
745 /* register gpio ranges */
746 for (n = 0; n < soc->ngpioranges; n++)
747 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]);
749 return 0;
753 * mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl
754 * @pdev: platform device (with platform data already attached)
756 * Initialise a simple (single base address) mmio pinctrl driver,
757 * assigning the MMIO base address to all mvebu mpp ctrl instances.
759 int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev)
761 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
762 struct mvebu_mpp_ctrl_data *mpp_data;
763 struct resource *res;
764 void __iomem *base;
765 int i;
767 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
768 base = devm_ioremap_resource(&pdev->dev, res);
769 if (IS_ERR(base))
770 return PTR_ERR(base);
772 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
773 GFP_KERNEL);
774 if (!mpp_data)
775 return -ENOMEM;
777 for (i = 0; i < soc->ncontrols; i++)
778 mpp_data[i].base = base;
780 soc->control_data = mpp_data;
782 return mvebu_pinctrl_probe(pdev);
785 int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
786 unsigned int pid, unsigned long *config)
788 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
789 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
790 unsigned int val;
791 int err;
793 err = regmap_read(data->regmap.map, data->regmap.offset + off, &val);
794 if (err)
795 return err;
797 *config = (val >> shift) & MVEBU_MPP_MASK;
799 return 0;
802 int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
803 unsigned int pid, unsigned long config)
805 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
806 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
808 return regmap_update_bits(data->regmap.map, data->regmap.offset + off,
809 MVEBU_MPP_MASK << shift, config << shift);
812 int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev,
813 struct device *syscon_dev, u32 offset)
815 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
816 struct mvebu_mpp_ctrl_data *mpp_data;
817 struct regmap *regmap;
818 int i;
820 regmap = syscon_node_to_regmap(syscon_dev->of_node);
821 if (IS_ERR(regmap))
822 return PTR_ERR(regmap);
824 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
825 GFP_KERNEL);
826 if (!mpp_data)
827 return -ENOMEM;
829 for (i = 0; i < soc->ncontrols; i++) {
830 mpp_data[i].regmap.map = regmap;
831 mpp_data[i].regmap.offset = offset;
834 soc->control_data = mpp_data;
836 return mvebu_pinctrl_probe(pdev);